| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-05-11 | riscv: add memory-type errata for T-Head |   Heiko Stuebner | 1 | -0/+6 |
| 2022-05-11 | riscv: add RISC-V Svpbmt extension support | Heiko Stuebner | 1 | -0/+3 |
| 2022-05-11 | riscv: implement module alternatives | Heiko Stuebner | 1 | -0/+3 |
| 2022-05-11 | riscv: allow different stages with alternatives | Heiko Stuebner | 1 | -1/+4 |
| 2022-05-11 | riscv: integrate alternatives better into the main architecture | Heiko Stuebner | 1 | -0/+8 |
| 2021-04-26 | riscv: sifive: Add SiFive alternative ports |   Vincent Chen | 1 | -0/+3 |
| 2021-04-26 | riscv: Introduce alternative mechanism to apply errata solution | Vincent Chen | 1 | -0/+36 |
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index : linux-dev | |
| Linux kernel development work - see feature branches | Jason A. Donenfeld |
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