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2011-01-11Merge branches 'sh/memchunk' and 'common/mmcif' into sh-latestPaul Mundt1-1/+1
2011-01-11sh: pci: Add pci_fixup_pcic to pci of landiskNobuhiro Iwamatsu1-2/+26
This adds a pci setting revision for landisk. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-07Merge branch 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wqLinus Torvalds1-1/+1
* 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: (33 commits) usb: don't use flush_scheduled_work() speedtch: don't abuse struct delayed_work media/video: don't use flush_scheduled_work() media/video: explicitly flush request_module work ioc4: use static work_struct for ioc4_load_modules() init: don't call flush_scheduled_work() from do_initcalls() s390: don't use flush_scheduled_work() rtc: don't use flush_scheduled_work() mmc: update workqueue usages mfd: update workqueue usages dvb: don't use flush_scheduled_work() leds-wm8350: don't use flush_scheduled_work() mISDN: don't use flush_scheduled_work() macintosh/ams: don't use flush_scheduled_work() vmwgfx: don't use flush_scheduled_work() tpm: don't use flush_scheduled_work() sonypi: don't use flush_scheduled_work() hvsi: don't use flush_scheduled_work() xen: don't use flush_scheduled_work() gdrom: don't use flush_scheduled_work() ... Fixed up trivial conflict in drivers/media/video/bt8xx/bttv-input.c as per Tejun.
2010-12-24sh: don't use flush_scheduled_work()Tejun Heo1-1/+1
flush_scheduled_work() is deprecated and scheduled to be removed. Directly flush psw->work on removal instead. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-sh@vger.kernel.org
2010-11-01sh: machvec IO death.Paul Mundt1-2/+1
This takes a bit of a sledgehammer to the machvec I/O routines. The iomem case requires no special casing and so can just be dropped outright. This only leaves the ioport casing for PCI and SuperIO mangling. With the SuperIO case going through the standard ioport mapping, it's possible to replace everything with generic routines. With this done the standard I/O routines are tidied up and NO_IOPORT now gets default-enabled for the vast majority of boards. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-15sh: pci: Convert to upper/lower_32_bits() helpers.Paul Mundt2-9/+2
Instead of hand-rolling our own, just use the generic ones instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-14sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786.Paul Mundt2-3/+21
The SDK7786 FPGA has secondary control over the PCIe clocks, specifically relating to the slots and oscillator. This ties the FPGA clocks in to the clock framework and balances the refcounting similar to how the primary on-chip clocks are managed. While the on-chip clocks are per-port, the FPGA clock enable/disable is global for the entire block. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-14sh: pci: Support slot 4 routing on SDK7786.Paul Mundt3-1/+70
SDK7786 supports connecting either slot3 or 4 to the same PCIe port by way of FPGA muxing. By default the vertical slot 3 on the baseboard is enabled, so this adds in a command line option for forcibly enabling the slot 4 edge connector. If nothing has been specified on the command line, we fall back to reading the resistor values for card presence to figure out where to route the port to. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: Use a generic raw spinlock for PCI config access locking.Paul Mundt3-12/+15
This copies the pci_config_lock idea from x86 over, allowing us to kill off a couple of existing private locks. At the same time, these need to be converted to raw spinlocks for -rt kernels, so we make that change at the same time. This should make it easier for future parts to get the locking right instead of inevitable ending up with lock type mismatches. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: clock framework support for SH7786 PCIe.Paul Mundt1-21/+86
This gets each port handling its MSTP bit, as well as moving the PHY clock management in to the clock framework. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: Use I/O accessors consistently in SH7786 PCIe init code.Paul Mundt2-17/+25
Some of the existing code is flipping between __raw_xxx() and pci_{read,write}_reg(). As the latter are just wrappers for the former, flip over to using them consistently. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: Support ports with disabled links on SH7786 PCIe.Paul Mundt1-5/+12
Presently we error out if a link is disabled and simply drop the port registration outright. This follows the PPC changes and simply reports on the link state on boot, leaving the port registered, in order to more easily deal with hotplug on future parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: Discard initial PCICONF4/5 settings for SH7786 PCIe.Paul Mundt1-3/+0
These settings are properly propagated by the hardware already, so there's no need to bother with them manually. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: Support root complex config accesses on SH7786 PCIe.Paul Mundt2-9/+55
The SH7786 PCIe is presently unable to enumerate itself in root complex mode, and has no visibility through either type 0 or type 1 accesses, despite having a mostly sensible extended config space for each port. Attempts to generate type 0 or type 1 config cycles result in completer aborts, so we're ultimately forced to use SuperHyway transactions instead. As each port has a single port <-> device mapping that resolves for any PCI_SLOT definition, we simply hijack devfn 0 for the SuperHyway transaction and bump up the devfn limit. With enumeration of the root complex now possible, we also need to insert an early fixup to hide the BARs from the kernel. With all of that done, it's now possible to use the pcieport services with all of the PCIe ports, which is the first step to power management support. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20sh: pci: Move Renesas PCI IDs to a better place.Paul Mundt1-6/+0
Previously these IDs were only used by one driver, so there was not much need for having them generically defined. Now that this will no longer hold true, move them over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-19sh: pci: Give SH7786 PHY some time to settle.Paul Mundt1-0/+3
The spec suggests waiting up to 500ms for the PHY to settle before testing link state, but practice shows that 100ms is sufficient (this is the delay value we also use on the other SH-4A PCI controllers, too). This makes device detection much more reliable, although in the future it should be a bit faster to simply serialize with a TLP IRQ. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-19sh: pci: Toggle configuration accesses on SH7786.Paul Mundt1-0/+3
After configuration accesses have been completed deassert the configuration access enable cleanly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-19sh: pci: Use generic pci_enable_resources() for pcibios_enable_device().Paul Mundt1-34/+1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07Merge branch 'sh/pci-express-integration'Paul Mundt2-11/+85
2010-09-07sh: Hook up 3rd memory window for all SH7786 PCIe channels.Paul Mundt1-0/+3
Now that the resource assignment issues are resolved, we can finally wire up the small third memory window -- in the future we may reclaim this for MSI. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07sh: Properly wire up channel 2's I/O window on SH7786 PCIe.Paul Mundt1-0/+1
An IORESOURCE_IO was missing here, which meant that we weren't properly establishing the I/O window for this particular slot. With this corrected, cards with I/O BARs have them actually assigned and accessible. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07sh: Ignore 32-bit windows in 29-bit mode for SH7786 PCIe.Paul Mundt1-8/+16
Certain memory windows are only available for 32-bit space, so skip over these in 29-bit mode. This will severely restrict the amount of memory that can be mapped, but since a boot loader bug makes booting in 29-bit mode close to impossible anyways, everything is ok. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07sh: Establish a SuperHyway<->PCIe window mapping on SH7786 PCIe.Paul Mundt1-1/+1
This bumps up the low address to match the physical memory windows for SHway<->PCIe transfers. The previous implementation was banking on a 1:1 virt<->phys SHway mapping, which doesn't apply here. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07sh: Make SH7786 PCIe port reset logic more aggressive.Paul Mundt1-1/+11
This attempts a more complete port reset, building on top of the existing approach. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07sh: Additional register definitions for SH7786 PCIe.Matt Fleming1-2/+54
Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-20Merge branch 'sh/pci-express-integration'Paul Mundt2-21/+36
2010-08-20sh: Relax devfn constraints for SH7786 PCIe.Paul Mundt1-9/+4
SH7786 PCIe has 1 slot per port, but no specific restriction on function. Relax the devfn restriction and look to the slot number instead when configured as a root complex. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-20sh: Fix up SH7786 PCIe PHY initialization.Paul Mundt1-12/+18
This brings the clocking and register setting in line with the somewhat factually ambiguous specification. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-20sh: Support type 1 accesses for SH7786 PCI.Paul Mundt1-7/+21
This enables support for type 1 config space accesses on the SH7786 PCI controller. At the same time, add in some extra sanity checks for controller asserted errors. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-04sh: dma: check return value of create_proc_read_entry()Kulikov Vasiliy1-2/+2
create_proc_read_entry() may fail, if so return -ENOMEM. Signed-off-by: Kulikov Vasiliy <segooon@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-06-23sh: Fix typos in PCI initialization messageMatt Fleming3-3/+3
This typo seems to have been copy and pasted in the PCI initialization code. Replace 'intialization' with 'initialization'. Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-06-07sh: Fix up IORESOURCE_PCI_FIXED usage in pcibios_fixup_device_resources().Paul Mundt1-2/+0
pcibios_fixup_device_resources() presently skips over resources flagged with IORESOURCE_PCI_FIXED, which is a remnant of the old PCI-auto code. The only user for this at present is the Dreamast GAPSPCI code which can't tolerate any adjustments to the BARs, but a combination of the IORESOURCE_PCI_FIXED and zeroed out hose offsets does the right thing for this case already, so we simply kill off the special casing. Reported-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26sh: sh7751 pci controller io port fixMagnus Damm1-2/+3
This patch updates the sh7751 pci code to handle io ports correctly. The code is based on the sh7788x implementation. Tested on a R2D-1 board with CONFIG_8139TOO_PIO=y. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-30include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.hTejun Heo5-0/+5
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-02-26Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds23-473/+911
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (187 commits) sh: remove dead LED code for migo-r and ms7724se sh: ecovec build fix for CONFIG_I2C=n sh: ecovec r-standby support sh: ms7724se r-standby support sh: SH-Mobile R-standby register save/restore clocksource: Fix up a registration/IRQ race in the sh drivers. sh: ms7724: modify scan_timing for KEYSC sh: ms7724: Add sh_sir support sh: mach-ecovec24: Add sh_sir support sh: wire up SET/GET_UNALIGN_CTL. sh: allow alignment fault mode to be configured at kernel boot. sh: sh7724: Update FSI/SPU2 clock sh: always enable sh7724 vpu_clk and set to 166MHz on Ecovec sh: add sh7724 kick callback to clk_div4_table sh: introduce struct clk_div4_table sh: clock-cpg div4 set_rate() shift fix sh: Turn on speculative return for SH7785 and SH7786 sh: Merge legacy and dynamic PMB modes. sh: Use uncached I/O helpers in PMB setup. sh: Provide uncached I/O helpers. ...
2010-02-22resource/PCI: mark struct resource as constDominik Brodowski1-1/+1
Now that we return the new resource start position, there is no need to update "struct resource" inside the align function. Therefore, mark the struct resource as const. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-22resource/PCI: align functions now return start of resourceDominik Brodowski1-3/+3
As suggested by Linus, align functions should return the start of a resource, not void. An update of "res->start" is no longer necessary. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-10sh: Fix up multi-resource mapping for SH7786 PCIe.Paul Mundt2-43/+82
This reworks some of the SH7786 PCIe initialization code to dynamically setup and size the various resource windows, as opposed to the original code that simply wired in a couple of them statically. At the same time, we tidy up the initialization code a bit, kill off some read-only register twiddling that was gleaned from the bus analyzer, and also propagate the physical slot/channel mapping. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08sh: Fix up SH7786 PCI resource definitions.Paul Mundt2-87/+63
This adds in some of the missing memory resources for channels 1/2 and gets the code building again for the recent changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08Merge branch 'sh/dmaengine'Paul Mundt1-1/+4
Conflicts: arch/sh/drivers/dma/dma-sh.c
2010-02-08sh: fix Transfer Size calculation in both DMA driversGuennadi Liakhovetski1-1/+4
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05sh: Fix an off-by-1 in SH7780 PCIC memory resource mapping.Paul Mundt1-5/+5
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-03sh: Fix up early PCI PERR/SERR IRQ handling.Paul Mundt3-26/+78
This adds support for handling early PERR/SERR triggering in between controller registration and the initial bus scan. Buggy cards end up asserting these as soon as the M66EN scan is undertaken, resulting in an early crash. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Improved multi-resource handling for SH7780 PCI.Paul Mundt8-90/+130
The SH7780 PCI controller supports 3 different ranges of PCI memory in addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory windows are supported, while in 32-bit mode all 3 are visible. This attempts to make the resource handling completely dynamic and to permit platforms to map in as many apertures as they can handle. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Hook up ERR/PERR/SERR detection for SH7780 PCI host controllers.Paul Mundt4-29/+306
These were never handled before, so implement some common infrastructure to support them, then make use of that in the SH7780-specific code. In practice there is little here that can not be generalized for SH4 parts, which will be an incremental change as the 7780/7751 code is gradually unified. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Handle PCI controller resource conflicts.Paul Mundt6-15/+11
register_pci_controller() can fail, but presently is a void function. Change this over to an int so that we can bail early before continuing on with post-registration initialization (such as throwing the controller in to 66MHz mode in the case of the SH7780 host controller). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Enable PCI66 support for SH7780 host controller.Paul Mundt4-1/+96
This adds some helper glue for scanning the bus and determining if all of the devices are 66MHz capable or not before flipping on 66MHz mode. This isn't quite to spec, but it's fairly consistent with what other embedded controllers end up having to do. Scanning code cribbed from the MIPS txx9 PCI code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Fix up large system memory handling for SH7780 PCI.Paul Mundt1-6/+28
For systems that have more than 512MB we need to set up an additional mapping, this fixes up the rounding to the next power of two and splits out the mapping accordingly between the two local bus mapping windows. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-30sh: Kill off broken type 1 PCI config access checks.Paul Mundt4-37/+0
The host controllers only support type 1, so there's not much else to test for. Some of the older controllers also supported type 2 accesses, but we've never supported those, and likely never will. Beyond that, the P1SEG test is meaningless for 32-bit mode, so rather than refactoring it, just kill the type 1 test off completely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29sh: support PCI domains.Paul Mundt1-2/+15
Newer SH parts are now commonly shipping with multiple controllers, so we wire up PCI domain support to deal with them. Shamelessly cloned from the MIPS implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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