aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/include/asm/hw_breakpoint.h (follow)
AgeCommit message (Collapse)AuthorFilesLines
2010-05-19Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds1-1/+0
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (127 commits) sh: update defconfigs. sh: Fix up the NUMA build for recent LMB changes. sh64: provide a stub per_cpu_trap_init() definition. sh: fix up CONFIG_KEXEC=n build. sh: fixup the docbook paths for clock framework shuffling. driver core: Early dev_name() depends on slab_is_available(). sh: simplify WARN usage in SH clock driver sh: Check return value of clk_get on ms7724 sh: Check return value of clk_get on ecovec24 sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.c sh: move sh clock.c contents to drivers/sh/clk. sh: move sh asm/clock.h contents to linux/sh_clk.h V2 sh: remove unused clock lookup sh: switch boards to clkdev sh: switch sh4-202 to clkdev sh: switch shx3 to clkdev sh: switch sh7757 to clkdev sh: switch sh7763 to clkdev sh: switch sh7780 to clkdev sh: switch sh7786 to clkdev ...
2010-05-01hw-breakpoints: Get the number of available registers on boot dynamicallyFrederic Weisbecker1-0/+5
The breakpoint generic layer assumes that archs always know in advance the static number of address registers available to host breakpoints through the HBP_NUM macro. However this is not true for every archs. For example Arm needs to get this information dynamically to handle the compatiblity between different versions. To solve this, this patch proposes to drop the static HBP_NUM macro and let the arch provide the number of available slots through a new hw_breakpoint_slots() function. For archs that have CONFIG_HAVE_MIXED_BREAKPOINTS_REGS selected, it will be called once as the number of registers fits for instruction and data breakpoints together. For the others it will be called first to get the number of instruction breakpoint registers and another time to get the data breakpoint registers, the targeted type is given as a parameter of hw_breakpoint_slots(). Reported-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: K. Prasad <prasad@linux.vnet.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Ingo Molnar <mingo@elte.hu>
2010-05-01hw-breakpoints: Change/Enforce some breakpoints policiesFrederic Weisbecker1-3/+2
The current policies of breakpoints in x86 and SH are the following: - task bound breakpoints can only break on userspace addresses - cpu wide breakpoints can only break on kernel addresses The former rule prevents ptrace breakpoints to be set to trigger on kernel addresses, which is good. But as a side effect, we can't breakpoint on kernel addresses for task bound breakpoints. The latter rule simply makes no sense, there is no reason why we can't set breakpoints on userspace while performing cpu bound profiles. We want the following new policies: - task bound breakpoint can set userspace address breakpoints, with no particular privilege required. - task bound breakpoints can set kernelspace address breakpoints but must be privileged to do that. - cpu bound breakpoints can do what they want as they are privileged already. To implement these new policies, this patch checks if we are dealing with a kernel address breakpoint, if so and if the exclude_kernel parameter is set, we tell the user that the breakpoint is invalid, which makes a good generic ptrace protection. If we don't have exclude_kernel, ensure the user has the right privileges as kernel breakpoints are quite sensitive (risk of trap recursion attacks and global performance impacts). [ Paul Mundt: keep addr space check for sh signal delivery and fix double function declaration] Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: K. Prasad <prasad@linux.vnet.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-21sh: hw-breakpoints: Kill off stub unthrottle callback.Paul Mundt1-1/+0
This follows the x86 change and kills off the unthrottle stub. As the x86 change killed off the generic callback it isn't used anymore anyways. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-30sh: Fix up asm/hw_breakpoint.h header check.Paul Mundt1-3/+3
Presently headers_check complains about linux/kdebug.h being unexported, so just bump the __KERNEL__ ifdef up, as per the x86 change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05sh: Abstracted SH-4A UBC support on hw-breakpoint core.Paul Mundt1-4/+18
This is the next big chunk of hw_breakpoint support. This decouples the SH-4A support from the core and moves it out in to its own stub, following many of the conventions established with the perf events layering. In addition to extending SH-4A support to encapsulate the remainder of the UBC channels, clock framework support for handling the UBC interface clock is added as well, allowing for dynamic clock gating. This also fixes up a regression introduced by the SIGTRAP handling that broke the ksym_tracer, to the extent that the current support works well with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will follow in turn. With this in place, the remaining UBC variants (SH-2A and SH-4) can now be trivially plugged in. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-08sh: hw-breakpoints: Add preliminary support for SH-4A UBC.Paul Mundt1-0/+53
This adds preliminary support for the SH-4A UBC to the hw-breakpoints API. Presently only a single channel is implemented, and the ptrace interface still needs to be converted. This is the first step to cleaning up the long-standing UBC mess, making the UBC more generally accessible, and finally making it SMP safe. An additional abstraction will be layered on top of this as with the perf events code to permit the various CPU families to wire up support for their own specific UBCs, as many variations exist. Signed-off-by: Paul Mundt <lethal@linux-sh.org>