aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/include/asm/page.h (follow)
AgeCommit message (Collapse)AuthorFilesLines
2009-08-16sh: Convert cache disabled SH-5 over to new cache interface.Paul Mundt1-8/+0
The caches enabled case needs more work, but is presently broken regardless, so this can be done incrementally. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-08-15sh: rework nommu for generic cache.c use.Paul Mundt1-6/+1
This does a bit of reorganizing for allowing nommu to use the new and generic cache.c, no functional changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-07-27sh: Use the now generic SH-4 clear/copy page ops for all MMU platforms.Paul Mundt1-5/+6
Now that the SH-4 page clear/copy ops are generic, they can be used for all platforms with CONFIG_MMU=y. SH-5 remains the odd one out, but it too will gradually be converted over to using this interface. SH-3 platforms which do not contain aliases will see no impact from this change, while aliasing SH-3 platforms will get the same interface as SH-4. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-07-27sh: wire up clear_user_highpage() for sh4, convert sh7705.Paul Mundt1-4/+8
This wires up clear_user_highpage() on SH-4 and subsequently converts the SH7705 32kB cache mode over to using it. Now that the SH-4 implementation handles all of the dcache purging directly in the aliasing case, there is no need to do this in the default clear_page() implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-07-22sh: Migrate from PG_mapped to PG_dcache_dirty.Paul Mundt1-0/+6
This inverts the delayed dcache flush a bit to be more in line with other platforms. At the same time this also gives us the ability to do some more optimizations and cleanup. Now that the update_mmu_cache() callsite only tests for the bit, the implementation can gradually be split out and made generic, rather than relying on special implementations for each of the peculiar CPU types. SH7705 in 32kB mode and SH-4 still need slightly different handling, but this is something that can remain isolated in the varying page copy/clear routines. On top of that, SH-X3 is dcache coherent, so there is no need to bother with any of these tests in the PTEAEX version of update_mmu_cache(), so we kill that off too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-06-11asm-generic: rename page.h and uaccess.hArnd Bergmann1-1/+1
The current asm-generic/page.h only contains the get_order function, and asm-generic/uaccess.h only implements unaligned accesses. This renames the file to getorder.h and uaccess-unaligned.h to make room for new page.h and uaccess.h file that will be usable by all simple (e.g. nommu) architectures. Signed-off-by: Remis Lima Baima <remis.developer@googlemail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2009-03-10sh: Support fixed 32-bit PMB mappings from bootloader.Yoshihiro Shimoda1-1/+6
This provides a method for supporting fixed PMB mappings inherited from the bootloader, as an alternative to the dynamic PMB mapping currently used by the kernel. In the future these methods will be combined. P1/P2 area is handled like a regular 29-bit physical address, and local bus device are assigned P3 area addresses. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-09-12sh: ioremap_prot support.Paul Mundt1-0/+2
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-29sh: migrate to arch/sh/include/Paul Mundt1-0/+183
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>