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2010-01-12sh: Move start_thread() out of line.Paul Mundt1-11/+2
start_thread() will become a bit heavier with the xstate freeing to be added in, so move it out-of-line in preparation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12sh: Split out the unaligned counters and user bits.Paul Mundt1-0/+21
This splits out the unaligned access counters and userspace bits in to their own generic interface, which will allow them to be wired up on sh64 too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12sh: Consolidate the sh_bios earlyprintk code.Paul Mundt1-1/+0
Now that the sh-sci earlyprintk is taken care of by the sh-sci driver directly, there's no longer any reason for having a split-out early_printk framework. sh_bios is the only other thing that uses it, so we just migrate the leftovers in to there. As it's possible to have multiple early_param()'s for the same string, there's not much point in having this split out anymore anyways, particularly since the sh_bios dependencies are still special-cased within sh-sci itself. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12sh: Kill off more unused sh_bios callbacks.Paul Mundt1-1/+0
sh_bios_char_out() is not used by anything in-tree these days, so just get rid of it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-12sh: Tidy up the sh bios VBR handling.Paul Mundt1-2/+12
This moves the VBR handling out of the main trap handling code and in to the sh-bios helper code. A couple of accessors are added in order to permit other kernel code to get at the VBR value for state save/restore paths. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-08sh: consolidate atomic_cmpxchg()/atomic_add_unless() definitions.Paul Mundt3-116/+28
The LL/SC and IRQ versions were using generic stubs while the GRB version was just reimplementing what it already had for the standard cmpxchg() code. As we have optimized cmpxchg() implementations that are decoupled from the atomic code, simply falling back on the generic wrapper does the right thing. With this in place the GRB case is unaffected while the LL/SC case gets to use its optimized cmpxchg(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-06Merge branch 'master' into sh/hw-breakpointsPaul Mundt7-91/+21
2010-01-05sh: Reclaim TIF_DEBUG.Paul Mundt1-2/+0
This was used by the old hw-breakpoints API, but now there is nothing is using it anymore, so just kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05sh: Kill off dead UBC headers.Paul Mundt1-70/+0
Nothing is using these now, so kill them all off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05sh: Abstracted SH-4A UBC support on hw-breakpoint core.Paul Mundt2-6/+20
This is the next big chunk of hw_breakpoint support. This decouples the SH-4A support from the core and moves it out in to its own stub, following many of the conventions established with the perf events layering. In addition to extending SH-4A support to encapsulate the remainder of the UBC channels, clock framework support for handling the UBC interface clock is added as well, allowing for dynamic clock gating. This also fixes up a regression introduced by the SIGTRAP handling that broke the ksym_tracer, to the extent that the current support works well with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will follow in turn. With this in place, the remaining UBC variants (SH-2A and SH-4) can now be trivially plugged in. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05sh: Drop down to a single quicklist.Paul Mundt1-1/+1
We previously had 2 quicklists, one for the PGD case and one for PTEs. Now that the PGD/PMD cases are handled through slab caches due to the multi-level configurability, only the PTE quicklist remains. As such, reduce NR_QUICK to its appropriate size and bump down the PTE quicklist index. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-05Merge branch 'sh/pgtable' of git://github.com/mfleming/linux-2.6Paul Mundt6-90/+10
2010-01-04Merge branch 'sh/stable-updates'Paul Mundt1-0/+10
2010-01-02sh: Move page table allocation out of lineMatt Fleming4-77/+8
We also switched away from quicklists and instead moved to slab caches. After benchmarking both implementations the difference is negligible. The slab caches suit us better though because the size of a pgd table is just 4 entries when we're using a 3-level page table layout and quicklists always deal with pages. Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-01-02sh: Correct the PTRS_PER_PMD and PMD_SHIFT valuesMatt Fleming1-2/+2
The previous expressions were wrong which made free_pmd_range() explode when using anything other than 4KB pages (which is why 8KB and 64KB pages were disabled with the 3-level page table layout). The problem was that pmd_offset() was returning an index of non-zero when it should have been returning 0. This non-zero offset was used to calculate the address of the pmd table to free in free_pmd_range(), which ended up trying to free an object that was not aligned on a page boundary. Now 3-level page tables should work with 4KB, 8KB and 64KB pages. Signed-off-by: Matt Fleming <matt@console-pimps.org>
2009-12-31sh: Remove unused functionsMatt Fleming1-11/+0
Apply some TLC to the SH64 header files and remove some functions that are not used anymore. Signed-off-by: Matt Fleming <matt@console-pimps.org>
2009-12-29sh: Only provide a PCLK definition for legacy CPG CPUs.Paul Mundt1-0/+10
As CPUs are migrated over to more fully-featured clock frameworks of their own and off of the legacy CPG code, they no longer have any real need for defining the PCLK value. The PCLK define in itself is already fairly misleading, as many boards get their input clocks from different sources, making this value fairly arbitrary anyways. Outside of the legacy CPG clock framework, the only place where this value is used is for deriving CLOCK_TICK_RATE, which we set back to the legacy PIT value that it was before the PCLK definitions were added in the first place. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-28sh: Convert ptrace to hw_breakpoint API.Paul Mundt1-0/+6
This is the initial step for converting singlestep handling via ptrace over to hw_breakpoints. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-24Merge branch 'sh/g3-prep' into sh/for-2.6.33Paul Mundt3-2/+2
2009-12-21Merge branch 'master' into sh/hw-breakpointsPaul Mundt19-82/+217
2009-12-21Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6Paul Mundt3-2/+2
2009-12-17Merge branch 'for-33' of git://repo.or.cz/linux-kbuildLinus Torvalds3-2/+2
* 'for-33' of git://repo.or.cz/linux-kbuild: (29 commits) net: fix for utsrelease.h moving to generated gen_init_cpio: fixed fwrite warning kbuild: fix make clean after mismerge kbuild: generate modules.builtin genksyms: properly consider EXPORT_UNUSED_SYMBOL{,_GPL}() score: add asm/asm-offsets.h wrapper unifdef: update to upstream revision 1.190 kbuild: specify absolute paths for cscope kbuild: create include/generated in silentoldconfig scripts/package: deb-pkg: use fakeroot if available scripts/package: add KBUILD_PKG_ROOTCMD variable scripts/package: tar-pkg: use tar --owner=root Kbuild: clean up marker net: add net_tstamp.h to headers_install kbuild: move utsrelease.h to include/generated kbuild: move autoconf.h to include/generated drop explicit include of autoconf.h kbuild: move compile.h to include/generated kbuild: drop include/asm kbuild: do not check for include/asm-$ARCH ... Fixed non-conflicting clean merge of modpost.c as per comments from Stephen Rothwell (modpost.c had grown an include of linux/autoconf.h that needed to be changed to generated/autoconf.h)
2009-12-17sh: Definitions for 3-level page table layoutMatt Fleming4-0/+104
If using 64-bit PTEs and 4K pages then each page table has 512 entries (as opposed to 1024 entries with 32-bit PTEs). Unlike MIPS, SH follows the convention that all structures in the page table (pgd_t, pmd_t, pgprot_t, etc) must be the same size. Therefore, 64-bit PTEs require 64-bit PGD entries, etc. Using 2-levels of page tables and 64-bit PTEs it is only possible to map 1GB of virtual address space. In order to map all 4GB of virtual address space we need to adopt a 3-level page table layout. This actually works out better for CONFIG_SUPERH32 because we only waste 2 PGD entries on the P1 and P2 areas (which are untranslated) instead of 256. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17sh: Abstract the number of page table levelsMatt Fleming4-38/+56
Keep the dimensions of the page tables in a separate header file in preparation for allowing a three level page table structure. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-17sh: Fix up MAX_DMA_CHANNELS definition when DMA is disabled.Paul Mundt1-2/+4
MAX_DMA_CHANNELS is tested for the total number of channels in order to populate an IRQ map. Stub this out completely when no DMA support is enabled -- as used to be the default behaviour before this was generalized for use by the dmaengine code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds4-6/+16
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (33 commits) sh: Fix test of unsigned in se7722_irq_demux() sh: mach-ecovec24: Add FSI sound support sh: mach-ecovec24: Add mt9t112 camera support sh: mach-ecovec24: Add tw9910 support sh: MSIOF/mmc_spi platform data for the Ecovec24 board sh: ms7724se: Add ak4642 support sh: Fix up FPU build for SH5 sh: Remove old early serial console code V2 sh: sh5 scif pdata (sh5-101/sh5-103) sh: sh4a scif pdata (sh7757/sh7763/sh7770/sh7780/sh7785/sh7786/x3) sh: sh4a scif pdata (sh7343/sh7366/sh7722/sh7723/sh7724) sh: sh4 scif pdata (sh7750/sh7760/sh4-202) sh: sh3 scif pdata (sh7705/sh770x/sh7710/sh7720) sh: sh2a scif pdata (sh7201/sh7203/sh7206/mxg) sh: sh2 scif pdata (sh7616) sh-sci: Extend sh-sci driver with early console V2 sh: Stub in P3 ioremap support for nommu parts. sh: wire up vmallocinfo support in ioremap() implementations. sh: Make the unaligned trap handler always obey notification levels. sh: Couple kernel and user write page perm bits for CONFIG_X2TLB ...
2009-12-16elf: kill USE_ELF_CORE_DUMPChristoph Hellwig1-1/+0
Currently all architectures but microblaze unconditionally define USE_ELF_CORE_DUMP. The microblaze omission seems like an error to me, so let's kill this ifdef and make sure we are the same everywhere. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Hugh Dickins <hugh.dickins@tiscali.co.uk> Cc: <linux-arch@vger.kernel.org> Cc: Michal Simek <michal.simek@petalogix.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-12-14locking: Convert raw_rwlock functions to arch_rwlockThomas Gleixner1-16/+16
Name space cleanup for rwlock functions. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
2009-12-14locking: Convert raw_rwlock to arch_rwlockThomas Gleixner2-8/+8
Not strictly necessary for -rt as -rt does not have non sleeping rwlocks, but it's odd to not have a consistent naming convention. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
2009-12-14locking: Convert __raw_spin* functions to arch_spin*Thomas Gleixner1-13/+13
Name space cleanup. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
2009-12-14locking: Rename __RAW_SPIN_LOCK_UNLOCKED to __ARCH_SPIN_LOCK_UNLOCKEDThomas Gleixner1-1/+1
Further name space cleanup. No functional change Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
2009-12-14locking: Convert raw_spinlock to arch_spinlockThomas Gleixner2-4/+4
The raw_spin* namespace was taken by lockdep for the architecture specific implementations. raw_spin_* would be the ideal name space for the spinlocks which are not converted to sleeping locks in preempt-rt. Linus suggested to convert the raw_ to arch_ locks and cleanup the name space instead of using an artifical name like core_spin, atomic_spin or whatever No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
2009-12-14sh: Stub in P3 ioremap support for nommu parts.Paul Mundt1-0/+1
p3_ioremap() references __ioremap() which is presently undefined on nommu. This provides a trivial stub to fix the build up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-14sh: wire up vmallocinfo support in ioremap() implementations.Paul Mundt1-2/+8
This wires up the caller information for the ioremap VMA, which allows for more helpful caller tracking via /proc/vmallocinfo. Follows the x86 and powerpc changes of the same nature. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-14sh: Couple kernel and user write page perm bits for CONFIG_X2TLBMatt Fleming1-2/+3
pte_write() should check whether the permissions include either the user or kernel write permission bits. Likewise, pte_wrprotect() needs to remove both the kernel and user write bits. Without this patch handle_tlbmiss() doesn't handle faulting in pages from the P3 area (our vmalloc space) because of a write. Mappings of the P3 space have the _PAGE_EXT_KERN_WRITE bit but not _PAGE_EXT_USER_WRITE. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-12sh: move machtypes.h to include/generatedSam Ravnborg2-2/+1
Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Michal Marek <mmarek@suse.cz>
2009-12-12kbuild: move asm-offsets.h to include/generatedSam Ravnborg1-0/+1
The simplest method was to add an extra asm-offsets.h file in arch/$ARCH/include/asm that references the generated file. We can now migrate the architectures one-by-one to reference the generated file direct - and when done we can delete the temporary arch/$ARCH/include/asm/asm-offsets.h file. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Michal Marek <mmarek@suse.cz>
2009-12-11sh: Wire up recvmmsg syscall.Paul Mundt2-2/+4
The stub already existed in the _64 syscall table, but was lacking a __NR_recvmmsg definition, while it was absent entirely for _32 variants. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-09Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds31-576/+445
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (137 commits) sh: include empty zero page in romImage sh: Make associative cache writes fatal on all SH-4A parts. sh: Drop associative writes for SH-4 cache flushes. sh: Partial revert of copy/clear_user_highpage() optimizations. sh: Add default uImage rule for se7724, ap325rxa, and migor. sh: allow runtime pm without suspend/resume callbacks sh: mach-ecovec24: Remove un-defined settings for VPU sh: mach-ecovec24: LCDC drive ability become high sh: fix sh7724 VEU3F resource size serial: sh-sci: Fix too early port disabling. sh: pfc: pr_info() -> pr_debug() cleanups. sh: pfc: Convert from ctrl_xxx() to __raw_xxx() I/O routines. sh: Improve kfr2r09 serial port setup code sh: Break out SuperH PFC code sh: Move KEYSC header file sh: convert /proc/cpu/aligmnent, /proc/cpu/kernel_alignment to seq_file sh: Add CPG save/restore code for sh7724 R-standby sh: Add SDHI power control support to Ecovec mfd: Add power control platform data to SDHI driver sh: mach-ecovec24: modify address map ...
2009-12-08Merge branch 'for-2.6.33' of git://git.kernel.dk/linux-2.6-blockLinus Torvalds1-0/+1
* 'for-2.6.33' of git://git.kernel.dk/linux-2.6-block: (113 commits) cfq-iosched: Do not access cfqq after freeing it block: include linux/err.h to use ERR_PTR cfq-iosched: use call_rcu() instead of doing grace period stall on queue exit blkio: Allow CFQ group IO scheduling even when CFQ is a module blkio: Implement dynamic io controlling policy registration blkio: Export some symbols from blkio as its user CFQ can be a module block: Fix io_context leak after failure of clone with CLONE_IO block: Fix io_context leak after clone with CLONE_IO cfq-iosched: make nonrot check logic consistent io controller: quick fix for blk-cgroup and modular CFQ cfq-iosched: move IO controller declerations to a header file cfq-iosched: fix compile problem with !CONFIG_CGROUP blkio: Documentation blkio: Wait on sync-noidle queue even if rq_noidle = 1 blkio: Implement group_isolation tunable blkio: Determine async workload length based on total number of queues blkio: Wait for cfq queue to get backlogged if group is empty blkio: Propagate cgroup weight updation to cfq groups blkio: Drop the reference to queue once the task changes cgroup blkio: Provide some isolation between groups ...
2009-12-08Merge branch 'master' into sh/hw-breakpointsPaul Mundt31-576/+445
Conflict between FPU thread flag migration and debug thread flag addition. Conflicts: arch/sh/include/asm/thread_info.h arch/sh/include/asm/ubc.h arch/sh/kernel/process_32.c
2009-12-08sh: hw-breakpoints: Add preliminary support for SH-4A UBC.Paul Mundt7-9/+70
This adds preliminary support for the SH-4A UBC to the hw-breakpoints API. Presently only a single channel is implemented, and the ptrace interface still needs to be converted. This is the first step to cleaning up the long-standing UBC mess, making the UBC more generally accessible, and finally making it SMP safe. An additional abstraction will be layered on top of this as with the perf events code to permit the various CPU families to wire up support for their own specific UBCs, as many variations exist. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-03Merge branch 'master' into for-2.6.33Jens Axboe1-1/+1
2009-11-30sh: Break out SuperH PFC codeMagnus Damm1-81/+1
This file breaks out the SuperH PFC code from arch/sh/kernel/gpio.c + arch/sh/include/asm/gpio.h to drivers/sh/pfc.c + include/linux/sh_pfc.h. Similar to the INTC stuff. The non-SuperH specific file location makes it possible to share the code between multiple architectures. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30sh: Move KEYSC header fileMagnus Damm1-14/+0
This patch moves the KEYSC header file from the SuperH specific asm directory to a place where it can be shared by multiple architectures. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-26block: add helpers to run flush_dcache_page() against a bio and a request's pagesIlya Loginov1-0/+1
Mtdblock driver doesn't call flush_dcache_page for pages in request. So, this causes problems on architectures where the icache doesn't fill from the dcache or with dcache aliases. The patch fixes this. The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid pointless empty cache-thrashing loops on architectures for which flush_dcache_page() is a no-op. Every architecture was provided with this flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is equal 1 or do nothing otherwise. See "fix mtd_blkdevs problem with caches on some architectures" discussion on LKML for more information. Signed-off-by: Ilya Loginov <isloginov@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Peter Horton <phorton@bitbox.co.uk> Cc: "Ed L. Cashin" <ecashin@coraid.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2009-11-25sh: Fix up the FPU emulation build.Paul Mundt1-0/+1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24sh: Minor optimisations to FPU handlingStuart Menefy3-14/+19
A number of small optimisations to FPU handling, in particular: - move the task USEDFPU flag from the thread_info flags field (which is accessed asynchronously to the thread) to a new status field, which is only accessed by the thread itself. This allows locking to be removed in most cases, or can be reduced to a preempt_lock(). This mimics the i386 behaviour. - move the modification of regs->sr and thread_info->status flags out of save_fpu() to __unlazy_fpu(). This gives the compiler a better chance to optimise things, as well as making save_fpu() symmetrical with restore_fpu() and init_fpu(). - implement prepare_to_copy(), so that when creating a thread, we can unlazy the FPU prior to copying the thread data structures. Also make sure that the FPU is disabled while in the kernel, in particular while booting, and for newly created kernel threads, In a very artificial benchmark, the execution time for 2500000 context switches was reduced from 50 to 45 seconds. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24sh: Improve performance of SH4 versions of copy/clear_user_highpageStuart Menefy1-1/+7
The previous implementation of clear_user_highpage and copy_user_highpage checked to see if there was a D-cache aliasing issue between the user and kernel mappings of a page, but if there was they always did a flush with writeback on the dirtied kernel alias. However as we now have the ability to map a page into kernel space with the same cache colour as the user mapping, there is no need to write back this data. Currently we also invalidate the kernel alias as a precaution, however I'm not sure if this is actually required. Also correct the definition of FIX_CMAP_END so that the mappings created by kmap_coherent() are actually at the correct colour. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24Merge branch 'master' into sh/st-integrationPaul Mundt27-469/+417