aboutsummaryrefslogtreecommitdiffstats
path: root/arch (follow)
AgeCommit message (Expand)AuthorFilesLines
2017-09-01powerpc/powernv/npu: Move tlb flush before launching ATSDAlistair Popple1-6/+6
2017-09-01powerpc/iommu: Use permission-specific DEVICE_ATTR variantsJulia Lawall1-2/+1
2017-09-01powerpc/eeh: Delete an error out of memory message at init timeMarkus Elfring1-4/+1
2017-09-01powerpc/mm: Use seq_putc() in two functionsMarkus Elfring2-2/+2
2017-09-01crypto/nx: Add P9 NX specific error codes for 842 engineHaren Myneni1-0/+3
2017-09-01powerpc/32: remove a NOP from memset()Christophe Leroy2-3/+11
2017-09-01powerpc/32: optimise memset()Christophe Leroy1-7/+14
2017-09-01powerpc: fix location of two EXPORT_SYMBOLChristophe Leroy2-2/+2
2017-09-01powerpc/32: add memset16()Christophe Leroy2-1/+17
2017-09-01powerpc: Wrap register number correctly for string load/store instructionsPaul Mackerras1-2/+4
2017-09-01powerpc: Emulate load/store floating point as integer word instructionsPaul Mackerras2-17/+48
2017-09-01powerpc: Use instruction emulation infrastructure to handle alignment faultsPaul Mackerras3-777/+34
2017-09-01powerpc: Separate out load/store emulation into its own functionPaul Mackerras2-113/+154
2017-09-01powerpc: Handle opposite-endian processes in emulation codePaul Mackerras2-60/+131
2017-09-01powerpc: Set regs->dar if memory access fails in emulate_step()Paul Mackerras1-22/+52
2017-09-01powerpc: Emulate the dcbz instructionPaul Mackerras2-0/+34
2017-09-01powerpc: Emulate load/store floating double pair instructionsPaul Mackerras1-16/+52
2017-09-01powerpc: Emulate vector element load/store instructionsPaul Mackerras1-2/+36
2017-09-01powerpc: Emulate FP/vector/VSX loads/stores correctly when regs not livePaul Mackerras3-267/+203
2017-09-01powerpc: Make load/store emulation use larger memory accessesPaul Mackerras1-129/+106
2017-09-01powerpc: Add emulation for the addpcis instructionPaul Mackerras1-3/+11
2017-09-01powerpc: Don't update CR0 in emulation of popcnt, prty, bpermd instructionsPaul Mackerras1-6/+6
2017-09-01powerpc: Fix emulation of the isel instructionPaul Mackerras1-8/+10
2017-09-01powerpc/64: Fix update forms of loads and stores to write 64-bit EAPaul Mackerras2-55/+58
2017-09-01powerpc: Handle most loads and stores in instruction emulation codePaul Mackerras6-62/+710
2017-09-01powerpc: Don't check MSR FP/VMX/VSX enable bits in analyse_instr()Paul Mackerras1-42/+12
2017-09-01powerpc: Change analyse_instr so it doesn't modify *regsPaul Mackerras2-257/+396
2017-08-31KVM: update to new mmu_notifier semantic v2Jérôme Glisse6-35/+0
2017-08-31powerpc/powernv: update to new mmu_notifier semanticJérôme Glisse1-10/+0
2017-08-31binfmt_flat: fix arch/m32r and arch/microblaze flat_put_addr_at_rp()Randy Dunlap2-2/+3
2017-08-31teach SYSCALL_DEFINE/COMPAT_SYSCALL_DEFINE to handle __bitwise argumentsAl Viro1-2/+3
2017-08-31x86/xen: Get rid of paravirt op adjust_exception_frameJuergen Gross12-77/+133
2017-08-31x86/eisa: Add missing includeThomas Gleixner1-0/+1
2017-08-31x86: bpf_jit: small optimization in emit_bpf_tail_call()Eric Dumazet1-5/+4
2017-08-31Merge tag 'irqchip-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/coreThomas Gleixner5-10/+82
2017-08-31arm64: dts: ls1046a: Add MSI dts nodeMinghuan Lian1-0/+31
2017-08-31arm64: dts: ls1043a: Share all MSIsMinghuan Lian1-3/+3
2017-08-31arm: dts: ls1021a: Share all MSIsMinghuan Lian1-2/+2
2017-08-31arm64: dts: ls1043a: Fix typo of MSI compatible stringMinghuan Lian1-3/+3
2017-08-31arm: dts: ls1021a: Fix typo of MSI compatible stringMinghuan Lian1-2/+2
2017-08-31irqchip/gic-v3-its: Add VPE interrupt maskingMarc Zyngier2-0/+8
2017-08-31irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessorsMarc Zyngier2-0/+33
2017-08-31x86/idt: Remove superfluous ALIGNmentJiri Slaby1-1/+1
2017-08-31xen/mmu: set MMU_NORMAL_PT_UPDATE in remap_area_mfn_pte_fnWei Liu1-1/+1
2017-08-31xen: remove unused function xen_set_domain_pte()Juergen Gross2-22/+0
2017-08-31xen: remove tests for pvh mode in pure pv pathsJuergen Gross3-31/+2
2017-08-31tracing/hyper-v: Trace hyperv_mmu_flush_tlb_others()Vitaly Kuznetsov2-0/+47
2017-08-31x86/hyper-v: Support extended CPU ranges for TLB flush hypercallsVitaly Kuznetsov2-3/+140
2017-08-31Merge branch 'x86/mm' into x86/platform, to pick up TLB flush dependencyIngo Molnar185-822/+3423
2017-08-31powerpc: Correct instruction code for xxlor instructionPaul Mackerras1-1/+1
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.