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2018-08-14ACPICA: ACPICA: add status check for acpi_hw_read before assigning return valueErik Schmauss1-2/+7
The value coming from acpi_hw_read() should not be used if it returns an error code, so check the status returned by it before using that value in two places in acpi_hw_register_read(). Reported-by: Mark Gross <mark.gross@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> [ rjw: Changelog ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-05-10ACPICA: Convert acpi_gbl_hardware lock back to an acpi_raw_spinlockSteven Rostedt1-2/+2
We hit the following bug with -RT: |BUG: scheduling while atomic: swapper/7/0/0x00000002 |Pid: 0, comm: swapper/7 Not tainted 3.6.11-rt28.19.el6rt.x86_64.debug #1 |Call Trace: | rt_spin_lock+0x16/0x40 | __schedule_bug+0x67/0x90 | __schedule+0x793/0x7a0 | acpi_os_acquire_lock+0x1f/0x23 | acpi_write_bit_register+0x33/0xb0 | rt_spin_lock_slowlock+0xe5/0x2f0 | acpi_idle_enter_bm+0x8a/0x28e … As the acpi code disables interrupts in acpi_idle_enter_bm, and calls code that grabs the acpi lock, it causes issues as the lock is currently in RT a sleeping lock. The lock was converted from a raw to a sleeping lock due to some previous issues, and tests that showed it didn't seem to matter. Unfortunately, it did matter for one of our boxes. This patch converts the lock back to a raw lock. I've run this code on a few of my own machines, one being my laptop that uses the acpi quite extensively. I've been able to suspend and resume without issues. [ tglx: Made the change exclusive for acpi_gbl_hardware_lock ] Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Link: http://lkml.kernel.org/r/1360765565.23152.5.camel@gandalf.local.home Signed-off-by: Thomas Gleixner <tglx@linutronix.de> [bigeasy: shorten the backtrace, use the type acpi_raw_spinlock incl. accessor] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-03-18ACPICA: adding SPDX headersErik Schmauss1-37/+1
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-06ACPICA: All acpica: Update copyrights to 2018Bob Moore1-1/+1
including tool signons. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-10-04ACPICA: Hardware: Enable 64-bit support of hardware accessesLv Zheng1-33/+39
ACPICA commit 6b0a604d171334f61a18bc92b44ec0437b11bf98 This patch enable 64-bit support for acpi_hw_read()/acpi_hw_write() and then convert acpi_read()/acpi_write() to invoke them. BZ 1287, fixed by Lv Zheng. Link: https://github.com/acpica/acpica/commit/6b0a604d1713 Link: https://bugs.acpica.org/show_bug.cgi?id=1287 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-08-03ACPICA: Divergences: reduce access size definitionsLv Zheng1-1/+1
ACPICA commit cf27b3c98883d2a15d932016792fcb8272ace96d The following commit introduces definition of access width to ACPICA. Commit: 2bece49394872d36bbc5767fd643deac05920c55 Subject: ACPI: SPCR: Use access width to determine mmio usage Actually the access bit width can be calculated via access width. It would be better to define a macro calculating bit width rather than defining fixed values. This patch thus cleans up the definitions to reduce divergences. Link: https://github.com/acpica/acpica/commit/cf27b3c9 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-02-09ACPICA: Source tree: Update copyright notices to 2017Bob Moore1-1/+1
ACPICA commit 16577e5265923f4999b4d2c0addb2343b18135e1 Affects all files. Link: https://github.com/acpica/acpica/commit/16577e52 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-01-02ACPICA: Hardware: Sort access bit width algorithmLv Zheng1-22/+57
ACPICA commit 365b321a31cb701957c055cae2d2161577147252 GAS can be in register or register region format, so we need to improve our "register" format detection code in order not to regress. Such detection may be still experimental, and is generated according to the current known facts. Link: https://github.com/acpica/acpica/commit/365b321a Link: https://bugzilla.kernel.org/show_bug.cgi?id=151501 Reported-and-tested-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-01-02ACPICA: Hardware: Add access_width/bit_offset support in acpi_hw_write()Lv Zheng1-9/+53
ACPICA commit 1ecab20bbe69a176dfb6da7210fe77aa6b3ad680 This patch adds access_width/bit_offset support in acpi_hw_write(). Link: https://github.com/acpica/acpica/commit/1ecab20b Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-01-02ACPICA: Hardware: Remove bit_offset masking supportLv Zheng1-14/+0
ACPICA commit bc7c5291865e099ce01f345d0265f0eba6997e23 This linuxized ACPICA commit is a back port result of the following Linux commit: Commit c3bc26d4b4e36f0dc458eea8b1f722d8a8d9addd Subject: ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read() The commit was in ACPICA and Linux upstream, after reversion and re-integration, it is designed not to do bit_offset masking (bit_offset is only used to determine the boundary of the register) inside of the ACPICA APIs, but let the callers to do that as: 1. Register can have different masking schemes (W1C, W0C); 2. Normally a mask value will be provided for region format GAS. So actually the callers are the only ones having the knowledge of masking the register values. Suggested by Bob Moore, Fixed by Lv Zheng. Link: https://github.com/acpica/acpica/commit/bc7c5291 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-06-15Revert "ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()"Rafael J. Wysocki1-137/+9
Revert commit 66b1ed5aa8dd "ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()" that is reported to break suspend-to-RAM (ACPI S3) on one system. The root cause of the failure is a wrong access width value for one of the involved registers provided by the ACPI tables, but before commit 66b1ed5aa8dd that value was not taken into account at all and things worked. Fixes: 66b1ed5aa8dd "ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()" Reported-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-06-01ACPICA / Hardware: Fix old register check in acpi_hw_get_access_bit_width()Lv Zheng1-14/+9
The address check in acpi_hw_get_access_bit_width() should be byte width based, not bit width based. This patch fixes this mistake. For those who want to review acpi_hw_access_bit_width(), here is the concerns and the design details of the function: It is supposed that the GAS Address field should be aligned to the byte width indicated by the GAS AccessSize field. Similarly, for the old non GAS register, it is supposed that its Address should be aligned to its Length. For the "AccessSize = 0 (meaning ANY)" case, we try to return the maximum instruction width (64 for MMIO or 32 for PIO) or the user expected access bit width (64 for acpi_read()/acpi_write() or 32 for acpi_hw_read()/ acpi_hw_write()) and it is supposed that the GAS Address field should always be aligned to the maximum expected access bit width (otherwise it can't be accessed using ANY access bit width). The problem is in acpi_tb_init_generic_address(), where the non GAS register's Length is converted into the GAS BitWidth field, its Address is converted into the GAS Address field, and the GAS AccessSize field is left 0 but most of the registers actually cannot be accessed using "ANY" accesses. As a conclusion, when AccessSize = 0 (ANY), the Address should either be aligned to the BitWidth (wrong conversion) or aligned to 32 for PIO or 64 for MMIO (real GAS). Since currently, max_bit_width is 32, then: 1. BitWidth for the wrong conversion is 8,16,32; and 2. The Address of the real GAS should always be aligned to 8,16,32. The address alignment check to exclude false matched real GAS is not necessary. Thus this patch fixes the issue by removing the address alignment check. On the other hand, we in fact could use a simpler check of "reg->bit_width < max_bit_width" to exclude the "BitWidth=64 PIO" case that may be issued from acpi_read()/acpi_write() in the future. Fixes: b314a172ee96 (ACPICA: Hardware: Add optimized access bit width support) Reported-and-tested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Acked-by: Mike Marshall <hubcap@omnibond.com> Suggested-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-05-05ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support for acpi_hw_write()Lv Zheng1-9/+137
ACPICA commit 48eea5e7993ccb7189bd63cd726e02adafee6057 This patch adds access_width/bit_offset support in acpi_hw_write(). Lv Zheng. Link: https://github.com/acpica/acpica/commit/48eea5e7 Link: https://bugs.acpica.org/show_bug.cgi?id=1240 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-05-05ACPICA: ACPI 2.0, Hardware: Add access_width/bit_offset support in acpi_hw_read()Lv Zheng1-13/+62
ACPICA commit 96ece052d4d073aae4f935f0ff0746646aea1174 ACPICA commit 3d8583a054e410f2ea4d73b48986facad9cfc0d4 This patch adds access_width/bit_offset support in acpi_hw_read(). This also enables GAS definition where bit_width is not a power of two. Lv Zheng. Link: https://github.com/acpica/acpica/commit/96ece052 Link: https://github.com/acpica/acpica/commit/3d8583a0 Link: https://bugs.acpica.org/show_bug.cgi?id=1240 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-05-05ACPICA: Hardware: Add optimized access bit width supportLv Zheng1-2/+47
ACPICA commit c49a751b4dae7baec1790748a2b4b6e8ab599f51 For Access Size = 0, it actually can use user expected access bit width. This patch implements this. Besides of the ACPICA upstream commit, this patch also includes a fix fixing the issue reported by the FreeBSD community. The old register descriptors are translated in acpi_tb_init_generic_address() with access_width being filled with 0. This breaks code in acpi_hw_get_access_bit_width() when the registers are 16-bit IO ports and their bit_width fields are filled with 16. The rapid fix is meant to make code written for acpi_hw_get_access_bit_width() regression safer before the issue is correctly fixed from acpi_tb_init_generic_address(). Reported by John Baldwin <jhb@freebsd.org>, fixed by Lv Zheng <lv.zheng@intel.com>, tested by Jung-uk Kim <jkim@freebsd.org>. Link: https://github.com/acpica/acpica/commit/c49a751b Reported-by: John Baldwin <jhb@freebsd.org> Tested-by Jung-uk Kim <jkim@freebsd.org>. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-05ACPICA: Hardware: Enhance acpi_hw_validate_register() with access_width/bit_offset awarenessLv Zheng1-10/+15
ACPICA commit 997a90f810a4cb78604ef2e187611a181b498286 This patch enhances acpi_hw_validate_register() to sanitize register accesses with awareness of access_width and bit_offset. Lv Zheng. Link: https://github.com/acpica/acpica/commit/997a90f8 Link: https://bugs.acpica.org/show_bug.cgi?id=1240 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-01-15ACPICA: Additional 2016 copyright changesBob Moore1-1/+1
All tool/utility signons. Dual-license module header. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-02-05ACPICA: Update Copyright headers to 2015David E. Box1-1/+1
ACPICA commit 8990e73ab2aa15d6a0068b860ab54feff25bee36 Link: https://github.com/acpica/acpica/commit/8990e73a Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-07-08ACPICA: Hardware: back port of a recursive locking fixLv Zheng1-1/+2
This patch is a back port result of the following Linux commit: Commit: f7f71cfbf0c276ee3d8d856d0f35a41aed997fa4 Author: Rakib Mullick <rakib.mullick@gmail.com> Subject: ACPI: Fix possible recursive locking in hwregs.c As a result of different coding style rules, the back ported code generates source code differences between the Linux kernel and the ACPICA upstream. This patch reduces such source code differences. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-02-11ACPICA: Update ACPICA copyrights to 2014.Bob Moore1-1/+1
Update ACPICA copyrights to 2014. Includes all source headers and signons for the various tools. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-10-31ACPICA: Linuxize: Change indentation of C labels.Lv Zheng1-1/+1
It is reported by kernel build test systems that all ACPICA source files in the kernel tree have incorrect label indentation. This patch changes default indent option used in the release process to fix this bug. Lv Zheng. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-06-16ACPICA: Standardize all switch() blocksChao Guan1-2/+2
After many years, different formatting for switch() has crept in. This change makes every switch block identical. Chao Guan. ACPICA bugzilla 997. References: https://bugs.acpica.org/show_bug.cgi?id=997 Signed-off-by: Chao Guan <chao.guan@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-25ACPICA: Update ACPICA copyrights to 2013Bob Moore1-1/+1
Includes all source headers and signons for the various tools. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-10ACPICA: Cleanup indentation to reduce differences between Linux and ACPICA.Lv Zheng1-2/+1
This is a cosmetic patch only. Comparison of the resulting binary showed only line number differences. This patch does not affect the generation of the Linux binary. This patch decreases 210 lines of 20121018 divergence.diff. The ACPICA source codes uses a totally different indentation style from the Linux to be compatible with other users (operating systems or BIOS). Indentation differences are critical to the release automation. There are two causes related to the "indentation" that are affecting the release automation: 1. The ACPICA -> Linux release process is: ACPICA source -- acpisrc - hierarchy - indent -> linuxized ACPICA source -- diff -> linuxized ACPICA patch (x) -- human intervention -> linuxized ACPICA patch (o) Where 'x' means "cannot be directly applied to the Linux" 'o' means "can be directly applied to the Linux" Different "indent" version or "indent" options used in the "indent" step will lead to different divergences. The version of "indent" used for the current release process is: GNU indent 2.2.11 The options of "indent" used for the current release process is: -npro -kr -i8 -ts8 -sob -l80 -ss -ncs 2. Manual indentation prettifying work in the Linux side will also harm the automatically generated linuxized ACPICA patches, making them impossible to apply directly. This patch fixes source code differences caused by the two causes so that the "human intervention" can be reduced in the future. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-10ACPICA: Cleanup source to reduce differences between Linux and ACPICA.Lv Zheng1-1/+0
This is a cosmetic patch only. Comparison of the resulting binary showed only line number differences. This patch does not affect the generation of the Linux binary. This patch decreases 389 lines of 20121018 divergence.diff. This patch reduces source code diff caused by the simple code maintenance work: 1. Deletion of the unused include files. 2. Deletion of the deprecated codes blocks. 3. Repositioning of the code blocks. 4. Replacing the values with the well defined macros. 5. Replacing the types with the equivalent types. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-10ACPICA: Cleanup updated comments.Lv Zheng1-1/+1
This is a cosmetic patch only. Comparison of the resulting binary showed only line number differences. This patch does not affect the generation of the Linux binary. This patch decreases 558 lines of 20121018 divergence.diff. This patch reduces the source code diff between Linux and ACPICA by cleaning the comments that already have been updated in ACPICA. There is no extra indentation done in this patch. Even the empty line deletions and insertions are also splitted into another cleanup patch so that this patch can be easily reviewed, and the binary differences can be held to a lowest level. Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2012-11-15ACPICA: ACPICA core: Cleanup empty lines at file start and endBob Moore1-1/+0
Maintenance for source code consistency. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2012-07-17ACPICA: AcpiSrc: Fix some translation issues for Linux conversionBob Moore1-11/+11
Fixes issues like this: i_aSL -> iASL 00-7_f -> 00-7F local_fADT -> local_FADT execute_oSI -> execute_OSI Also, in function headers, the parameters are now translated to lower case (with underscores if necessary.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-22ACPICA: Expand OSL memory read/write interfaces to 64 bitsBob Moore1-2/+6
This change expands acpi_os_read_memory and acpi_os_write_memory to a full 64 bits. This allows 64 bit transfers via the acpi_read and acpi_write interfaces. Note: The internal acpi_hw_read and acpi_hw_write interfaces remain at 32 bits, because 64 bits is not needed to access the standard ACPI registers. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-03-22ACPICA: Support for custom ACPICA build for ACPI 5 reduced hardwareBob Moore1-1/+7
Add ACPI_REDUCED_HARDWARE flag that removes all hardware-related code (about 10% code, 5% static data). Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-01-17ACPICA: Update all copyrights to 2012Bob Moore1-1/+1
Update all copyrights to 2012. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-11-06ACPI: Fix possible recursive locking in hwregs.cRakib Mullick1-5/+6
Calling pm-suspend might trigger a recursive lock in it's code path. In function acpi_hw_clear_acpi_status, acpi_os_acquire_lock holds the lock acpi_gbl_hardware_lock before calling acpi_hw_register_write(), then without releasing acpi_gbl_hardware_lock, this function calls acpi_ev_walk_gpe_list, which tries to hold acpi_gbl_gpe_lock. Both acpi_gbl_hardware_lock and acpi_gbl_gpe_lock are at same lock-class and which might cause lock recursion deadlock. Following patch fixes this scenario by just releasing acpi_gbl_hardware_lock before calling acpi_ev_walk_gpe_list. Changes since v0(https://lkml.org/lkml/2011/9/21/355): - Fix changelog, thanks to Lin Ming. Changes since v1 (https://lkml.org/lkml/2011/11/3/89): - Update changelog and rename goto label, courtesy Srivatsa S. Bhat. Signed-off-by: Rakib Mullick <rakib.mullick@gmail.com> Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Len Brown <len.brown@intel.com>
2011-01-18ACPICA: Update all ACPICA copyrights and signons to 2011Bob Moore1-1/+1
Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-04-20ACPICA: Standardize integer output for ACPICA warnings/errorsBob Moore1-3/+3
Always use 0x prefix for hex output, use %u for integer output (all integers are unsigned.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22ACPICA: Update all ACPICA copyrights and signons to 2010Bob Moore1-1/+1
Add 2010 copyright to all module headers and signons, including the Linux header. This affects virtually every file in the ACPICA core subsystem, iASL compiler, and all utilities. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-08-27ACPICA: Add 64-bit support to acpi_read and acpi_writeBob Moore1-12/+194
Needed by drivers for new ACPi tables. Internal versions of these functions still use 32-bit max transfers, in order to minimize disruption and stack use for the standard ACPI registers (FADT-based). Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-05-27ACPICA: Fix a few warnings for gcc 3.4.4Bob Moore1-2/+2
Mostly for acpiexec, one in the core subsystem. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: Clear PM register write-only bits on readingLin Ming1-0/+7
Affects PM1 Control register only. When reading the register, zero the write-only bits as per the ACPI spec. ACPICA BZ 443. Lin Ming. http://www.acpica.org/bugzilla/show_bug.cgi?id=443 Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: New: I/O port protectionBob Moore1-2/+2
Protect certain I/O ports from reads/writes. Provides MS compatibility. New module, hwvalid.c Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: Preserve all PM control reserved and ignored bitsBob Moore1-0/+15
As per the ACPI specification, preserve (read/modify/write) all bits that are defined as either reserved or ignored (PM control control registers only.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: Change handling of PM1 Status register ignored bitBob Moore1-16/+11
Ignored bits must be preserved according to the ACPI spec. Usually this means a read/modify/write when writing to the register. However, for status registers, writing a one means clear the event. Writing a zero means preserve the event (do not clear.) This behavior is clarified in the ACPI 4.0 spec, and the ACPICA code now simply always writes a zero to the ignored bit. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Add function to handle PM1 control registersBob Moore1-10/+36
Added acpi_hw_write_pm1_control. This function writes both of the PM1 control registers (A/B). These registers are different than than the PM1 A/B status and enable registers in that different values can be written to the A/B registers. Most notably, the SLP_TYP bits can be different, as per the values returned from the _Sx predefined methods. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: For PM1B registers, do not shift value read or writtenBob Moore1-9/+24
The PM1B registers are mirrors of the PM1A registers with different bits actually implemented. From the ACPI specification: "Although the bits can be split between the two register blocks (each register block has a unique pointer within the FADT), the bit positions are maintained. The register block with unimplemented bits (that is, those implemented in the other register block) always returns zeros, and writes have no side effects" Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Remove extra write for acpi_hw_clear_acpi_statusBob Moore1-14/+3
This function was writing an optional PM1B status register twice. The existing call to the low-level acpi_hw_register_write automatically handles a possibly split PM1 A/B register. ACPICA BZ 751. http://www.acpica.org/bugzilla/show_bug.cgi?id=751 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Fix writes to optional PM1B registersBob Moore1-65/+140
On read, shift B register bits above the A bits. On write, shift B bits down to zero before writing the B register. New: acpi_hw_read_multiple, acpi_hw_write_multiple. These two functions now transparently handle the (possible) split registers for PM1 Status, Enable, and Control. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Split out PM1 status registers from the FADTBob Moore1-8/+10
Add new globals for the PM1 status registers (A/B), similar to the way the PM1 enable registers are handled. Instead of overloading the FADT Event Register blocks. This makes the code clearer and less prone to error. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-09ACPICA: hide private headersLen Brown1-3/+3
Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-09ACPICA: create acpica/ directoryLen Brown1-0/+353
also, delete sleep/ and delete ACPI_CFLAGS from Makefile Signed-off-by: Len Brown <len.brown@intel.com>
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