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path: root/drivers/bus/ti-sysc.c (follow)
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2019-12-16bus: ti-sysc: Fix iterating over clocksTony Lindgren1-2/+8
Commit d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") separated handling of optional clocks from the main clocks, but introduced an issue where we do not necessarily allocate a slot for both fck and ick clocks, but still assume fixed slots for enumerating over the clocks. Let's fix the issue by ensuring we always have slots for both fck and ick even if we don't use ick, and don't attempt to enumerate optional clocks if not allocated. In the long run we might want to simplify things a bit by only allocating space only for the optional clocks as we have only few devices with optional clocks. Fixes: d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12bus: ti-sysc: Fix missing reset delay handlingTony Lindgren1-0/+4
We have dts property for "ti,sysc-delay-us", and we're using it, but the wait after OCP softreset only happens if devices are probed in legacy mode. Let's add a delay after writing the OCP softreset when specified. Fixes: e0db94fe87da ("bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits") Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10bus: ti-sysc: Fix missing force mstandby quirk handlingTony Lindgren1-1/+2
Commit 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") added quirk handling for mstandby quirk but did not consider that we also need a quirk variant for SYSC_QUIRK_FORCE_MSTANDBY. We need to use forced idle mode for both SYSC_QUIRK_SWSUP_MSTANDBY and SYSC_QUIRK_FORCE_MSTANDBY, but SYSC_QUIRK_SWSUP_MSTANDBY also need to additionally also configure no-idle mode when enabled. Fixes: 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-11-14bus: ti-sysc: Adjust exception handling in sysc_child_add_named_clock()Markus Elfring1-4/+3
Add a jump target so that a call of the function “clk_put” can be better reused at the end of this function. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-11-14bus: ti-sysc: Add module enable quirk for audio AESSTony Lindgren1-1/+13
We must set the autogating bit on enable for AESS (Audio Engine SubSystem) when probed with ti-sysc interconnect target module driver. Otherwise it won't idle properly. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-21bus: ti-sysc: Use swsup quirks also for am335x musbTony Lindgren1-0/+2
Also on am335x we need the swsup quirks for musb. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-21bus: ti-sysc: Handle mstandby quirk and use it for musbTony Lindgren1-2/+8
We need swsup quirks for sidle and mstandby for musb to work properly. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-18Merge branch 'watchdog-fix' into omap-for-v5.5/ti-syscTony Lindgren1-4/+14
2019-10-18bus: ti-sysc: Fix watchdog quirk handlingTony Lindgren1-4/+14
I noticed that when probed with ti-sysc, watchdog can trigger on am3, am4 and dra7 causing a device reset. Turns out I made several mistakes implementing the watchdog quirk handling: 1. We must do both writes to spr register 2. We must also call the reset quirk on disable 3. On am3 and am4 we need to also set swsup quirk flag I probably only tested this earlier with watchdog service running when the watchdog never gets disabled. Fixes: 4e23be473e30 ("bus: ti-sysc: Add support for module specific reset quirks") Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08bus: ti-sysc: avoid toggling power state of module during probeTero Kristo1-12/+18
Current implementation for ti-sysc powers down the module once module init is complete. However, right after power is disabled, it is enabled via runtime PM. This is unnecessary so avoid it by re-ordering the events a bit; move powering down of the module post runtime PM enable which makes sure the use counts are maintained properly and there is no extra power down/up sequence for the module. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08bus: ti-sysc: drop the extra hardreset during initTero Kristo1-36/+1
There seems to be unnecessary extra hardreset line toggling applied during module init. This is unnecessary, as the reset lines are already asserted during boot, and it can cause certain modules to hang (iommus, remoteprocs.) Remove the extra hardreset toggle, and remove the now redundant function to handle this also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08bus: ti-sysc: re-order reset and main clock controlsTero Kristo1-4/+4
The main clocks and reset controls have a hardware level dependency, where one can't transition state without the other one transitioning. Because we don't have the dependency implemented in software, we must ensure the ordering of these two is done properly; they way this is handled is that clocks transition on software level without delay, and the status is only polled on reset side. Because of this, we must re-order the main clock and reset handling on the ti-sysc driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-30Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-15/+37
Pull ARM SoC fixes from Olof Johansson: "A few fixes that have trickled in through the merge window: - Video fixes for OMAP due to panel-dpi driver removal - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7 - Fixing arch version on ASpeed ast2500 - Two fixes for reset handling on ARM SCMI" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: aspeed: ast2500 is ARMv6K reset: reset-scmi: add missing handle initialisation firmware: arm_scmi: reset: fix reset_state assignment in scmi_domain_reset bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle() ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux ARM: dts: am3517-evm: Fix missing video ARM: dts: logicpd-torpedo-baseboard: Fix missing video ARM: omap2plus_defconfig: Fix missing video bus: ti-sysc: Fix handling of invalid clocks bus: ti-sysc: Fix clock handling for no-idle quirks
2019-09-06bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle()Tony Lindgren1-1/+0
Commit d098913a10f8 ("bus: ti-sysc: Fix clock handling for no-idle quirks") fixed handling for no-idle quirk modules that are not enabled by the bootloader. But it also caused unpaired clockdomain calls that won't allow idling the system. That's because clkdm_allow_idle_nolock() and clkdm_deny_idle_nolock() have usage count with clkdm->forcewake_count. Let's drop the unpaired sysc_clkdm_deny_idle() to fix idling of devices. Fixes: d098913a10f8 ("bus: ti-sysc: Fix clock handling for no-idle quirks") Cc: Keerthy <j-keerthy@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-05bus: ti-sysc: Fix handling of invalid clocksTony Lindgren1-4/+1
We can currently get "Unable to handle kernel paging request at virtual address" for invalid clocks with dts node but no driver: (__clk_get_hw) from [<c0138ebc>] (ti_sysc_find_one_clockdomain+0x18/0x34) (ti_sysc_find_one_clockdomain) from [<c0138f0c>] (ti_sysc_clkdm_init+0x34/0xdc) (ti_sysc_clkdm_init) from [<c0584660>] (sysc_probe+0xa50/0x10e8) (sysc_probe) from [<c065c6ac>] (platform_drv_probe+0x58/0xa8) Let's add IS_ERR checks to ti_sysc_clkdm_init() as And let's start treating clk_get() with -ENOENT as a proper error. If the clock name is specified in device tree we must succeed with clk_get() to continue. For modules with no clock names specified in device tree we will just ignore the clocks. Fixes: 2b2f7def058a ("bus: ti-sysc: Add support for missing clockdomain handling") Acked-by: Roger Quadros <rogerq@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-05bus: ti-sysc: Fix clock handling for no-idle quirksTony Lindgren1-11/+37
NFSroot can fail on dra7 when cpsw is probed using ti-sysc interconnect target module driver as reported by Keerthy. Device clocks and the interconnect target module may or may not be enabled by the bootloader on init, but we currently assume the clocks and module are on from the bootloader for "ti,no-idle" and "ti,no-idle-on-init" quirks as reported by Grygorii Strashko. Let's fix the issue by always enabling clocks init, and never disable them for "ti,no-idle" quirk. For "ti,no-idle-on-init" quirk, we must decrement the usage count later on to allow PM runtime to idle the module if requested. Fixes: 1a5cd7c23cc5 ("bus: ti-sysc: Enable all clocks directly during init to read revision") Cc: Keerthy <j-keerthy@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Reported-by: Keerthy <j-keerthy@ti.com> Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26bus: ti-sysc: Detect d2d when debug is enabledTony Lindgren1-0/+2
We want to see what modules probe when debug is enabled. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26bus: ti-sysc: Add module enable quirk for SGX on omap36xxTony Lindgren1-0/+21
Add module enable quirk for SGX needed on omap36xx. Cc: Adam Ford <aford173@gmail.com> Cc: Filip Matijević <filip.matijevic.pz@gmail.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: moaz korena <moaz@korena.xyz> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Cc: Philipp Rossak <embed3d@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26bus: ti-sysc: Change return types of functionsNishka Dasgupta1-16/+6
Change return type of functions sysc_check_one_child() and sysc_check_children() from int to void as neither ever returns an error. Modify call sites of both functions accordingly. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: remove set but not used variable 'quirks'YueHaibing1-2/+1
Fixes gcc '-Wunused-but-set-variable' warning: drivers/bus/ti-sysc.c: In function sysc_reset: drivers/bus/ti-sysc.c:1452:50: warning: variable quirks set but not used [-Wunused-but-set-variable] It is never used since commit e0db94fe87da ("bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: allow reset sharing across devicesTero Kristo1-3/+9
Some devices need to share their reset signals, like DSP MMUs, thus drop the exclusive notation from reset request. Also, balance the init time reset count, otherwise the resets will never be applied post boot. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: rework the reset handlingTero Kristo1-20/+5
If reset controllers are assigned to the ti-sysc target-module, only ti-sysc is going to be able to control these. Thus, remove all the disable_on_idle flag usage, and assert/de-assert the reset always in the idle path. Otherwise the reset signal will always just be de-asserted. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: re-order the clkdm control around reset handlingTero Kristo1-4/+5
Parenting clockdomain for the IP should be enabled during the reset handling logic, otherwise the reset may not finish properly. Re-order the clockdomain control logic to avoid this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: Add missing kerneldoc commentsSuman Anna1-0/+7
A few fields in various structures is missing the corresponding kerneldoc comments. Add them. Also, fixed the comment for sidlemodes. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: Switch to SPDX license identifierSuman Anna1-9/+1
Use the appropriate SPDX license identifier in the TI sysc interconnect target driver source files and drop the previous boilerplate license text. Also, add the the SPDX license identifier in the associated ti-sysc header files. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: Simplify cleanup upon failures in sysc_probe()Suman Anna1-7/+7
The clocks are not yet parsed and prepared until after a successful sysc_get_clocks(), so there is no need to unprepare the clocks upon any failure of any of the prior functions in sysc_probe(). The current code path would have been a no-op because of the clock validity checks within sysc_unprepare(), but let's just simplify the cleanup path by returning the error directly. While at this, also fix the cleanup path for a sysc_init_resets() failure which is executed after the clocks are prepared. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7Tony Lindgren1-1/+2
We are currently using a wrong register for dcan revision. Although this is currently only used for detecting the dcan module, let's fix it to avoid confusion. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24bus: ti-sysc: Fix using configured sysc mask valueTony Lindgren1-4/+1
We have cases where there are no softreset bits like with am335x lcdc. In that case ti,sysc-mask = <0> needs to be handled properly. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24bus: ti-sysc: Fix handling of forced idleTony Lindgren1-1/+1
For some devices we can get the following warning on boot: ti-sysc 48485200.target-module: sysc_disable_module: invalid midlemode Fix this by treating SYSC_IDLE_FORCE like we do for the other bits for idlemodes mask. Fixes: d59b60564cbf ("bus: ti-sysc: Add generic enable/disable functions") Cc: Roger Quadros <rogerq@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10bus: ti-sysc: Add support for module specific reset quirksTony Lindgren1-5/+124
Some older interconnect target modules need module internal clock toggling quirks to reset properly. We've been doing this in the platform code earlier, but need to be able to it directly in the ti-sysc driver when we no longer rely on on the platform code. Let's add reset handling for 1-wire, i2c and watchdog. Later on we can add more modules like msdi and dss as they get tested. For dra7 pcie, we should be able to just use the rstctrl reset driver when available. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Detect uarts also on omap34xxTony Lindgren1-1/+3
Looks like we currently only detect UART on omap36xx, let's also add support for omap34xx. And let's also fix the SWSUP mode, it should be SWSUP_SIDLE for omap3, not SWSUP_SIDLE_ACT like for omap4 and later. Note that we are still booting omap3 for most part without ti-sysc, so no need to treat this change as a fix. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Do rstctrl reset handling in two phasesTony Lindgren1-8/+17
We need to deassert rstctrl resets before enabling clocks to avoid clock "failed to enable" errors. For asserting rstctrl reset, the clocks need to be enabled. As the reset controller status is not available for arrays, let's use devm_reset_control_get_optional() so we can get the status after reset. Note that depends on a proper PRM rstctrl driver, so far I've only tested this with earlier reset-simple patches. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Add support for disabling module without legacy modeTony Lindgren1-4/+17
We must not assert reset for modules with no child device drivers until in runtime_suspend. Otherwise register access will fail without legacy mode helping us. Let's add a flag for disable_on_idle and move the reset driver handling to runtime suspend and resume. We can then also use the disable_on_idle flag to reconfigure sysconfig register for PM modes requesting it. Let's also make the other flags use bitfield while at it instead of bool. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Set ENAWAKEUP if availableTony Lindgren1-0/+5
Some modules have ENAWAKEUP bit that we need to configure when not relying on platform data callbacks. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren1-8/+17
Some modules have idlemodes wired, but not completely functional. We have quirks for SWSUP_SIDLE and SWSUP_SIDLE_ACT to manage interconnect target modules without hardware support, but we've been only using them so far in legacy mode. Let's add support for SWSUP quirks in non-legacy mode too. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Handle clockactivity for enable and disableTony Lindgren1-0/+7
Modules with clockactivity need it configured during enable. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Enable interconnect target module autoidle bit on enableTony Lindgren1-1/+12
For interconnect target modules with autoidle bit wired, we need to manage it for enable and disable. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not setTony Lindgren1-3/+0
We need to specify QUIRK_LEGACY_IDLE for device drivers that still have pm_runtime_irq_safe() set like 8250. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bitsTony Lindgren1-18/+54
We've had minimal OCP softreset support in ti-sysc interconnect target module driver only used for MCAN driver so far. But it turns out that MCAN has the sysstatus register resetdone bit inverted compared to most other modules. Let's make OCP softreset work for other typical cases with reset status in sysstatus or sysconfig register so we can use the new functions for sysc_enable_module() and sysc_disable_module() without "ti,hwmods" property in the following patches. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Support 16-bit writes tooTony Lindgren1-1/+22
We need to also support 16-bit writes for i2c in addition to the reads when we start configuring the sysconfig register for reset and idle modes. Note that only i2c revision register has LO and HI registers, so let's add a check also for 16-bit register read. This change is currently cosmetic and does not affect anything until we enable the module specific quirk handling for i2c reset and enable later on. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Add support for missing clockdomain handlingTony Lindgren1-26/+101
We need to let ti-sysc driver manage clockdomain autoidle for the duration of of reset, enable and idle. And we need to do it before we enable the clock and after we disable it. Currently we are still relying on platform callbacks indirectly managing clockdomain autoidle. But I noticed that for device tree only probed drivers it now happens only after we enabling the clocks and before we disable the clocks, while it should be the other way around. So far I have not noticed any issues with this though. Let's add new ti_sysc_clkdm_deny_idle() and ti_sysc_clkdm_allow_idle() functions for ti-sysc driver to use to manage clockdomains directly via platform data callbacks. Note that we can implement the clockdomain functions in pdata-quirks.c as for probing devices without "ti,hwmods" custom property we don't need to use the other platform data callbacks. Let's do this in one patch as there's is still an unlikely chance we may need to apply this as a fix for v5.2 for dropping legacy platform data for some devices. We also do have the option of adding back the platform data if needed in case of trouble. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-02bus: ti-sysc: Handle devices with no control registersTony Lindgren1-12/+11
Some interconnect target modules have no module control registers at all, such as d_can on am335x and am437x. The d_can register offset at 0 is CTL register with 0x401 as the default value. I guess I mistook the 0x401 value for a revision register as the value happens to look similar to what the revision registers typically have for other modules. To handle modules with no control registers, we need to improve the ti-sysc driver a bit to bail out with errors on no control registers, and then we can remove the bogus revision registers for d_can. Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09bus: ti-sysc: Add generic enable/disable functionsRoger Quadros1-0/+129
For non legacy cases, add generic sysc_enable_module() and sysc_disable_module() functions. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-05bus: ti-sysc: Detect DMIC for debuggingTony Lindgren1-0/+1
Detect DMIC to see what we have connected if config DEBUG is enabled. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-05bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren1-3/+3
In preparation of dropping interconnect target module platform data in favor of devicetree based data, we must pass swsup idle quirks to the platform data functions. For now, let's only tag the UART modules with the SWSUP_SIDLE_ACT quirk. The other modules will get tagged with swsup quirks as we drop the platform data and test the changes. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Add quirk handling for external optional functional clockTony Lindgren1-1/+90
We cannot access mcpdm registers at all unless there is an optional pdmclk configured. As this is currently only needed for mcpdm, let's check for mcpdm in sysc_get_clocks(). If it turns out to be needed for other modules too, we can add more flags to the quirks table for this. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Add support for early quirks based on register addressTony Lindgren1-4/+42
At least mcpdm needs an optional external clock enabled to function and this clock typically comes from the PMIC. We can detect mcpdm based on the interconnect target module address and set a quirk flag early. To do this, let's initialize the clocks a bit later and add a new function for sysc_init_early_quirks(). Note that we cannot yet enable the early quirks for mcpdm until the optional external clocks are handled in the in the following patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Move rstctrl reset to happen laterTony Lindgren1-22/+39
We can do the rsstctrl a bit later, but need to deassert rstctrl reset before the clocks are enabled if asserted. Let's only init restctrl in sysc_init_resets() and do the reset later on just before we enable the device clocks. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Manage clocks for the interconnect target module in all casesTony Lindgren1-13/+11
We are currently not managing interconnect target module clocks in the for legacy platform data based case. This causes a problem for using the platform data based functions when dropping the platform data for the interconnect target module configuration. To avoid a situation where we need to populate the main and optional clocks also for the platform data based functions, let's just manage the clocks directly in ti-sysc driver. This means that until the interconnect target module confugration platform data is dropped our use count for clk_enable() will be 2 instead of 1. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-03bus: ti-sysc: Allocate mdata as needed and do platform data based init laterTony Lindgren1-15/+39
The platform data based init functions typically reset the interconnect target module configure the registers. As we may need the interconnect target module specific quirks configured based on the revision register, we want to move the platform data based init to happen later. Let's allocate mdata as needed so it's available for sysc_legacy_init() that we call with module clocks enabled from sysc_init_module(). Signed-off-by: Tony Lindgren <tony@atomide.com>