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2019-04-18clk: mvebu: fix spelling mistake "gatable" -> "gateable"Colin Ian King1-1/+1
There are a few spelling mistakes in comments and a pr_err error message. Fix these. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-01clk: mvebu: use SPDX-License-IdentifierGregory CLEMENT1-3/+1
Convert the remaining files to SPDX license description. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2017-04-21clk: mvebu: Use kcalloc() in two functionsMarkus Elfring1-2/+2
* Multiplications for the size determination of memory allocations indicated that array data structures should be processed. Thus use the corresponding function "kcalloc". This issue was detected by using the Coccinelle software. * Replace the specification of data types by pointer dereferences to make the corresponding size determination a bit safer according to the Linux coding style convention. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-03clk: mvebu: Remove CLK_IS_ROOTStephen Boyd1-6/+5
This flag is a no-op now. Remove usage of the flag. Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29clk: move the common clock's to_clk_*(_hw) macros to clk-provider.hGeliang Tang1-2/+0
to_clk_*(_hw) macros have been repeatedly defined in many places. This patch moves all the to_clk_*(_hw) definitions in the common clock framework to public header clk-provider.h, and drop the local definitions. Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-17clk: Remove unneeded semicolonsJavier Martinez Canillas1-1/+1
There are cleary typo errors so can be removed. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Acked-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20clk: mvebu: Remove clk.h includeStephen Boyd1-1/+1
Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Only include the header if necessary. The clkdev.h include isn't used here either, so drop it and add in slab.h to keep things compiling. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-03-04clk: mvebu: extend common code to allow an optional refclkThomas Petazzoni1-0/+17
The Armada 39x, contrary to its predecessor, has a configurable reference clock frequency, of either 25 Mhz, or 40 Mhz. For the previous SoCs, it was fixed to 25 Mhz and described directly as such in the Device Tree. For Armada 39x, we need to read certain registers to know whether the frequency is 25 or 40 Mhz. Therefore, this commit extends the common mvebu clock code to allow the SoC-specific code to say it wants to register a reference clock, by giving a non-NULL ->get_refclk_freq() function pointer in its coreclk_soc_desc structure. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2014-11-30clk: mvebu: add suspend/resume for gatable clocksThomas Petazzoni1-2/+30
This commit adds suspend/resume support for the gatable clock driver used on Marvell EBU platforms. When getting out of suspend, the Marvell EBU platforms go through the bootloader, which re-enables all gatable clocks. However, upon resume, the clock framework will not disable again all gatable clocks that are not used. Therefore, if the clock driver does not save/restore the state of the gatable clocks, all gatable clocks that are not claimed by any device driver will remain enabled after a resume. This is why this driver saves and restores the state of those clocks. Since clocks aren't real devices, we don't have the normal ->suspend() and ->resume() of the device model, and have to use the ->suspend() and ->resume() hooks of the syscore_ops mechanism. This mechanism has the unfortunate idea of not providing a way of passing private data, which requires us to change the driver to make the assumption that there is only once instance of the gatable clock control structure. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: linux-kernel@vger.kernel.org Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1416585613-2113-9-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-10-03Merge tag 'clk-mvebu-3.18-2' of git://git.infradead.org/linux-mvebu into clk-nextMike Turquette1-3/+3
clock mvebu changes for v3.18 (round 2) - armada 370/375 - Fix SSCG node lookup
2014-09-26Merge tag 'clk-mvebu-3.18' of git://git.infradead.org/linux-mvebu into clk-nextMike Turquette1-0/+82
clock changes for mvebu for v3.18 - correct timer drift caused by SSCG deviation - fix typo in comment
2014-09-16clk: mvebu: fix sscg node lookupThomas Petazzoni1-3/+3
Commit 15917b16022427c53755abff4dc7051f3076dd7a ("clk: mvebu: Fix clk frequency value if SSCG is enabled") introduced some logic in the common mvebu clock code to adjust the clock frequency according to the configuration of the SSCG. In order to do this, it looks up for a DT node called "sscg" and maps it before accessing the SSCG configuration register. However, the lookup is currently done using: sscg_np = of_find_node_by_name(np, "sscg"); where "np" is a pointer to the DT node of the clock for which we are calculating the adjusted frequency. This means that if the "sscg" node is *after* the clock node in the Device Tree, it works fine (and that's the case for Armada 370). However, if it turns out that the "sscg" node is *before* the clock node in the Device Tree, it won't work because the sscg node will not be found. What we really want here is a search of the entire Device Tree, not only starting from the clock node, so instead of passing "np" as first argument of of_find_node_by_name(), we simply need to pass NULL. Passing a non-NULL argument is typically used in a loop, so that the search for the next matching node starts right after the node that was matched. This makes the "np" argument to the kirkwood_fix_sscg_deviation() function unnecessary, which leads to further cleanups. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Fixes: 15917b1602242 ("clk: mvebu: Fix clk frequency value if SSCG is enabled") Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1410880503-2322-1-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-09-09clk: mvebu: Fix clk frequency value if SSCG is enabledGregory CLEMENT1-0/+82
When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts the frequency of the clock. The percentage is no more than 1% but when the clock is used for a timer it leads to a clock drift. This patch allows to correct the affected clock when the SSCG is enabled. The check is done in an new optional function related to each SoC: is_sscg_enabled(). The fix is done with the other new optional function related to each SoC: fix_sscg_deviation. If one these functions are not present then no correction is done on the clock frequency. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Leigh Brown <leigh@solinno.co.uk> Link: https://lkml.kernel.org/r/1409645719-20003-2-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-09-01clk: mvebu: share locks between gate clocksMike Turquette1-3/+6
Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a unique lock for every instance of a struct clk_gating_ctrl object. This will be used later for a separate mux clock type that shares a register with gate clock types and needs to use the same lock to protect access to the register. Cc: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-08-23clk: mvebu: add missing iounmapJisheng Zhang1-6/+12
Add missing iounmap to setup error path. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29clk: mvebu: add common clock functions for core clk and clk gatingSebastian Hesselbarth1-0/+163
Based on the current common functions for core clocks and clock gating control, new common functions are joined in a single file. Given the opportunity, names of functions and structs are unified, and also a Kconfig entry is added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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