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path: root/drivers/clk/mvebu/cp110-system-controller.c (follow)
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2018-10-01clk: mvebu: use SPDX-License-IdentifierGregory CLEMENT1-3/+1
Convert the remaining files to SPDX license description. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-19clk: mvebu: cp110: Fix clock tree representationGregory CLEMENT1-55/+39
Thanks to new documentation, we have a better view of the clock tree. There were few mistakes in the first version of this driver, the main one being the parental link between the clocks. Actually the tree is more flat that we though. Most of the IP blocks require two clocks: one for the IP itself and one for accessing the registers, and unlike what we wrote there is no link between these two clocks. The other mistakes were about the name of the clocks: the root clock is not the Audio PLL but the PLL0, and what we called the EIP clock is named the x2 Core clock and is used by other IP block than the EIP ones. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2017-06-19clk: mvebu: cp110: Minor cleanupsStephen Boyd1-3/+2
Mark an array of strings static const and remove the dereference of a function pointer when assigning to the platform driver probe struct member. drivers/clk/mvebu/cp110-system-controller.c:89:12: warning: symbol 'gate_base_names' was not declared. Should it be static? drivers/clk/mvebu/cp110-system-controller.c:447:18: error: cannot dereference this type Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19clk: mvebu: cp110: add sdio clock to cp-110 system controllerKonstantin Porotchkin1-5/+23
This commit updates the CP110 system controller driver to add the definition for a missing clock. The SDIO clock is dedicated driving the SDHCI interface and its frequency is 400MHz (2/5 of PLL source clock). The SDIO interface should be bound to this clock and not the core clock as in the older code. Using the wrong clock lead to a maximum SDHCI frequency of 250 Mhz, while the HW really supports up to 400 Mhz. This patch also fixes the NAND clock relationship documentation. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> [gregory.clement@free-electrons.com: - use sdio instead of emmc to name the clock] Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-19clk: mvebu: cp110: introduce a new bindingGregory CLEMENT1-15/+48
The initial intent when the binding of the cp110 system controller was to have one flat node. The idea being that what is currently a clock-only driver in drivers would become a MFD driver, exposing the clock, GPIO and pinctrl functionality. However, after taking a step back, this would lead to a messy binding. Indeed, a single node would be a GPIO controller, clock controller, pinmux controller, and more. This patch adopts a more classical solution of a top-level syscon node with sub-nodes for the individual devices. The main benefit will be to have each functional block associated to its own sub-node where we can put its own properties. The introduction of the Armada 7K/8K is still in the early stage so the plan is to remove the old binding. However, we don't want to break the device tree compatibility for the few devices already in the field. For this we still keep the support of the legacy compatible string with a big warning in the kernel about updating the device tree. Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-19clk: mvebu: cp110: do not depend anymore of the *-clock-output-namesGregory CLEMENT1-40/+65
Using the *-clock-output-names property was a convenient way to have a unique name for each clock even when there are multiple cp110 blocks as we can find on Armada 8K. However it has some drawbacks: the main one being a stronger link than necessary between the driver and the device tree. For example the clock name can't be changed, removed or moved. It is still the early stage of introduction of the Armada 7K/8K and the hardware is still not totally documented, especially for the clock part. By removing the use of *-clock-output-names it will be easier to add new clocks without breaking the compatibility. The name of each clock is now created by using its physical address as a prefix (as it was done for the platform device names). Thanks to this we have an automatic way to compute a unique name. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-01clk: mvebu: cp110: make failure labels more meaningfulGregory CLEMENT1-10/+10
In preparation to the addition of a new clock, rename the goto labels used to handle the failure cases using a name related to the failure cause. This will allow to insert additional failing cases without renaming all the labels. Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-02-14clk: mvebu: adjust clock handling for the CP110 system controllerThomas Petazzoni1-2/+11
This commit: - makes the GOP_DP (bit 9) gatable clock a child clock of the SD_MMC_GOP (bit 18) clock, as it should have been. The clock for bit 18 was just named SD_MMC, but since it also covers the GOP block, it is renamed SD_MMC_GOP. - makes the MG (bit 5) gatable clock a child clock of the MG_CORE clock (bit 6) Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-04clk: mvebu: make cp110-system-controller explicitly non-modularPaul Gortmaker1-32/+3
The Kconfig currently controlling compilation of this code is: drivers/clk/mvebu/Kconfig:config ARMADA_CP110_SYSCON drivers/clk/mvebu/Kconfig: bool ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: linux-clk@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-01clk: mvebu: migrate CP110 system controller to clk_hw API and registrationMarcin Wojtas1-78/+72
Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers while registering clks in Armada CP110 system controller driver. This commit introduces new API and registration for all clocks in CP110 HW blocks. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-22clk: mvebu: dynamically allocate resources in Armada CP110 system controllerMarcin Wojtas1-9/+20
Original commit, which added support for Armada CP110 system controller used global variables for storing all clock information. It worked fine for Armada 7k SoC, with single CP110 block. After dual-CP110 Armada 8k was introduced, the data got overwritten and corrupted. This patch fixes the issue by allocating resources dynamically in the driver probe and storing it as platform drvdata. Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...") Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> CC: <stable@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-22clk: mvebu: fix setting unwanted flags in CP110 gate clockMarcin Wojtas1-0/+2
Armada CP110 system controller comprises its own routine responsble for registering gate clocks. Among others 'flags' field in struct clk_init_data was not set, using a random values, which may cause an unpredicted behavior. This patch fixes the problem by resetting all fields of clk_init_data before assigning values for all gated clocks of Armada 7k/8k SoCs family. Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...") Signed-off-by: Marcin Wojtas <mw@semihalf.com> CC: <stable@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-05-06clk: mvebu: new driver for Armada CP110 system controllerThomas Petazzoni1-0/+406
The Armada CP110 system controller provides, amongst other things, a number of clocks for the platform: a small number of core clocks, and then a number of gatable clocks, derived from some of the core clocks. Those clocks are configured via registers of the CP110 System Controller. The CP110 is the other core HW block (next to the AP806) used in the Marvel Armada 7K and 8K SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [sboyd@codeaurora.org: Silence some checkpatch noise] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>