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path: root/drivers/clk/qcom/gcc-sdm845.c (follow)
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2019-12-05Merge branch 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linuxLinus Torvalds1-1/+1
Pull thermal management updates from Zhang Rui: - Fix a deadlock regression in thermal core framework, which was introduced in 5.3 (Wei Wang) - Initialize thermal control framework earlier to enable thermal mitigation during boot (Amit Kucheria) - Convert the Intelligent Power Allocator (IPA) thermal governor to follow the generic PM_EM instead of its own Energy Model (Quentin Perret) - Introduce a new Amlogic soc thermal driver (Guillaume La Roque) - Add interrupt support for tsens thermal driver (Amit Kucheria) - Add support for MSM8956/8976 in tsens thermal driver (AngeloGioacchino Del Regno) - Add support for r8a774b1 in rcar thermal driver (Biju Das) - Add support for Thermal Monitor Unit v2 in qoriq thermal driver (Yuantian Tang) - Some other fixes/cleanups on thermal core framework and soc thermal drivers (Colin Ian King, Daniel Lezcano, Hsin-Yi Wang, Tian Tao) * 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (32 commits) thermal: Fix deadlock in thermal thermal_zone_device_check thermal: cpu_cooling: Migrate to using the EM framework thermal: cpu_cooling: Make the power-related code depend on IPA PM / EM: Declare EM data types unconditionally arm64: defconfig: Enable CONFIG_ENERGY_MODEL drivers: thermal: tsens: fix potential integer overflow on multiply thermal: cpu_cooling: Reorder the header file thermal: cpu_cooling: Remove pointless dependency on CONFIG_OF thermal: no need to set .owner when using module_platform_driver thermal: qcom: tsens-v1: Fix kfree of a non-pointer value cpufreq: qcom-hw: Move driver initialization earlier clk: qcom: Initialize clock drivers earlier cpufreq: Initialize cpufreq-dt driver earlier cpufreq: Initialize the governors in core_initcall thermal: Initialize thermal subsystem earlier thermal: Remove netlink support dt: thermal: tsens: Document compatible for MSM8976/56 thermal: qcom: tsens-v1: Add support for MSM8956 and MSM8976 MAINTAINERS: add entry for Amlogic Thermal driver thermal: amlogic: Add thermal driver to support G12 SoCs ...
2019-11-07clk: qcom: rcg: update the DFS macro for RCGTaniya Das1-48/+48
Update the init data name for each of the dynamic frequency switch controlled clock associated with the RCG clock name, so that it can be generated as per the hardware plan. Thus update the macro accordingly. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/20191014102308.27441-2-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-11-07clk: qcom: Initialize clock drivers earlierAmit Kucheria1-1/+1
Initialize the clock drivers on sdm845 and qcs404 in core_initcall so we can have earlier access to cpufreq during booting. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/75ae9c3a1c0e69b95818c6ffe7181fdeaaf2d70e.1571656015.git.amit.kucheria@linaro.org
2019-09-09clk: qcom: gcc-sdm845: Use floor ops for sdcc clksStephen Boyd1-2/+2
Some MMC cards fail to enumerate properly when inserted into an MMC slot on sdm845 devices. This is because the clk ops for qcom clks round the frequency up to the nearest rate instead of down to the nearest rate. For example, the MMC driver requests a frequency of 52MHz from clk_set_rate() but the qcom implementation for these clks rounds 52MHz up to the next supported frequency of 100MHz. The MMC driver could be modified to request clk rate ranges but for now we can fix this in the clk driver by changing the rounding policy for this clk to be round down instead of round up. Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") Reported-by: Douglas Anderson <dianders@chromium.org> Cc: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lkml.kernel.org/r/20190830195142.103564-1-swboyd@chromium.org Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-03-08Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-nextStephen Boyd1-0/+5
* clk-ingenic: clk: ingenic: Remove set but not used variable 'enable' clk: ingenic: Fix doc of ingenic_cgu_div_info clk: ingenic: Fix round_rate misbehaving with non-integer dividers clk: ingenic: jz4740: Fix gating of UDC clock * clk-mtk-mux: clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel clk: mediatek: add MUX_GATE_FLAGS_2 * clk-qcom-sdm845-pcie: clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks * clk-mtk-crit: clk: mediatek: Mark bus and DRAM related clocks as critical clk: mediatek: Add flags to mtk_gate clk: mediatek: Add MUX_FLAGS macro * clk-mtk: clk: mediatek: correct cpu clock name for MT8173 SoC
2019-02-26clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocksBjorn Andersson1-0/+5
The PCIe PIPE clock in the GCC is fed by the PIPE clock coming from the PHY, describe this relationship. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-24clk: qcom: gcc: Use active only source for CPUSS clocksTaniya Das1-4/+10
The clocks of the CPUSS such as "gcc_cpuss_ahb_clk_src" is a CRITICAL clock and needs to vote on the active only source of XO, so as to keep the vote as long as CPUSS is active. Similar rbcpr_clk_src is also has the same requirement. Signed-off-by: Taniya Das <tdas@codeaurora.org> Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-03clk: qcom: Add lpass clock controller driver for SDM845Taniya Das1-0/+35
Add support for the lpass clock controller found on SDM845 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset. LPASS clocks present on the global clock controller would be registered with the clock framework based on the protected-clock flag. Also do not gate these clocks if they are left unused, as the lpass clocks require the global clock controller lpass clocks to be enabled before they are accessed. Mark the GCC lpass clocks as CRITICAL, for the LPASS clock access. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-18Merge branches 'clk-fixed-rate-remove' and 'clk-qcom-cleanup' into clk-nextStephen Boyd1-16/+0
* clk-fixed-rate-remove: clk: fixed-rate: fix of_node_get-put imbalance * clk-qcom-cleanup: clk: qcom: Remove unused arrays in SDM845 GCC
2018-10-18Merge branches 'clk-spdx', 'clk-qcom-dfs', 'clk-smp2s11-include', 'clk-qcom-8996-missing' and 'clk-qcom-qspi' into clk-nextStephen Boyd1-96/+209
- Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 * clk-spdx: clk: mvebu: use SPDX-License-Identifier clk: renesas: Convert to SPDX identifiers clk: renesas: use SPDX identifier for Renesas drivers clk: s2mps11,s3c64xx: Add SPDX license identifiers clk: max77686: Add SPDX license identifiers * clk-qcom-dfs: clk: qcom: Allocate space for NULL terimation in DFS table clk: qcom: gcc: Register QUPv3 RCGs for DFS on SDM845 clk: qcom: Add support for RCG to register for DFS * clk-smp2s11-include: clk: s2mps11: Use existing defines from bindings for clock IDs * clk-qcom-8996-missing: clk: qcom: Add some missing gcc clks for msm8996 * clk-qcom-qspi: clk: qcom: Add qspi (Quad SPI) clocks for sdm845 clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header
2018-10-18clk: qcom: Remove unused arrays in SDM845 GCCEvan Green1-16/+0
This change removes a parent map and parent name array that appear to be completely unreferenced. Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-28clk: qcom: Add qspi (Quad SPI) clocks for sdm845Douglas Anderson1-0/+56
Add both the interface and core clock. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-27clk: qcom: gcc: Register QUPv3 RCGs for DFS on SDM845Taniya Das1-96/+153
QUPv3 clocks support DFS and thus register the RCGs which require support for the same. Signed-off-by: Taniya Das <tdas@codeaurora.org> [sboyd@kernel.org: Use new macro, split out init structures so they don't have to be copied] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-14Merge branches 'clk-actions-s700', 'clk-exynos-unused', 'clk-qcom-dispcc-845', 'clk-scmi-round' and 'clk-cs2000-spdx' into clk-nextStephen Boyd1-2/+0
* clk-actions-s700: : - Actions Semi Owl series S700 SoC clk driver clk: actions: Add S700 SoC clock support dt-bindings: clock: Add S700 support for Actions Semi Soc's clk: actions: Add missing REGMAP_MMIO dependency * clk-exynos-unused: : - Remove an unused variable from Exynos4412 ISP driver clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable * clk-qcom-dispcc-845: : - Qualcomm SDM845 display clock controller clk: qcom: Add display clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Display clock bindings clk: qcom: Move frequency table macro to common file * clk-scmi-round: : - Fix a thinko bug in SCMI clk division logic clk: scmi: Fix the rounding of clock rate * clk-cs2000-spdx: clk: cs2000-cp: convert to SPDX identifiers
2018-07-06clk: qcom: Move frequency table macro to common fileTaniya Das1-2/+0
Frequency table macro is used by multiple clock drivers, move frequency table macro to common header file. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-03clk: qcom: Enable clocks which needs to be always on for SDM845Amit Nischal1-4/+39
There are certain clocks which needs to be always enabled for system operation. Add support for the same by adding 'CLK_IS_CRITICAL' flag for such clocks. Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-05-08clk: qcom: Add Global Clock controller (GCC) driver for SDM845Taniya Das1-0/+3465
Add support for the global clock controller found on SDM845 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Amit Nischal <anischal@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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