linux-dev - Linux kernel development work

Age	Commit message (Collapse)	Author	Files	Lines
2016-04-28	clk: tegra: Remove trailing blank line	Thierry Reding	1	-1/+0
	Trailing blank lines are undesirable (several tools, such as git, complain about them), so remove it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02	clk: tegra: Remove CLK_IS_ROOT	Stephen Boyd	1	-4/+2
	This flag is a no-op now. Remove usage of the flag. Acked-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20	clk: tegra: Properly include clk.h	Stephen Boyd	1	-1/+0
	Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Only include clk.h in files that are using it. Also add in a clkdev.h include that was missing in a file using clkdev APIs. Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-04-10	clk: tegra: Model oscillator as clock	Thierry Reding	1	-11/+13
	Currently the Tegra clock driver simplifies the clock tree somewhat by taking advantage of the fact that clk_m runs at the same frequency as the oscillator. While that's true on all currently supported SoCs, it does not apply to Tegra210 anymore. On Tegra210 clk_m is typically divided down from the oscillator frequency. To support that setup, add a separate clock for the oscillator that both clk_m and pll_ref derive from. Modify the tegra_osc_clk_init() function to take an additional divider parameter for clk_m. Existing SoCs always pass in 1, whereas Tegra210 will read the divider from a register in the clock & reset controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26	clk: tegra: move PMC, fixed clocks to common files	Peter De Schrijver	1	-0/+111
	Introduce new files for fixed and PMC clocks common between several Tegra SoCs and move Tegra114 to this new infrastructure. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>