linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2019-10-28	clk: ast2600: Fix enabling of clocks	Joel Stanley	1	-3/+4
2019-10-28	clk: hi6220: use CLK_OF_DECLARE_DRIVER	Peter Griffin	1	-1/+2
2019-10-28	clk: at91: avoid sleeping early	Alexandre Belloni	2	-5/+20
2019-10-28	clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock	Fancy Fang	1	-2/+1
2019-10-28	clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM	Leonard Crestez	2	-2/+2
2019-10-28	clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-4/+4
2019-10-28	clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-6/+6
2019-10-28	clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-4/+4
2019-10-28	clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code	Peng Fan	1	-2/+2
2019-10-26	clk: imx7ulp: Correct DDR clock mux options	Anson Huang	1	-2/+2
2019-10-26	clk: imx7ulp: Correct system clock source option #7	Anson Huang	1	-1/+1
2019-10-25	clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume	Marek Szyprowski	1	-0/+6
2019-10-25	clk: imx: imx8mq: mark sys1/2_pll as fixed clock	Peng Fan	1	-6/+2
2019-10-25	clk: imx: imx8mn: mark sys_pll1/2 as fixed clock	Peng Fan	1	-26/+20
2019-10-25	clk: imx: imx8mm: mark sys_pll1/2 as fixed clock	Peng Fan	1	-26/+20
2019-10-25	clk: imx8mn: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-19/+38
2019-10-25	clk: imx8mm: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-19/+38
2019-10-25	clk: imx8mq: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-20/+41
2019-10-23	clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU	Marek Szyprowski	1	-2/+19
2019-10-23	clk: samsung: exynos5433: Fix error paths	Marek Szyprowski	1	-2/+12
2019-10-21	Merge tag 'mmp-soc-for-v5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp into arm/soc	Olof Johansson	2	-1/+6
2019-10-21	clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate()	Geert Uytterhoeven	1	-7/+12
2019-10-21	clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate()	Geert Uytterhoeven	1	-8/+14
2019-10-21	clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()	Geert Uytterhoeven	1	-10/+13
2019-10-17	ARM: mmp: add support for MMP3 SoC	Lubomir Rintel	2	-1/+6
2019-10-16	clk: sprd: Change to use devm_platform_ioremap_resource()	Baolin Wang	1	-3/+1
2019-10-16	clk: s3c2410: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-3/+1
2019-10-16	clk: axs10x: use devm_platform_ioremap_resource() to simplify code	YueHaibing	2	-8/+3
2019-10-16	clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-2/+1
2019-10-16	clk: mediatek: mt7629: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-4/+2
2019-10-16	clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-4/+2
2019-10-16	clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-4/+2
2019-10-16	clk: mediatek: mt6779: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-2/+1
2019-10-16	clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-4/+2
2019-10-16	clk: davinci: use devm_platform_ioremap_resource() to simplify code	YueHaibing	2	-6/+2
2019-10-16	clk: hisilicon: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-3/+1
2019-10-16	clk: bcm2835: use devm_platform_ioremap_resource() to simplify code	YueHaibing	2	-6/+2
2019-10-16	Merge tag 'clk-meson-fixes-v5.4-1' of https://github.com/BayLibre/clk-meson into clk-fixes	Stephen Boyd	2	-2/+12
2019-10-16	clk: imx: imx8mn: drop unused pll enum	Peng Fan	1	-14/+0
2019-10-16	clk: ast2600: remove unused variable 'eclk_parent_names'	YueHaibing	1	-2/+0
2019-10-14	clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code	YueHaibing	1	-3/+1
2019-10-14	clk: imx: clk-pll14xx: Make two variables static	YueHaibing	1	-2/+2
2019-10-14	clk: imx8mq: Add VIDEO2_PLL clock	Laurentiu Palcu	1	-0/+4
2019-10-08	clk: meson: axg_audio: add sm1 support	Jerome Brunet	2	-30/+574
2019-10-08	clk: meson: axg-audio: provide clk top signal name	Jerome Brunet	2	-4/+17
2019-10-08	clk: meson: axg-audio: prepare sm1 addition	Jerome Brunet	1	-685/+782
2019-10-08	clk: meson: axg-audio: fix regmap last register	Jerome Brunet	1	-1/+1
2019-10-08	clk: meson: axg-audio: remove useless defines	Jerome Brunet	1	-4/+0
2019-10-07	clk: renesas: r8a774b1: Add TMU clock	Biju Das	1	-0/+5
2019-10-06	clk: imx8mn: Use common 1443X/1416X PLL clock structure	Anson Huang	2	-79/+12