aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk (follow)
AgeCommit message (Expand)AuthorFilesLines
2019-12-18clk: qcom: Avoid SMMU/cx gdsc corner casesJeffrey Hugo1-0/+2
2019-12-18clk: qcom: gcc-sc7180: Fix setting flag for votable GDSCsMatthias Kaehlcke1-2/+4
2019-12-18clk: Move clk_core_reparent_orphans() under CONFIG_OFOlof Johansson1-7/+7
2019-12-16clk: at91: fix possible deadlockAlexandre Belloni6-6/+6
2019-12-12Merge tag 'imx-clk-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-fixesStephen Boyd3-1/+4
2019-12-12clk: walk orphan list on clock provider registrationJerome Brunet1-22/+40
2019-12-11clk: imx: pll14xx: fix clk_pll14xx_wait_lockPeng Fan1-1/+1
2019-12-09clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_tablePeng Fan1-0/+1
2019-12-09clk: imx: clk-composite-8m: add lock to gate/muxPeng Fan1-0/+2
2019-12-05Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2-1/+6
2019-12-05Merge branch 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linuxLinus Torvalds3-3/+3
2019-12-01Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds115-2241/+7936
2019-11-27Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' into clk-nextStephen Boyd12-10/+1284
2019-11-27Merge branches 'clk-gpio-flags', 'clk-tegra', 'clk-rockchip', 'clk-sprd' and 'clk-pxa' into clk-nextStephen Boyd28-210/+1031
2019-11-27Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspeed' into clk-nextStephen Boyd32-297/+3480
2019-11-27Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-nextStephen Boyd28-1530/+2058
2019-11-27Merge branches 'clk-rohm', 'clk-hisilicon', 'clk-marvell', 'clk-unused' and 'clk-devm-ioremap-resource' into clk-nextStephen Boyd21-199/+130
2019-11-26clk: aspeed: Add RMII RCLK gates for both AST2500 MACsAndrew Jeffery1-1/+26
2019-11-22clk: Add common clock driver for BM1880 SoCManivannan Sadhasivam3-0/+977
2019-11-22clk: Add clk_hw_unregister_composite helper function definitionManivannan Sadhasivam1-0/+11
2019-11-22clk: Zero init clk_init_data in helpersManivannan Sadhasivam5-5/+5
2019-11-22clk: ingenic: Allow drivers to be built with COMPILE_TESTStephen Boyd1-1/+1
2019-11-19clk: mark clk_disable_unused() as __initRasmus Villemoes1-4/+4
2019-11-19clk: Fix memory leak in clk_unregister()Kishon Vijay Abraham I1-0/+1
2019-11-13clk: Ingenic: Add CGU driver for X1000.Zhou Yanjie3-0/+285
2019-11-13clk: tegra: Use match_string() helper to simplify the codeYueHaibing1-8/+4
2019-11-13clk: pxa: fix one of the pxa RTC clocksRobert Jarzmik1-0/+1
2019-11-13clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()Baolin Wang1-1/+1
2019-11-13clk: armada-xp: remove unused codeYueHaibing1-26/+0
2019-11-11clk: tegra: Fix build error without CONFIG_PM_SLEEPYueHaibing1-0/+2
2019-11-11clk: tegra: Optimize PLLX restore on Tegra20/30Dmitry Osipenko2-18/+32
2019-11-11clk: tegra: Add suspend and resume support on Tegra210Sowjanya Komatineni3-4/+163
2019-11-11clk: tegra: Share clk and rst register defines with Tegra clock driverSowjanya Komatineni2-45/+45
2019-11-11clk: tegra: Use fence_udelay() during PLLU initSowjanya Komatineni1-4/+4
2019-11-11clk: tegra: clk-dfll: Add suspend and resume supportSowjanya Komatineni3-0/+59
2019-11-11clk: tegra: clk-super: Add restore-context supportSowjanya Komatineni1-0/+27
2019-11-11clk: tegra: clk-super: Fix to enable PLLP branches to CPUSowjanya Komatineni4-1/+39
2019-11-11clk: tegra: periph: Add restore_context supportSowjanya Komatineni2-0/+37
2019-11-11clk: tegra: Support for OSC context save and restoreSowjanya Komatineni2-0/+16
2019-11-11clk: tegra: pll: Save and restore pll contextSowjanya Komatineni1-32/+54
2019-11-11clk: tegra: pllout: Save and restore pllout contextSowjanya Komatineni1-0/+9
2019-11-11clk: tegra: divider: Save and restore divider rateSowjanya Komatineni1-0/+11
2019-11-11clk: tegra: Reimplement SOR clocks on Tegra210Thierry Reding1-16/+55
2019-11-11clk: tegra: Reimplement SOR clock on Tegra124Thierry Reding1-9/+13
2019-11-11clk: tegra: Rename sor0_lvds to sor0_outThierry Reding3-8/+8
2019-11-11clk: tegra: Move SOR0 implementation to Tegra124Thierry Reding2-8/+49
2019-11-11clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRCThierry Reding2-2/+2
2019-11-11Merge branch 'for-5.5/clk-core' into for-5.5/clkThierry Reding1-0/+18
2019-11-11clk: tegra: Add Tegra20/30 EMC clock implementationDmitry Osipenko5-52/+339
2019-11-11clk: Add API to get index of the clock parentSowjanya Komatineni1-0/+18