linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2014-09-25	clk: Remove .owner field for driver	Kiran Padwal	15	-15/+0
2014-09-25	Merge branch 'clk-next-rockchip' into clk-next	Mike Turquette	1	-36/+56
2014-09-25	clk: rockchip: add clock node in PD_VIDEO	Kever Yang	1	-0/+20
2014-09-26	Merge tag 'at91-soc2' of git://github.com/at91linux/linux-at91 into next/soc	Arnd Bergmann	4	-0/+135
2014-09-25	clk: rockchip: use the clock id for nodes init	Kever Yang	1	-34/+34
2014-09-25	clk: rockchip: add missing rk3288 npll rate table	Heiko Stübner	1	-1/+1
2014-09-25	clk: rockchip: rk3288: fix softreset register count	Mark yao	1	-1/+1
2014-09-24	clk: samsung: exynos4: remove duplicate div_core2 divider clock instantiation	Thomas Abraham	1	-4/+3
2014-09-22	clk: qcom: Add support for banked MD RCGs	Stephen Boyd	3	-56/+77
2014-09-22	clk: qcom: Add support for setting rates on PLLs	Stephen Boyd	2	-1/+87
2014-09-22	clk: qcom: Consolidate frequency finding logic	Stephen Boyd	4	-32/+27
2014-09-22	clk: qcom: Add IPQ8064 PLL required for USB	Andy Gross	1	-1/+30
2014-09-22	clk: samsung: exynos4: fix g3d clocks	Marek Szyprowski	1	-4/+2
2014-09-22	clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks	Marek Szyprowski	1	-2/+2
2014-09-22	clk: samsung: exynos4: add missing smmu_g2d clock and update comments	Marek Szyprowski	1	-0/+1
2014-09-22	clk: samsung: exynos3250: Register DMC clk provider	Krzysztof Kozlowski	1	-0/+195
2014-09-22	clk: samsung: exynos5260: fix typo in clock name	Chander Kashyap	1	-1/+1
2014-09-22	clk: samsung: exynos3250: fix width field of mout_mmc0/1	Pankaj Dubey	1	-2/+2
2014-09-22	clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock	Pankaj Dubey	1	-1/+1
2014-09-22	clk: samsung: exynos3250: fix mout_cam_blk parent list	Pankaj Dubey	1	-0/+1
2014-09-22	clk: at91: add a driver for the h32mx clock	Alexandre Belloni	4	-0/+135
2014-09-18	clk: tegra: Make clock initialization more robust	Tomeu Vizoso	1	-2/+7
2014-09-18	clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks	Mikko Perttunen	1	-0/+8
2014-09-17	Merge branch 'clk-fixes' into clk-next	Mike Turquette	7	-10/+24
2014-09-16	clk: mvebu: fix sscg node lookup	Thomas Petazzoni	2	-5/+5
2014-09-13	clk: sunxi: add correct divider table for sun4i-apb0 clock	Chen-Yu Tsai	1	-0/+9
2014-09-10	Merge branch 'clk-next-debugfs-lock' into clk-next	Mike Turquette	1	-46/+27
2014-09-10	clk: Don't hold prepare_lock across debugfs creation	Stephen Boyd	1	-46/+27
2014-09-10	clk: rockchip: also protect hclk_peri as critical	Heiko Stübner	2	-0/+2
2014-09-10	clk: fractional-divider: cast parent_rate to u64 before multiplying	Heiko Stübner	1	-1/+1
2014-09-09	clk: Add driver for Maxim 77802 PMIC clocks	Javier Martinez Canillas	3	-0/+106
2014-09-09	clk: max77686: Convert to the generic max clock driver	Javier Martinez Canillas	2	-168/+9
2014-09-09	clk: Add generic driver for Maxim PMIC clocks	Javier Martinez Canillas	4	-0/+228
2014-09-09	clk: max77686: Add DT include for MAX77686 PMIC clock	Javier Martinez Canillas	1	-6/+1
2014-09-09	clk/efm32gg: fix dt init prototype	Uwe Kleine-König	1	-3/+3
2014-09-09	clk: zynq: Move const initdata into correct code section	Soren Brinkmann	1	-15/+14
2014-09-09	clk: zynq: Remove pointless return at end of void function	Soren Brinkmann	1	-1/+0
2014-09-09	clk: zynq: Remove unnecessary OOM message	Soren Brinkmann	1	-3/+1
2014-09-09	clk: mvebu: armada-375: Fix the description of the SAR in the comment	Gregory CLEMENT	1	-2/+2
2014-09-09	clk: mvebu: armada-370: Fix timer drift caused by the SSCG deviation	Gregory CLEMENT	1	-0/+8
2014-09-09	clk: mvebu: Fix clk frequency value if SSCG is enabled	Gregory CLEMENT	2	-0/+89
2014-09-03	clk: prevent erronous parsing of children during rate change	Tero Kristo	1	-1/+6
2014-09-03	clk: rockchip: Fix the clocks for i2c1 and i2c2	Doug Anderson	1	-2/+2
2014-09-03	Merge branch 'for-v3.17-rc/ti-clk-driver' of github.com:t-kristo/linux-pm into clk-fixes	Mike Turquette	2	-2/+11
2014-09-02	clk: qcom: Fix sdc 144kHz frequency entry	Stephen Boyd	1	-1/+1
2014-09-02	clk: at91: fix div by zero in USB clock driver	Boris BREZILLON	1	-2/+5
2014-09-02	clk: at91: rework rm9200 USB clock to propagate set_rate to the parent clk	Boris BREZILLON	1	-3/+10
2014-09-02	clk: at91: fix recalc_rate implementation of PLL driver	Boris BREZILLON	1	-8/+3
2014-09-02	clk: at91: rework PLL rate calculation	Boris BREZILLON	1	-70/+77
2014-09-02	clk: at91: fix PLL_MAX_COUNT macro definition	Boris BREZILLON	1	-1/+1