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path: root/drivers/clk (follow)
AgeCommit message (Expand)AuthorFilesLines
2019-06-18clk: imx8mq: Use imx_check_clocks() API directlyAnson Huang1-5/+1
2019-06-18clk: imx: Remove __init for imx_check_clocks() APIAnson Huang1-1/+1
2019-06-17clk: Do a DT parent lookup even when index < 0Stephen Boyd1-1/+1
2019-06-15clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macroHeiko Stuebner4-36/+12
2019-06-14clk: tegra210: Fix default rates for HDA clocksJon Hunter1-0/+2
2019-06-14clk: rockchip: add a type from SGRF-controlled gate clocksHeiko Stuebner1-0/+4
2019-06-12Merge tag 'clk-meson-5.2-1-fixes' of https://github.com/BayLibre/clk-meson into clk-fixesStephen Boyd3-8/+8
2019-06-12clk: xgene: Don't build COMMON_CLK_XGENE by defaultMarc Gonzalez1-1/+1
2019-06-11clk: meson: g12a: mark fclk_div3 as criticalNeil Armstrong1-0/+10
2019-06-11clk: meson: g12a: Add support for G12B CPUB clocksNeil Armstrong2-1/+801
2019-06-11clk: meson-g12a: add temperature sensor clocksGuillaume La Roque2-1/+33
2019-06-11clk: meson: meson8b: add the cts_i958 clockMartin Blumenstingl2-1/+25
2019-06-11clk: meson: meson8b: add the cts_mclk_i958 clocksMartin Blumenstingl2-1/+69
2019-06-11clk: meson: meson8b: add the cts_amclk clocksMartin Blumenstingl2-1/+69
2019-06-07clk: gcc-qcs404: Add PCIe resetsBjorn Andersson1-0/+7
2019-06-07clk: qcom: gdsc: WARN when failing to toggleBjorn Andersson1-1/+3
2019-06-07clk: mmp: frac: Remove set but not used variable 'prev_rate'YueHaibing1-2/+1
2019-06-07clk: ti: Remove unused functionsYueHaibing3-146/+0
2019-06-07clk: mediatek: mt8516: Remove unused variablePhilippe Mazenauer1-5/+0
2019-06-07clk: ingenic/jz4725b: Fix "pll half" divider not read/written properlyPaul Cercueil1-1/+8
2019-06-07clk: ingenic/jz4725b: Fix incorrect dividers for main clocksPaul Cercueil1-5/+24
2019-06-07clk: ingenic/jz4770: Fix incorrect dividers for main clocksPaul Cercueil1-6/+28
2019-06-07clk: ingenic/jz4740: Fix incorrect dividers for main clocksPaul Cercueil1-5/+24
2019-06-07clk: ingenic: Add support for divider tablesPaul Cercueil2-6/+38
2019-06-07clk: keystone: sci-clk: extend clock IDs to 32 bitsTero Kristo1-8/+28
2019-06-07clk: keystone: sci-clk: probe clocks from DT instead of firmwareTero Kristo2-0/+141
2019-06-07clk: keystone: sci-clk: split out the fw clock parsing to own functionTero Kristo1-27/+41
2019-06-07clk: keystone: sci-clk: cut down the clock name lengthTero Kristo1-4/+3
2019-06-07clk: imx6sll: Switch to clk_hw based APIAbel Vesa1-208/+222
2019-06-07clk: imx7d: Switch to clk_hw based APIAbel Vesa1-484/+499
2019-06-07clk: imx6ul: Switch to clk_hw based APIAbel Vesa1-284/+290
2019-06-07clk: imx6sx: Switch to clk_hw based APIAbel Vesa1-320/+334
2019-06-07clk: imx6q: Switch to clk_hw based APIAbel Vesa1-367/+392
2019-06-07clk: imx6sl: Switch to clk_hw based APIAbel Vesa1-195/+209
2019-06-07clk: imx: Switch wrappers to clk_hw based APIAbel Vesa1-26/+65
2019-06-07clk: imx: clk-fixup-mux: Switch to clk_hw based APIAbel Vesa2-5/+13
2019-06-07clk: imx: clk-fixup-div: Switch to clk_hw based APIAbel Vesa2-7/+15
2019-06-07clk: imx: clk-gate-exclusive: Switch to clk_hw based APIAbel Vesa2-7/+15
2019-06-07clk: imx: clk-pfd: Switch to clk_hw based APIAbel Vesa2-6/+13
2019-06-07clk: imx: clk-pllv3: Switch to clk_hw based APIAbel Vesa2-6/+13
2019-06-07clk: imx: clk-gate2: Switch to clk_hw based APIAbel Vesa2-6/+15
2019-06-07clk: imx: clk-cpu: Switch to clk_hw based APIAbel Vesa2-6/+13
2019-06-07clk: imx: clk-busy: Switch to clk_hw based APIAbel Vesa2-12/+29
2019-06-07clk: imx6q: Do not reparent uninitialized IMX6QDL_CLK_PERIPH2 clockAbel Vesa1-8/+0
2019-06-07clk: imx6sx: Do not reparent to unregistered IMX6SX_CLK_AXIAbel Vesa1-2/+0
2019-06-07clk: imx: Add imx_obtain_fixed_clock clk_hw based variantAbel Vesa2-0/+14
2019-06-07clk: imx: imx8mm: correct audio_pll2_clk to audio_pll2_outPeng Fan1-3/+3
2019-06-06clk: mediatek: Remove MT8183 unused clockErin Lo1-19/+0
2019-06-06clk: mediatek: add audsys clock driver for MT8516Fabien Parent3-0/+72
2019-06-06clk: bcm: Allow CLK_BCM2835 for ARCH_BRCMSTBFlorian Fainelli1-2/+2