linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2017-06-02	clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036	Elaine Zhang	1	-0/+1
2017-06-02	clk: rockchip: add clock controller for rk3128	Elaine Zhang	2	-0/+613
2017-06-02	clk: rockchip: export more rk3228 clocks ids	Elaine Zhang	1	-46/+46
2017-06-02	clk: rockchip: add ids for rk3399 testclks used for camera handling	Eddie Cai	1	-2/+2
2017-06-02	Merge tag 'clk-renesas-for-v4.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next	Michael Turquette	14	-72/+1319
2017-06-01	clk: mvebu: cp110: make failure labels more meaningful	Gregory CLEMENT	1	-10/+10
2017-06-01	clk: Fix __set_clk_rates error print-string	Bryan O'Donoghue	1	-1/+1
2017-06-01	clk: scpi: fix return type of __scpi_dvfs_round_rate	Sudeep Holla	1	-3/+3
2017-06-01	clk: qoriq: Separate root input clock for core PLLs on ls1012a	Scott Wood	1	-14/+77
2017-06-01	clk: at91: fix clk-generated parenting	Alexandre Belloni	1	-2/+1
2017-06-01	clk: imx7d: Fix the powerdown bit location of PLL DDR	Fabio Estevam	3	-1/+7
2017-06-01	clk: mvebu: armada-38x: add support for 1866MHz variants	Ralph Sennhauser	1	-3/+4
2017-06-01	Merge branch 'clk-ap806' into clk-next	Michael Turquette	1	-36/+71
2017-06-01	clk: mvebu: ap806: introduce a new binding	Gregory CLEMENT	1	-12/+44
2017-06-01	clk: mvebu: ap806: do not depend anymore of the *-clock-output-names	Gregory CLEMENT	1	-22/+24
2017-06-01	clk: mvebu: ap806: cosmetic improvement	Gregory CLEMENT	1	-7/+8
2017-05-31	clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM	Chen-Yu Tsai	1	-1/+3
2017-05-31	clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM	Chen-Yu Tsai	1	-1/+3
2017-05-29	clk: meson-gxbb: Add EE 32K Clock for CEC	Neil Armstrong	2	-1/+58
2017-05-29	clk: gxbb: remove CLK_IGNORE_UNUSED from clk81	Jerome Brunet	1	-1/+1
2017-05-29	clk: meson: meson8b: mark clk81 as critical	Martin Blumenstingl	1	-1/+1
2017-05-29	clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driver	Martin Blumenstingl	2	-62/+4
2017-05-29	clk: meson-gxbb: un-export the CPU clock	Martin Blumenstingl	1	-1/+1
2017-05-29	clk: meson-gxbb: expose UART clocks	Helmut Klein	1	-3/+3
2017-05-29	clk: meson-gxbb: expose SPICC gate	Neil Armstrong	1	-1/+1
2017-05-29	clk: meson-gxbb: expose spdif master clock	Jerome Brunet	1	-2/+2
2017-05-29	clk: meson-gxbb: expose i2s master clock	Jerome Brunet	1	-1/+1
2017-05-29	clk: meson-gxbb: expose spdif clock gates	Jerome Brunet	1	-2/+2
2017-05-25	Merge tag 'meson-clk-fixes-for-4.12-rc2' of git://github.com/baylibre/clk-meson into clk-fixes	Michael Turquette	1	-0/+1
2017-05-25	clk: sunxi-ng: sun5i: Fix ahb_bist_clk definition	Boris Brezillon	1	-1/+1
2017-05-24	clk: renesas: r8a7794: Add new CPG/MSSR driver	Geert Uytterhoeven	5	-2/+266
2017-05-24	clk: renesas: r8a7792: Add new CPG/MSSR driver	Geert Uytterhoeven	5	-2/+232
2017-05-24	clk: renesas: r8a7791/r8a7793: Add new CPG/MSSR driver	Geert Uytterhoeven	5	-2/+302
2017-05-24	clk: renesas: r8a7790: Add new CPG/MSSR driver	Geert Uytterhoeven	5	-1/+298
2017-05-24	clk: renesas: Rework Kconfig and Makefile logic	Geert Uytterhoeven	4	-37/+135
2017-05-24	clk: renesas: cpg-mssr: Initialize error pointer using ERR_PTR()	Geert Uytterhoeven	1	-1/+1
2017-05-18	clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM	Arnd Bergmann	1	-0/+1
2017-05-17	clk: rockchip: fix up the RK3228 clk cpu setting table	Elaine Zhang	1	-12/+30
2017-05-16	clk: meson: gxbb: fix build error without RESET_CONTROLLER	Tobias Regnery	1	-0/+1
2017-05-15	clk: renesas: r8a7795: Correct pwm, gpio, and i2c parent clocks on ES2.0	Geert Uytterhoeven	1	-13/+26
2017-05-15	clk: renesas: Use pm_clk_no_clocks() helper i.s.o. direct access	Geert Uytterhoeven	2	-2/+2
2017-05-15	clk: renesas: Do not build clk-div6 for R8A7792	Geert Uytterhoeven	1	-1/+1
2017-05-15	clk: renesas: r8a7796: Add INTC-EX clock	Takeshi Kihara	1	-0/+1
2017-05-15	clk: renesas: r8a7796: Add PCIe clocks	Harunobu Kurokawa	1	-0/+2
2017-05-15	clk: renesas: r8a7796: Add PWM clock	Ryo Kodama	1	-0/+1
2017-05-15	clk: renesas: r8a7796: Add HS-USB clock	Kazuya Mizuguchi	1	-0/+1
2017-05-15	clk: renesas: r8a7796: Add Sound DVC clocks	Kazuya Mizuguchi	1	-0/+2
2017-05-15	clk: renesas: r8a7796: Add Sound SRC clock	Kazuya Mizuguchi	1	-0/+13
2017-05-15	clk: renesas: r8a7796: Add Sound SSI clock	Kazuya Mizuguchi	1	-0/+11
2017-05-15	clk: renesas: r8a7796: Add USB-DMAC clocks	Hiromitsu Yamasaki	1	-0/+2