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path: root/drivers/clk (follow)
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2017-06-14Merge tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-nextStephen Boyd7-66/+735
2017-06-14clk: keystone: Add sci-clk driver supportTero Kristo5-9/+743
2017-06-12clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl2-4/+7
2017-06-12clk: meson8b: export the ethernet gate clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the USB clocksMartin Blumenstingl1-5/+5
2017-06-12clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SDIO clockMartin Blumenstingl1-1/+1
2017-06-12clk: meson8b: export the SAR ADC clocksMartin Blumenstingl1-2/+2
2017-06-09clk: samsung: exynos542x: Add EPLL rate tableSylwester Nawrocki1-2/+17
2017-06-09clk: samsung: Add missing exynos5420 audio related clocksSylwester Nawrocki1-3/+7
2017-06-09clk: samsung: Add enable/disable operation for PLL36XX clocksSylwester Nawrocki1-37/+50
2017-06-09clk: samsung: s5pv210-audss: Convert to the new clk_hw APIMarek Szyprowski1-25/+27
2017-06-09clk: samsung: exynos-clkout: Convert to the new clk_hw APIMarek Szyprowski1-9/+9
2017-06-09clk: samsung: exynos-audss: Convert to the new clk_hw APIMarek Szyprowski1-28/+29
2017-06-07clk: samsung: Convert common drivers to the new clk_hw APIMarek Szyprowski5-105/+92
2017-06-07clk: samsung: Add local variable to match its purposeMarek Szyprowski1-4/+5
2017-06-07clk: samsung: Remove dead codeMarek Szyprowski1-4/+0
2017-06-07clk: sunxi-ng: Move all clock types to a libraryStephen Boyd2-132/+22
2017-06-07clk: sunxi-ng: a83t: Add support for A83T's PRCMChen-Yu Tsai1-0/+107
2017-06-07clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83tArnd Bergmann1-0/+1
2017-06-07clk: sunxi-ng: a83t: Fix audio PLL divider offsetChen-Yu Tsai1-1/+1
2017-06-07clk: sunxi-ng: a83t: Fix PLL lock status register offsetChen-Yu Tsai1-1/+1
2017-06-07clk: sunxi-ng: Add driver for A83T CCUChen-Yu Tsai4-0/+998
2017-06-07clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai9-47/+54
2017-06-07clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()Wei Yongjun1-1/+1
2017-06-07clk: sunxi-ng: sun5i: Export video PLLsMaxime Ripard1-2/+4
2017-06-07clk: sunxi-ng: mux: Re-adjust parent rateMaxime Ripard1-5/+28
2017-06-07clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard5-33/+28
2017-06-07clk: sunxi-ng: mux: split out the pre-divider computation codeMaxime Ripard1-12/+20
2017-06-07clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENTMaxime Ripard1-13/+1
2017-06-07clk: sunxi-ng: div: Switch to divider_round_rateMaxime Ripard1-23/+4
2017-06-07clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard6-18/+25
2017-06-07clk: divider: Make divider_round_rate take the parent clockMaxime Ripard1-9/+10
2017-06-07clk: sunxi-ng: explicitly include linux/spinlock.hTobias Klauser1-0/+1
2017-06-07clk: sunxi-ng: add support for DE2 CCUIcenowy Zheng4-0/+294
2017-06-06clk: imx7d: Fix the DDR PLL enable bitFabio Estevam1-1/+1
2017-06-05clk: at91: fix clk-generated compilationAlexandre Belloni1-0/+1
2017-06-02clk: versatile: delete old RealView clock implementationLinus Walleij2-98/+0
2017-06-02clk: bcm2835: Minimise clock jitter for PCM clockPhil Elwell1-5/+29
2017-06-02clk: bcm2835: Limit PCM clock to OSC and PLLD_PERPhil Elwell1-1/+26
2017-06-02clk: bcm2835: Correct the prediv logicPhil Elwell1-1/+3
2017-06-02Merge branch 'clk-bulk-get' into clk-nextStephen Boyd3-1/+194
2017-06-02clk: add managed version of clk_bulk_getDong Aisheng1-0/+36
2017-06-02clk: add clk_bulk_get accessoriesDong Aisheng2-1/+158
2017-06-02clk: meson-gxbb: Add const to some parent name arraysStephen Boyd1-3/+3
2017-06-02Merge tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson into clk-nextStephen Boyd3-74/+73
2017-06-02clk: palmas: undo preparation of a clock source.Arvind Yadav1-0/+1
2017-06-02clk: rockchip: mark some special clk as critical on rk3368Elaine Zhang1-1/+4
2017-06-02clk: rockchip: mark noc and some special clk as critical on rk3288Elaine Zhang1-4/+10
2017-06-02clk: rockchip: mark noc and some special clk as critical on rk3228Elaine Zhang1-1/+29