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2018-03-01dmaengine: qcom: bam_dma: disable runtime pm on remote controlledSrinivas Kandagatla1-2/+9
Remotely controlled BAM instance should not do any power management from CPU side, as cpu can not reliably say if the BAM is busy or not. Disable it for such instances. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-03-01dmaengine: qcom: bam_dma: do not write to global regs in remote modeSrinivas Kandagatla1-5/+8
BAM_DESC_CNT_TRSHLD register is global register, which can only be written when BAM is in master mode, So check the mode of operation before writing it. Without this check SOC's xPU would catch such access and crash the system. First noticed on DB820c while testing SLIMBus BAM. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-03-01dmaengine: qcom: bam_dma: get num-channels and num-ees from dtSrinivas Kandagatla1-5/+22
When Linux is master of BAM, it can directly read registers to know number of supported channels, however when its remotely controlled reading these registers would trigger a crash if the BAM is not yet initialized or powered up on the remote side. This patch allows driver to read num-channels and num-ees from Device Tree for remotely controlled BAM. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-03-01dmaengine: qcom: bam_dma: make bam clk optionalSrinivas Kandagatla1-2/+6
When BAM is remotely controlled it does not sound correct to control its clk on Linux side. Make it optional, so that its not mandatory for remote controlled BAM instances. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2018-01-31Merge branch 'topic/qcom_hidma' into for-linusVinod Koul1-46/+15
2018-01-08dmaengine: qcom_hidma: simplify DT resource parsingRob Herring1-46/+15
The hidma driver open codes populating address and IRQ resources from DT. We have standard functions of_address_to_resource and of_irq_to_resource for this, so use them instead. The DT binding states each child should have 2 addresses and 1 IRQ, so we can simplify the logic and do a fixed size resource allocation. Using the standard of_address_to_resource will also do any address translation which was missing. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-12-13dmaengine: qcom_hidma: Add identity register supportSinan Kaya1-3/+8
The location for destination event channel register has been relocated from offset 0x28 to 0x40. Update the code accordingly. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-12-13dmaengine: qcom_hidma: Add support for the new revisionSinan Kaya1-21/+13
Add support for probing the newer HW and also organize MSI capable hardware into an array for maintenance reasons. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-12-12dmaengine: qcom_hidma: check pending interruptsSinan Kaya1-3/+6
Driver is missing the interrupts if two requests are queued up at the same time as the interrupt handler is servicing a request that was just delivered. The ISR clears the interrupt at the end but it could be clearing the interrupt for an outstanding event. Therefore, second interrupt never arrives. Clear the interrupt first and then check for completions. Also, make sure that request start and interrupt clear do not overlap in time by using a spinlock. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-11-14Merge tag 'dmaengine-4.15-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-60/+109
Pull dmaengine updates from Vinod Koul: "Updates for this cycle include: - new driver for Spreadtrum dma controller, ST MDMA and DMAMUX controllers - PM support for IMG MDC drivers - updates to bcm-sba-raid driver and improvements to sun6i driver - subsystem conversion for: - timers to use timer_setup() - remove usage of PCI pool API - usage of %p format specifier - minor updates to bunch of drivers" * tag 'dmaengine-4.15-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (49 commits) dmaengine: ti-dma-crossbar: Correct am335x/am43xx mux value type dmaengine: dmatest: warn user when dma test times out dmaengine: Revert "rcar-dmac: use TCRB instead of TCR for residue" dmaengine: stm32_mdma: activate pack/unpack feature dmaengine: at_hdmac: Remove unnecessary 0x prefixes before %pad dmaengine: coh901318: Remove unnecessary 0x prefixes before %pad MAINTAINERS: Step down from a co-maintaner of DW DMAC driver dmaengine: pch_dma: Replace PCI pool old API dmaengine: Convert timers to use timer_setup() dmaengine: sprd: Add Spreadtrum DMA driver dt-bindings: dmaengine: Add Spreadtrum SC9860 DMA controller dmaengine: sun6i: Retrieve channel count/max request from devicetree dmaengine: Build bcm-sba-raid driver as loadable module for iProc SoCs dmaengine: bcm-sba-raid: Use common GPL comment header dmaengine: bcm-sba-raid: Use only single mailbox channel dmaengine: bcm-sba-raid: serialize dma_cookie_complete() using reqs_lock dmaengine: pl330: fix descriptor allocation fail dmaengine: rcar-dmac: use TCRB instead of TCR for residue dmaengine: sun6i: Add support for Allwinner A64 and compatibles arm64: allwinner: a64: Add devicetree binding for DMA controller ...
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-09-25dmaengine: qcom-bam: Process multiple pending descriptorsSricharan R1-60/+109
The bam dmaengine has a circular FIFO to which we add hw descriptors that describes the transaction. The FIFO has space for about 4096 hw descriptors. Currently we add one descriptor and wait for it to complete with interrupt and then add the next pending descriptor. In this way, the FIFO is underutilized since only one descriptor is processed at a time, although there is space in FIFO for the BAM to process more. Instead keep adding descriptors to FIFO till its full, that allows BAM to continue to work on the next descriptor immediately after signalling completion interrupt for the previous descriptor. Also when the client has not set the DMA_PREP_INTERRUPT for a descriptor, then do not configure BAM to trigger a interrupt upon completion of that descriptor. This way we get a interrupt only for the descriptor for which DMA_PREP_INTERRUPT was requested and there signal completion of all the previous completed descriptors. So we still do callbacks for all requested descriptors, but just that the number of interrupts are reduced. CURRENT: ------ ------- --------------- |DES 0| |DESC 1| |DESC 2 + INT | ------ ------- --------------- | | | | | | INTERRUPT: (INT) (INT) (INT) CALLBACK: (CB) (CB) (CB) MTD_SPEEDTEST READ PAGE: 3560 KiB/s MTD_SPEEDTEST WRITE PAGE: 2664 KiB/s IOZONE READ: 2456 KB/s IOZONE WRITE: 1230 KB/s bam dma interrupts (after tests): 96508 CHANGE: ------ ------- ------------- |DES 0| |DESC 1 |DESC 2 + INT | ------ ------- -------------- | | (INT) (CB for 0, 1, 2) MTD_SPEEDTEST READ PAGE: 3860 KiB/s MTD_SPEEDTEST WRITE PAGE: 2837 KiB/s IOZONE READ: 2677 KB/s IOZONE WRITE: 1308 KB/s bam dma interrupts (after tests): 58806 Signed-off-by: Sricharan R <sricharan@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Tested-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-08-28dmaengine: qcom: bam_dma: add command descriptor flagAbhishek Sahu1-1/+5
If DMA_PREP_CMD flag is passed in prep_slave_sg then peripheral driver has passed the data is in BAM command descriptor format and BAM driver should set CMD bit for each of the HW descriptors. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-08-21dmaengine: qcom_hidma: avoid freeing an uninitialized pointerAnton Vasilyev1-1/+1
If device_node np doesn't contain child or first child doesn't have property "reg" then hidma_mgmt_of_populate_channels() perfoms deallocation on uninitialized local variable res. The patch adds res initialization by NULL. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Anton Vasilyev <vasilyev@ispras.ru> Reviewed-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-07-19dmaengine: qcom_hidma: correct channel QOS register offsetSinan Kaya1-1/+1
A regression was found while testing QOS with different channels. The QOS register offset is 0x700 rather than 0x300. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-07-19dmaengine: qcom_hidma: correct overriding messageSinan Kaya1-4/+8
A false overriding information is being presented during boot under this scenario. 1. First object checks for kernel command line value against zero. 2. It doesn't find it, it sets the command line variable to the value coming from ACPI/DT. 3. Second object is being probed. 4. Second object sees that the value of kernel command line override is non-zero, it prints an overriding message even though value matches ACPI/DT value. hidma-mgmt QCOM8060:03: overriding max-write-burst-bytes: 1024 Add an additional check to verify that kernel command line value is different from the ACPI/DT value. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-07-19dmaengine: qcom_hidma: introduce memset supportSinan Kaya3-9/+46
HIDMA HW supports memset operation in addition to memcpy. Since the memset API is present on the kernel now, bring the memset feature into life. The descriptor format is the same for both memcpy and memset. Type of the descriptor is 4 when memset is requested. The lowest 8 bits of the source DMA argument is used as a fill pattern. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-07-03dmaengine: qcom_hidma: correct API violation for submitSinan Kaya2-3/+13
Current code is violating the DMA Engine API by putting the submitted requests directly into the HW queue. This causes queued transactions to be started by another thread as soon as the first one finishes. The DMA Engine document clearly states this. "dmaengine_submit() will not start the DMA operation". Move HW queuing of the requests into the issue_pending() routine to comply with API requirements also create a new queued state for temporarily holding the requests. A descriptor goes through these transitions now. free->prepared->queued->active->completed->free as opposed to free->prepared->active->completed->free Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-06-26dmaengine: qcom_hidma: allow ACPI/DT parameters to be overriddenSinan Kaya2-3/+51
Parameters like maximum read/write request size and the maximum number of active transactions are currently configured in DT/ACPI. This patch allows a user to override these to fine tune performance for their application. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27dmaengine: qcom_hidma: pause the channel on shutdownSinan Kaya1-0/+15
We need to ensure that all DMAs and interrupts are cleared during shutdown operation in order for kexec to start the next kernel clearly. Otherwise, HW could be performing a DMA into random addresses in the middle of second kernel start. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-27dmaengine: qcom_hidma: disable/enable IRQs on pause/resumeSinan Kaya1-0/+6
Once the channels are stopped, disable interrupts to make sure no new HW interaction can happen. Similarly, re-enable the interrupts only if we know that channel is operational again. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-23dmaengine: qcom_hidma: autoload while probing ACPISinan Kaya2-0/+2
MODULE_DEVICE_TABLE is used by the kernel to determine which device driver should be loaded for which platform device. MODULE_DEVICE_TABLE has been only defined for the device-tree based platforms in the current code. Defining it also for ACPI based platforms. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-15dmaengine: qcom_hidma: cleanup sysfs entries during removeSinan Kaya2-6/+24
The 4.8-rc8 kernel is printing duplicate file entry warnings while removing the HIDMA object. This is caused by stale sysfs entries remaining from the previous execution. _sysfs_warn_dup+0x5c/0x78 sysfs_add_file_mode_ns+0x13c/0x1c0 sysfs_create_file_ns+0x2c/0x40 device_create_file+0x54/0xa0 hidma_probe+0x7c8/0x808 Create hidma_sysfs_init and hidma_sysfs_uninit functions and call them from the probe and remove path. To do proper clean up, adding the attrs object to the device data structure to keep it around until remove call is made. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-14dmaengine: qcom_hidma: hide MSI handler when unusedArnd Bergmann1-0/+2
The newly added MSI support causes a harmless warning when MSI is disabled: drivers/dma/qcom/hidma.c:558:20: error: 'hidma_chirq_handler_msi' defined but not used [-Werror=unused-function] This adds another #ifdef to match that around the users of the function. Fixes: 1c0e3e82a7fb ("dmaengine: qcom_hidma: add MSI support for interrupts") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-14dmaengine: qcom_hidma: remove unneeded of_node_put()Wei Yongjun1-1/+0
Device node iterators put the previous value of the index variable, so an explicit put causes a double put. Generated by: scripts/coccinelle/iterators/device_node_continue.cocci Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-03dmaengine: qcom_hidma: add MSI support for interruptsSinan Kaya3-6/+147
The interrupts can now be delivered as platform MSI interrupts on newer platforms. The code looks for a new OF and ACPI strings in order to enable the functionality. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-03dmaengine: qcom_hidma: protect common data structuresSinan Kaya1-33/+11
When MSI interrupts are supported, error and the transfer interrupt can come from multiple processor contexts. Each error interrupt is an MSI interrupt. If the channel is disabled by the first error interrupt, the remaining error interrupts will gracefully return in the interrupt handler. If an error is observed while servicing the completions in success case, the posting of the completions will be aborted as soon as channel disabled state is observed. The error interrupt handler will take it from there and finish the remaining completions. We don't want to create multiple success and error messages to be delivered to the client in mixed order. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-03dmaengine: qcom_hidma: bring out interrupt causeSinan Kaya1-29/+33
Bring out the interrupt cause to the top level so that MSI interrupts can be hooked at a later stage. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-11-03dmaengine: qcom_hidma: make pending_tre_count atomicSinan Kaya3-9/+9
Getting ready for the MSI interrupts. The pending_tre_count is used in the interrupt handler to make sure all outstanding requests are serviced. The driver will allocate 11 MSI interrupts. Each MSI interrupt can be assigned to a different CPU. Then, we have a race condition for common variables as they share the same interrupt handler with a different cause bit and they can potentially be executed in parallel. Making this variable atomic so that it can be updated from multiple processor contexts. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-19dmaengine: qcom_hidma: break completion processing on errorSinan Kaya1-0/+7
We try to consume as much successful transfers as possible. Now that we support MSI interrupts, an error interrupt might be observed by another processor while we are finishing the successful ones. Try to abort successful processing if this is the case. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-19dmaengine: qcom_hidma: add a common API to setup the interruptSinan Kaya2-4/+25
Introducing the hidma_ll_setup_irq function to set up the interrupt type externally from the OS interface. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-19dmaengine: qcom_hidma: configure DMA and MSI for OFSinan Kaya1-1/+8
Configure the DMA bindings for the device tree based firmware. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-19dmaengine: qcom_hidma: remove useless debugfs file removalSinan Kaya1-1/+0
Since 'commit acc29fb8f792 ("debugfs: ->d_parent is never NULL or negative")', HIDMA object removal is no longer working. This is due to redundant debugfs remove call in hidma_debug_uninit. debugfs_remove_recursive(dmadev->debugfs); debugfs_remove_recursive(dmadev->stats); The first remove is for the directory. Second remove is for the file under the directory. The directory remove makes file remove invalid. Unable to handle kernel NULL pointer dereference at virtual address [<ffff00000889f480>] down_write+0x18/0x68 [<ffff00000831c220>] debugfs_remove_recursive+0x50/0x1c0 [<ffff00000848e0a8>] hidma_debug_uninit+0x20/0x30 [<ffff00000848c5d8>] hidma_remove+0x48/0x98 [<ffff000008511b6c>] platform_drv_remove+0x24/0x68 [<ffff00000850fac8>] __device_release_driver+0x80/0x118 [<ffff00000850fb84>] device_release_driver+0x24/0x38 [<ffff00000850e928>] unbind_store+0xe8/0x110 [<ffff00000850dd30>] drv_attr_store+0x20/0x30 [<ffff000008253a48>] sysfs_kf_write+0x48/0x58 [<ffff000008252dd8>] kernfs_fop_write+0xb0/0x1d8 [<ffff0000081dab3c>] __vfs_write+0x1c/0x110 [<ffff0000081db940>] vfs_write+0xa0/0x1b8 [<ffff0000081dcd34>] SyS_write+0x44/0xa0 [<ffff000008082ef0>] el0_svc_naked+0x24/0x28 Removing the second line. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-10-18dmaengine: qcom_hidma: prevent disable in errorSinan Kaya1-13/+2
When an error is observed, we try to disable the channel and prevent further accesses from the client. Depending on the type of error, transitioning into disabled state might not be possible. Adding a check to make sure that HW is in enabled/running state before the disable transition happens. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31dmaengine: qcom_hidma: add error reporting for tx_statusSinan Kaya3-31/+33
The HIDMA driver is capable of error detection. However, the error was not being passed back to the client when tx_status API is called. Changing the error handling behavior to follow this oder. 1. dmaengine asserts error interrupt 2. Driver receives and mark's the txn as error 3. Driver completes the txn and intimates the client. No further submissions. Drop the locks before calling callback, as subsequent processing by client maybe in callback thread. 4. Client invokes status and you can return error 5. On error, client calls terminate_all. You can reset channel, free all descriptors in the active, pending and completed lists 6. Client prepares new txn and so on. As part of this work, got rid of the reset in the interrupt handler when an error happens and the HW is put into disabled state. The only way to recover is for the client to terminate the channel. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31dmaengine: qcom_hidma: report transfer errors with new interfaceSinan Kaya1-2/+8
Pass the DMA errors to the client by passing a result argument. The HW only supports a generic error when something goes wrong. That's why, using DMA_TRANS_ABORTED all the time. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-31dmaengine: qcom_hidma: release the descriptor before the callbackSinan Kaya1-8/+10
There is a race condition between data transfer callback and descriptor free code. The callback routine may decide to clear the resources even though the descriptor has not yet been freed. Instead of calling the callback first and then releasing the memory, this code is changing the order to return the descriptor back to the free pool and then call the user provided callback. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-08-08dmaengine: qcom_hidma: convert callback to helper functionDave Jiang1-8/+3
This is in preperation of moving to a callback that provides results to the callback for the transaction. The conversion will maintain current behavior and the driver must convert to new callback mechanism at a later time in order to receive results. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-28Merge branch 'topic/dmaengine_cleanups' into for-linusVinod Koul2-0/+2
2016-07-24dmaengine: qcom_hidma: use for_each_matching_node() macroWei Yongjun1-2/+1
Use for_each_matching_node() macro instead of open coding it. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-23dmaengine: qcom_hidma_lli: kill the tasklets upon exitVinod Koul1-0/+1
drivers should ensure that tasklets are killed, so that they can't be run after driver remove is executed Signed-off-by: Vinod Koul <vinod.koul@intel.com> Cc: Sinan Kaya <okaya@codeaurora.org>
2016-07-23dmaengine: qcom_hidma: kill the tasklets upon exitVinod Koul1-0/+1
drivers should ensure that tasklets are killed, so that they can't be run after driver remove is executed Signed-off-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Sinan Kaya <okaya@codeaurora.org>
2016-07-16Merge branch 'topic/bam' into for-linusVinod Koul1-1/+108
2016-07-12dmaengine: qcom_hidma: fix return value check in hidma_mgmt_of_populate_channels()Wei Yongjun1-2/+2
In case of error, the function platform_device_register_full() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-06dmaengine: qcom-bam-dma: add __maybe_unused annotations for PMArnd Bergmann1-6/+5
The bam_dma driver gained runtime PM support, but that causes build warnings whenever CONFIG_PM is disabled: drivers/dma/qcom/bam_dma.c:1324:12: error: 'bam_dma_runtime_resume' defined but not used [-Werror=unused-function] static int bam_dma_runtime_resume(struct device *dev) ^~~~~~~~~~~~~~~~~~~~~~ drivers/dma/qcom/bam_dma.c:1315:12: error: 'bam_dma_runtime_suspend' defined but not used [-Werror=unused-function] static int bam_dma_runtime_suspend(struct device *dev) This removes the incomplete #ifdef guard and instead marks all four PM functions as __maybe_unused, which avoids this kind of warning. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 7d2545599f5b ("dmaengine: qcom-bam-dma: Add pm_runtime support") Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-06-30dmaengine: qcom-bam-dma: Add pm_runtime supportPramod Gurav1-1/+109
Adds pm_runtime support for BAM DMA so that clock is enabled only when there is a transaction going on to help save power. Signed-off-by: Pramod Gurav <pramod.gurav@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-14dmaengine: qcom_hidma: add support for object hierarchySinan Kaya2-5/+147
In order to create a relationship model between the channels and the management object, we are adding support for object hierarchy to the drivers. This patch simplifies the userspace application development. We will not have to traverse different firmware paths based on device tree or ACPI based kernels. No matter what flavor of kernel is used, objects will be represented as platform devices. The new layout is as follows: hidmam_10: hidma-mgmt@0x5A000000 { compatible = "qcom,hidma-mgmt-1.0"; ... hidma_10: hidma@0x5a010000 { compatible = "qcom,hidma-1.0"; ... } } The hidma_mgmt_init detects each instance of the hidma-mgmt-1.0 objects in device tree and calls into the channel driver to create platform devices for each child of the management object. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-14dmaengine: qcom_hidma: add debugfs hooksSinan Kaya4-2/+224
Add debugfs hooks for debugging the execution behavior of the DMA channel. The debugfs hooks get initialized by the probe function and uninitialized by the remove function. A stats file is created in debugfs. The stats file will show the information about each HIDMA channel as well as each asynchronous job queued and completed at a given time. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-14dmaengine: qcom_hidma: implement lower level hardware interfaceSinan Kaya4-25/+895
This patch implements the hardware hooks for the HIDMA channel driver. The main functions of interest are: - hidma_ll_init - hidma_ll_request - hidma_ll_queue_request - hidma_ll_hw_start OS layer calls the hidma_ll_init function during probe to set up the hardware. At this moment, the number of supported descriptors are also given. On each request, a descriptor is allocated from the free pool and filled in with the transfer parameters. Multiple requests can be queued into the hardware via the OS interface. When client is ready for requests to be executed, start method is called. Completions are delivered via callbacks via tasklet. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-19dmaengine: qcom: bam_dma: rename BAM_MAX_DATA_SIZE defineStanimir Varbanov1-8/+8
It seems that the define has not been with acurate name and makes confusion while reading the code. The more acurate name should be BAM_FIFO_SIZE. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>