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Some of i.MX8 processors (e.g i.MX8QM, i.MX8QXP) contain
the Tensilica HiFi4 DSP for advanced pre- and post-audio
processing.
The communication between Host CPU and DSP firmware is
taking place using a shared memory area for message passing
and a dedicated Messaging Unit for notifications.
DSP IPC protocol offers a doorbell interface using
imx-mailbox API.
We use 4 MU channels (2 x TXDB, 2 x RXDB) to implement a
request-reply protocol.
Connection 0 (txdb0, rxdb0):
- Host writes messasge to shared memory [SHMEM]
- Host sends a request [MU]
- DSP handles request [SHMEM]
- DSP sends reply [MU]
Connection 1 (txdb1, rxdb1):
- DSP writes a message to shared memory [SHMEM]
- DSP sends a request [MU]
- Host handles request [SHMEM]
- Host sends reply [MU]
The protocol interface will be used by a Host client to
communicate with the DSP. First client will be the i.MX8
part from Sound Open Firmware infrastructure.
The protocol offers the following interface:
On Tx:
- imx_dsp_ring_doorbell, will be called to notify the DSP
that it needs to handle a request.
On Rx:
- clients need to provide two callbacks:
.handle_reply
.handle_request
- the callbacks will be used by the protocol on
notification arrival from DSP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The DSP interrupt steer gathers interrupts from the system
and can be used to steer them to DSP.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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LSIO subsystem contains 14 MU instances.
5 MUs to communicate between AP <-> SCU
- side-A PD range managed by AP
- side-B PD range managed by SCU
9 MUs to communicate between all cores (AP/M4/DSP).
- side-A PD range managed by core-A (AP/M4/DSP)
- side-B PD range managed by core-B (AP/M4/DSP).
Communication between AP <-> DSP is done through the
assigned MU number 13.
So, we power up side-A by the AP and we decide to
power up side-B also from AP. This is because powering
it up from DSP would be painful.
Powering up side B from DSP would require the DSP to
communicate with SCU and to keep things simple we don't
want that now.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Messaging Unit module enables two processors within the SoC to
communicate and coordinate by passing messages through the MU interface.
MUs have 2 “sides” with independent programming interfaces. Rename
mu PD range to mu_a because it's actually side A of MUs.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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i.MX fixes for 5.2:
- A build fix for soc-imx8 driver which needs SOC_BUS support. To
avoid dealing with the dependency for every single i.MX SoC bus
driver, we selects at from architecture level.
- A fix on i.MX SCU firmware driver to ensure SCU irq is enabled only
after IPC is ready.
- A regression fix on cpuidle-imx6sx driver, which causes some
characters loss on serial communication.
* tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: cpuidle-imx6sx: Restrict the SW2ISO increase to i.MX6SX
firmware: imx: SCU irq should ONLY be enabled after SCU IPC is ready
arm64: imx: Fix build error without CONFIG_SOC_BUS
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The imx_scu_irq_group_enable() is normally called during module driver
probe phase to enable SCU group irq, if SCU IPC is NOT ready, below
dump will show out:
[ 0.933001] Hardware name: Freescale i.MX8QXP MEK (DT)
[ 0.938129] pstate: 60000005 (nZCv daif -PAN -UAO)
[ 0.942907] pc : imx_scu_call_rpc+0x114/0x158
[ 0.947251] lr : imx_scu_irq_group_enable+0x74/0xc4
[ 0.952113] sp : ffff00001005bae0
[ 0.955415] x29: ffff00001005bae0 x28: ffff0000111bb0a0
[ 0.960712] x27: ffff00001140b000 x26: ffff00001111068c
[ 0.966011] x25: ffff0000111bb100 x24: 0000000000000000
[ 0.971311] x23: ffff0000113d9cd8 x22: 0000000000000001
[ 0.976610] x21: 0000000000000001 x20: ffff80083b51a410
[ 0.981909] x19: ffff000011259000 x18: 0000000000000480
[ 0.987209] x17: 000000000023ffb8 x16: 0000000000000010
[ 0.992508] x15: 000000000000023f x14: ffffffffffffffff
[ 0.997807] x13: 0000000000000018 x12: 0000000000000030
[ 1.003107] x11: 0000000000000003 x10: 0101010101010101
[ 1.008406] x9 : ffffffffffffffff x8 : 7f7f7f7f7f7f7f7f
[ 1.013706] x7 : fefefeff646c606d x6 : 0000000000000000
[ 1.019005] x5 : ffff0000112596c8 x4 : 0000000000000008
[ 1.024304] x3 : 0000000000000003 x2 : 0000000000000001
[ 1.029604] x1 : ffff00001005bb58 x0 : 0000000000000000
[ 1.034905] Call trace:
[ 1.037341] imx_scu_call_rpc+0x114/0x158
[ 1.041334] imx_scu_irq_group_enable+0x74/0xc4
[ 1.045856] imx_sc_wdt_probe+0x24/0x150
[ 1.049766] platform_drv_probe+0x4c/0xb0
[ 1.053762] really_probe+0x1f8/0x2c8
[ 1.057407] driver_probe_device+0x58/0xfc
[ 1.061490] device_driver_attach+0x68/0x70
[ 1.065660] __driver_attach+0x94/0xdc
[ 1.069397] bus_for_each_dev+0x64/0xc0
[ 1.073220] driver_attach+0x20/0x28
[ 1.076782] bus_add_driver+0x148/0x1fc
[ 1.080601] driver_register+0x68/0x120
[ 1.084424] __platform_driver_register+0x4c/0x54
[ 1.089120] imx_sc_wdt_driver_init+0x18/0x20
[ 1.093463] do_one_initcall+0x58/0x1b8
[ 1.097287] kernel_init_freeable+0x1cc/0x288
[ 1.101630] kernel_init+0x10/0x100
[ 1.105101] ret_from_fork+0x10/0x18
[ 1.108669] ---[ end trace 9e03302114457de9 ]---
[ 1.113296] enable irq failed, group 1, mask 1, ret -22
To avoid such scenario, return -EPROBE_DEFER in imx_scu_irq_group_enable()
API if SCU IPC is NOT ready, then module driver which calls this API
in probe phase will defer probe after SCU IPC ready.
Fixes: 851826c7566e ("firmware: imx: enable imx scu general irq function")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The System Controller Firmware (SCFW) controls RTC, thermal
and WDOG etc., these resources' interrupt function are managed
by SCU. When any IRQ pending, SCU will notify Linux via MU general
interrupt channel #3, and Linux kernel needs to call SCU APIs
to get IRQ status and notify each module to handle the interrupt.
Since there is no data transmission for SCU IRQ notification, so
doorbell mode is used for this MU channel, and SCU driver will
use notifier mechanism to broadcast to every module which registers
the SCU block notifier.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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As resource power domain service is provided by SCU firmware, no
SS information required. So we can remove the SS indicator from
the domain names, then the domains defined can be better shared
among different SCU based platforms.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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As the domain resource id in the same type may not be continuous, so it's
hard to describe all such power domains with current struct imx_sc_pd_range.
Adding the optional base for domain name index to address this issue.
Then we can add the discrete domains easily later.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Using bool instead 0/1 to indicate whether adding a postfix for domain
names which can improve the code readability and less confusing.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This is done via RPC call to SCU.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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SCU power domain can be used in the same way by IMX8QXP and IMX8QM SoCs.
Make the driver support the fallback compatible string "fsl,scu-pd" to
allow other SoCs to reuse the common part.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Some i.MX SoCs contain a system controller that is responsible for
controlling the state of the IPs that are present. Communication
between the host processor running an OS and the system controller
happens through a SCU protocol. This patch adds SCU protocol based
power domains drivers.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add SCU MISC SVC support which provides misc control get/set functions.
Cc: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The System Controller Firmware (SCFW) is a low-level system function
which runs on a dedicated Cortex-M core to provide power, clock, and
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
(QM, QP), and i.MX8QX (QXP, DX).
This patch implements the SCU firmware IPC function and the common
message sending API sc_call_rpc.
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Daniel Baluta
Olof Johansson
Thomas Gleixner
Anson Huang
Aisheng Dong