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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c (follow)
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2018-06-19drm/amdgpu: Don't default to DC support for Kaveri and olderHarry Wentland1-1/+9
We've had a number of users report failures to detect and light up display with DC with LVDS and VGA. These connector types are not currently supported with DC. I'd like to add support but unfortunately don't have a system with LVDS or VGA available. In order not to cause regressions we should probably fallback to the non-DC driver for ASICs that support VGA and LVDS. These ASICs are: * Bonaire * Kabini * Kaveri * Mullins ASIC support can always be force enabled with amdgpu.dc=1 v2: Keep Hawaii on DC v3: Added Mullins to the list Cc: stable@vger.kernel.org Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-06-13drm/amdgpu: fix CG enabling hang with gfxoff enabledHuang Rui1-0/+12
After defer the execution of clockgating enabling, at that time, gfx already enter into "off" state. Howerver, clockgating enabling will use MMIO to access the gfx registers, then get the gfx hung. So here we should move the gfx powergating and gfxoff enabling behavior at the end of initialization behind clockgating. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Cc: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: skip CG for VCN when late_init/finiRex Zhu1-0/+2
VCN clockgating is handled manually like VCE and UVD. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-23Remove calls to suspend/resume atomic helpers from amdgpu_device_gpu_recover. (v2)Andrey Grodzovsky1-9/+1
First of all it's already being called from the display code from amd_ip_funcs.suspend/resume hooks. Second of all, the place in amdgpu_device_gpu_recover it's being called is wrong for GPU stalls since it is called BEFORE we cancel and force completion of all in flight jobs which were not yet processed. So, as Bas pointed in the ticket we will try to wait for fence in amdgpu_pm_compute_clocks but the pipe is hanged so we end up in deadlock. v2: remove unused variable Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106500 Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu: Add vega20 to dc support check (v2)Feifei Xu1-0/+1
v2: fix whitespace Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu: set asic family for vega20.Feifei Xu1-0/+1
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu: Add gpu_info firmware for vega20. (v2)Feifei Xu1-0/+1
vega20_gpu_info firmware stores gpu configuration for vega20. v2: drop gpu info firmware for vega20 Squash of: drm/amdgpu: Add gpu_info firmware for vega20. drm/amdgpu: drop gpu_info firmware for vega20 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu: Add vega20 to asic_type enum.Feifei Xu1-0/+1
Add vega20 to amd_asic_type enum and amdgpu_asic_name[]. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: For sriov reset, move IB test into exclusive modeEmily Deng1-3/+2
When put the IB test out of exclusive mode, and do sriov reset, the IB test will randomly fail. As out of exclusive mode it uses kiq to do read and write registers, but as it has world switch, the kiq read and write time will be random, sometimes it will beyond the MAX_KIQ_REG_WAIT and then the read or write register will fail, which will result the IB test fail. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: add VEGAM dc support checkLeo Liu1-1/+2
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: set VEGAM to ASIC family and ip blocksLeo Liu1-1/+2
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: bypass GPU info firmware load for VEGAMLeo Liu1-1/+2
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: add VEGAM ASIC typeLeo Liu1-0/+1
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: it should disable gfxoff when system is going to suspendHuang Rui1-0/+6
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: use pp_feature member to store the maskHuang Rui1-0/+2
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: Reserved vram for smu to save debug info.Rex Zhu1-0/+44
v2: check reserved vram size before allocate. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: defer test IBs on the rings at boot (V3)Shirish S1-11/+6
amdgpu_ib_ring_tests() runs test IB's on rings at boot contributes to ~500 ms of amdgpu driver's boot time. This patch defers it and ensures that its executed in amdgpu_info_ioctl() if it wasn't scheduled. V2: Use queue_delayed_work() & flush_delayed_work(). V3: removed usage of separate wq, ensure ib tests is run before enabling clockgating. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amd/display: Remove PRE_VEGA flagHarry Wentland1-3/+0
We enabled this upstream by default now and no longer need the flag. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amdgpu: use new asic need_full_reset callbackAlex Deucher1-0/+6
Use the new callback to determine whether to use full asic reset or per IP soft reset. Enables reset to actually proceed on asics which don't support soft reset yet. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amdgpu: Move GEM BO to drm_framebufferDaniel Stone1-3/+3
Since drm_framebuffer can now store GEM objects directly, place them there rather than in our own subclass. As this makes the framebuffer create_handle and destroy functions the same as the GEM framebuffer helper, we can reuse those. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Stone <daniels@collabora.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: David (ChunMing) Zhou <David1.Zhou@amd.com> Cc: amd-gfx@lists.freedesktop.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amdgpu: remove duplicate cg/pg wrapper functionsRex Zhu1-2/+4
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König<christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21drm/amdgpu: Fix NULL ptr on driver unload due to init failure.Andrey Grodzovsky1-1/+0
Problem: When unloading due to failure amdgpu_device_fini was called twice which was leading to NULL ptr in amdgpu_irq_disable_all. Fix: Call amdgpu_device_fini only once from amdgpu_driver_unload_kms. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21drm/amdgpu: add vega12 to dc support checkAlex Deucher1-0/+1
DC is used for modesetting on vega12. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21drm/amdgpu: set asic family and ip blocks for vega12Alex Deucher1-2/+3
soc15 just like vega10 and raven. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21drm/amdgpu: add gpu_info firmware for vega12Alex Deucher1-0/+4
Stores gpu configuration details. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21drm/amdgpu: add vega12 to asic_type enumFeifei Xu1-0/+1
Add vega12 to amd_asic_type enum and amdgpu_asic_name[]. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-20drm/amdgpu: Fix kernel NULL pointer dereference when amdgpu finiRex Zhu1-1/+2
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20drm/amdgpu - Disable all irqs before disabling all CRTCsMikita Lipski1-3/+2
By moving amdgpu_irq_disable_all earlier in the sequence fixes an issue with disabling pflip interrupts: *ERROR* dal_irq_service_dummy_ack: called for non-implemented irq source Earlier patch fixed a memory corruption and revealed irq warnings.This way it seems to be there no obvious issues with unloading the module. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20drm/amdgpu: Disable irq on device before destroying itMikita Lipski1-2/+3
Disable irq on devices before destroying them. That prevents use-after-free memory access when unloading the driver. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20drm/amdgpu: Use atomic function to disable crtcs with dc enabledMikita Lipski1-3/+6
This change fixes the deadlock when unloading the driver with displays connected. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20drm/amdgpu: add documentation for amdgpu_device.cAlex Deucher1-12/+427
Add kernel doc for the functions in amdgpu_device.c Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Call amdgpu_ucode_fini_bo in amd_powerplay.cRex Zhu1-3/+0
make it symmetric with amdgpu_ucode_init_bo in amd_powerplay.c refine the "commit b22558bb4ff8fc9fe925222f90297d7a03a5fb20" Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Don't compared ip_block_type with ip_block_indexRex Zhu1-1/+1
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Plus NULL function pointer checkRex Zhu1-3/+6
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: move getting pcie info to common codeAlex Deucher1-1/+5
No need to replicate it in several places. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: move firmware loading type setup to common codeAlex Deucher1-0/+2
No need to replicate it in several places. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: implement mmio byte access helper for MBMonk Liu1-0/+26
mailbox registers can be accessed with a byte boundry according to BIF team, so this patch prepares register byte access and will be used by following patches. Actually, for mailbox registers once the byte field is touched even not changed, the mailbox behaves, so we need the byte width accessing to those sort of regs. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Pixel Ding <Pixel.Ding@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: Correct the amdgpu_ucode_fini_bo place for TongaEmily Deng1-0/+3
The amdgpu_ucode_fini_bo should be called after gfx_v8_0_hw_fini, or it will have KCQ disable failed issue. For Tonga, as it firstly finishes SMC block, and the SMC hw fini will call amdgpu_ucode_fini, which will lead the amdgpu_ucode_fini_bo called before gfx_v8_0_hw_fini, this is incorrect. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: Correct the place of amdgpu_pm_sysfs_finiEmily Deng1-1/+1
The amdgpu_pm_sysfs_fini should call before amdgpu_device_ip_fini, or the adev->pm.dpm_enabled would be set to 0, then the device files related to pp won't be removed by amdgpu_pm_sysfs_fini when unload driver. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-01drm/amdgpu: cleanups for vram lost handlingMonk Liu1-65/+72
1)create a routine "handle_vram_lost" to do the vram recovery, and put it into amdgpu_device_reset/reset_sriov, this way no need of the extra paramter to hold the VRAM LOST information and the related macros can be removed. 3)show vram_recover failure if time out, and set TMO equal to lockup_timeout if vram_recover is under SRIOV runtime mode. 4)report error if any ip reset failed for SR-IOV Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-01drm/amdgpu: stop all rings before doing gpu recoverMonk Liu1-25/+15
found recover_vram_from_shadow sometimes get executed in paralle with SDMA scheduler, should stop all schedulers before doing gpu reset/recover Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-28drm/amdgpu: move WB_FREE to correct placeMonk Liu1-5/+7
WB_FREE should be put after all engines's hw_fini done, otherwise the invalid wptr/rptr_addr would still be used by engines which trigger abnormal bugs. This fixes couple DMAR reading error in host side for SRIOV after guest kmd is unloaded. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-28drm/amdgpu: fix&cleanups for wb_clearMonk Liu1-2/+3
fix: should do right shift on wb before clearing cleanups: 1,should memset all wb buffer 2,set max wb number to 128 (total 4KB) is big enough Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: Unify the dm resume calls into oneMikita Lipski1-9/+0
amdgpu_dm_display_resume is now called from dm_resume to unify DAL resume call into a single function call There is no more need to separately call 2 resume functions for DM. Initially they were separated to resume display state after cursor is pinned. But because there is no longer any corruption with the cursor - the calls can be merged into one function hook. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: Add place holder for soc15 asic init on emulationShaoyun Liu1-14/+4
Add common smu_soc_asic_init function to emulate the sillicon post sequence Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: Double the timeout count on emulation modeShaoyun Liu1-0/+2
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: Fix none-powerplay issue when load driver on emulation modeShaoyun Liu1-0/+3
On emulation mode , driver will be loaded with powerplay disabled Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: Basic emulation supportShaoyun Liu1-3/+23
Add amdgpu_emu_mode module parameter to control the emulation mode Avoid vbios operation on emulation since there is no vbios post duirng emulation, use the common hw_init to simulate the post Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Acked-By: Alex Deucher <alexander.deucher@amd.com> Acked-By: Christian Konig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: Enable ip block bit mask print out info by defaultShaoyun Liu1-1/+1
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: remove DC special casing for KB/MLAlex Deucher1-3/+2
It seems to be working now. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102372 Reviewed-by: Mike Lothian <mike@fireburn.co.uk> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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