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path: root/drivers/gpu/drm/amd/amdgpu/soc15.c (follow)
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2018-12-13Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm-nextDave Airlie1-0/+3
[airlied: make etnaviv build again] amdgpu: - DC trace support - More DC documentation - XGMI hive reset support - Rework IH interaction with KFD - Misc fixes and cleanups - Powerplay updates for newer polaris variants - Add cursor plane update fast path - Enable gpu reset by default on CI parts - Fix config with KFD/HSA not enabled amdkfd: - Limit vram overcommit - dmabuf support - Support for doorbell BOs ttm: - Support for simultaneous submissions to multiple engines scheduler: - Add helpers for hw with preemption support Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181207233119.16861-1-alexander.deucher@amd.com
2018-12-06Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm-nextDave Airlie1-1/+22
amdgpu and amdkfd: - Freesync support - ABM support in DC - KFD support for vega12 and polaris12 - Add sdma paging queue support for vega - Use ACPI to query backlight range on supported platforms - Clean up doorbell handling - KFD fix for pasid handling under non-HWS - Misc cleanups and fixes scheduler: - Revert "fix timeout handling v2" radeon: - Fix possible overflow on 32 bit ttm: - Fix for LRU handling for ghost objects Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181130192505.2946-1-alexander.deucher@amd.com
2018-12-03drm/amdgpu: add a xgmi supported flagAlex Deucher1-0/+3
Use this to track whether an asic supports xgmi rather than checking the asic type everywhere. Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-28drm/amdgpu: Doorbell layout for vega20 and future asicOak Zeng1-1/+21
This introduces new doorbell layout for vega20 and future asics v2: Use enum definition instead of hardcoded value Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-28drm/amdgpu: Vega10 doorbell index initializationOak Zeng1-0/+1
v2: Use enum definition instead of hardcoded value v3: Remove unused enum definition Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-20drm/amdgpu: Enable HDP memory light sleepKenneth Feng1-7/+32
Due to the register name and setting change of HDP memory light sleep on Vega20,change accordingly in the driver. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-10drm/amdgpu: Change AI gfx/sdma/smu init sequenceRex Zhu1-4/+4
initialize gfx/sdma before dpm features enabled. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26drm/amdgpu:Enable DPG mode on PCOJames Zhu1-1/+2
Add flag AMD_PG_SUPPORT_DPG to enable DPG mode on Picasso Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-19drm/amdgpu: Exclude MM engines for vega20 virtual deviceFrank Min1-2/+4
Temporary disable UVD/VCE block if is virtual device Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: simplify Raven, Raven2, and Picasso handlingAlex Deucher1-36/+30
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu/soc15: clean up picasso supportAlex Deucher1-17/+0
It's the same as raven so remove the duplicate case. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: set CG flags for raven2 (v2)Huang Rui1-20/+37
Raven2 does not enable all of the CG flags that raven1 does. v2: rebase (Alex) Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: set external rev id for raven2Alex Deucher1-1/+4
It's different from raven1. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: move get_rev_id at first before load gpu_info firmwareHuang Rui1-6/+7
Rev id is used for identifying Raven2 series of chips. So we would better to initialize it at first. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: add ip blocks for picasso (v2)Huang Rui1-0/+18
Add PCO IPs. V2: enable VCN as well Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: enable vcn powergating for PCOKenneth Feng1-1/+3
enable vcn pg Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: enable mmhub power gatingKenneth Feng1-1/+1
Remove some functions due to the design change. All the mmhub power gating sequence is moved to smu fw.Driver sends the message to enable mmhub powergating.We can also skip the fw version check since the old fw version is in a very early stage and we don't use that fw for release. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: Enable SDMA power gating for PCOKenneth Feng1-0/+2
Enable SDMA power gating Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: Add pg support for gfxoff for PCOKenneth Feng1-1/+4
Add pg support for gfxoff. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-14drm/amdgpu: add soc15 support for picassoLikun Gao1-0/+21
Add the IP blocks, clock and powergating flags, and common clockgating support. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amdgpu: Add psp 11.0 support for vega20. (v2)Feifei Xu1-2/+3
Add psp 11.0 code for vega20 and enable it. PSP is the security processor for the GPU. It handles firmware loading and GPU resets among other things. v2: whitespace fix, enable support, adjust reg includes (Alex) Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amdgpu: enable vega20 powerplay supportEvan Quan1-2/+2
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27drm/amdgpu: Add nbio 7.4 support for vega20 (v3)Feifei Xu1-0/+2
Some register offset in nbio v7.4 are different with v7.0. We need a seperate nbio_v7_4.c for vega20. v2: fix doorbell range for sdma (Alex) v3: squash in static fix (kbuild test robot) Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-27Revert "drm/amdgpu: Add nbio support for vega20 (v2)"Alex Deucher1-2/+0
Revert this to add proper nbio 7.4 support. This reverts commit f5b2e1fa321eff20a9418ebd497d8a466f024a85. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-30drm/amdgpu: typo fix for vega20 cg flagsEvan Quan1-0/+1
The AMD_CG_SUPPORT_HDP_LS was wrongly written as AMD_CG_SUPPORT_BIF_LS. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Enable VCN static PG by default on RVRex Zhu1-1/+2
Enable static VCN powergating by default on Raven. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Enable VCN CG by default on RVRex Zhu1-1/+2
Enable VCN clockgating by default on Raven. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-18drm/amdgpu: Switch to use df_v3_6_funcs for vega20 (v2)Feifei Xu1-1/+5
v2: fix whitespace (Alex) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-18drm/amdgpu/vg20:Enable UVD/VCE for Vega20James Zhu1-4/+2
Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default. So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled at this moment. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-18drm/amdgpu: Disable ip modules that are not ready yetFeifei Xu1-5/+9
Please enable above ips on soc15.c when they're available. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-18drm/amd/powerplay: update vega20 cg flags (v2)Evan Quan1-1/+17
v2: remove duplicate flag. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu: Add nbio support for vega20 (v2)Feifei Xu1-0/+2
Some register offset in nbio v7.4 are different with v7.0. v2: Use nbio7.0 for now. TODO: add a new nbio 7.4 module (Alex) Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu/soc15: Add ip blocks for vega20 (v2)Feifei Xu1-0/+1
Same as vega10 now. v2: squash in typo fix Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu/soc15: dynamic initialize ip offset for vega20Feifei Xu1-0/+3
Vega20 need a seperate vega20_reg_init.c due to ip base offset difference. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu/soc15: Set common clockgating for vega20.Feifei Xu1-0/+1
Same as vega10 for now. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu/soc15:Add vega20 soc15_common_early_init supportFeifei Xu1-0/+5
Set external_rev_id and disable cg,pg for now. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-17drm/amdgpu: Drop the unused header files in soc15.c.Feifei Xu1-2/+0
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu: set CGPG if gfxoff is enabled for ravenHuang Rui1-0/+5
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15drm/amdgpu/gfx9: cache DB_DEBUG2 and make it available to userspaceAlex Deucher1-0/+3
Userspace needs to query this value to work around a hw bug in certain cases. Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amdgpu/soc15: implement asic need_full_reset callbackAlex Deucher1-0/+7
Used to check on a per SoC basis whether the SoC needs a full reset of a per IP soft reset. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amdgpu: switch to use df callback functionsHawking Zhang1-58/+4
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21drm/amdgpu/soc15: initialize reg base for vega12Hawking Zhang1-0/+1
Initialize the IP offsets for vega12. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21drm/amd/soc15: Add external_rev_id for vega12.Feifei Xu1-1/+1
Add external_rev_id for vega12. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21drm/amdgpu/soc15: update vega12 cg_flagsEvan Quan1-1/+18
Add the appropriate clockgating flags for vega12 Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21drm/amdgpu/soc15: add support for vega12Alex Deucher1-0/+7
Add the IP blocks, clock and powergating flags, and common clockgating support. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-19drm/amdgpu: Delete dead code when early initRex Zhu1-5/+0
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15drm/amdgpu: Remove wrapper layer of smu ip functionsRex Zhu1-3/+2
1. delete amdgpu_powerplay.c used for wrapping smu ip functions 2. delete struct pp_instance, 3. make struct hwmgr as the smu hw handle. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: move getting pcie info to common codeAlex Deucher1-2/+0
No need to replicate it in several places. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu/soc15: always load the psp moduleAlex Deucher1-2/+1
Regardless of whether the user has selected psp fw loading or not. It's still needed for GPU reset among other things. There are already guards in place to avoid setting up the full psp if PSP fw loading is not enabled. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14drm/amdgpu: use adev->firmware to determine whether to load the PSP moduleAlex Deucher1-1/+1
The per device firmware load method is limited to what makes sense for that asic rather than whatever arbitrary value may have been set by the user. Reviewed-by: Rex Zhu <rezhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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