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path: root/drivers/gpu/drm/amd/include/renoir_ip_offset.h (follow)
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2019-10-17drm/amd/display: Add DCN_BASE regsBhawanpreet Lakha1-0/+34
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-13drm/amd/display: update renoir_ip_offset.hAaron Liu1-1/+1
This patch updates MP1_BASE in renoir_ip_offset.h Signed-off-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir registers (v3)Bhawanpreet Lakha1-0/+1364
add registers for dcn, clk, and renoir ip offsets v2: header cleanup (Alex) v3: Add DPCS registers (Hersen) Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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