aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd
AgeCommit message (Collapse)AuthorFilesLines
2020-05-28drm/amd/display: link_status not align when power off encoderPaul Hsieh1-0/+2
[Why] The link_status is incorrect cause driver power off eDP when backlight on. Some eDP panels may show garbage on screen. [How] Correct link_status when power off encoder Signed-off-by: Paul Hsieh <paul.hsieh@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: 3.2.86Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdkfd: Track SDMA utilization per processMukul Joshi4-14/+198
Track SDMA usage on a per process basis and report it through sysfs. The value in the sysfs file indicates the amount of time SDMA has been in-use by this process since the creation of the process. This value is in microsecond granularity. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: add check before i2c_add_adapterWenhui Sheng2-16/+22
smu_i2c_eeprom_init may be invoked twice or more under sroiv mode, while we don't want to add check if (!amdgpu_sriov_vf) before we invoke smu_i2c_eeprom_init/fini each time, so we check if i2c adapter is already added before we invoke i2c_add_adapter Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: remove SRIOV check in SMU11 (v2)Wenhui Sheng4-116/+76
We don't need SRIOV check after we enable SMC msg filter in SMU11 v2: squash in unused variable fix, unused ids Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: enable SMC message filterWenhui Sheng3-10/+7
1. enable SMC message filter in SRIOV situation 2. return -EACCESS if msg is blocked from smu_msg_get_index 3. if msg is block, always return 0 from smu_v11_0_send_msg_with_param Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: add SMC message filter for SMU11Wenhui Sheng3-134/+140
1. add smu_11_0_msg_mapping definition 2. add valid info for each SMC message in SRIOV Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: check whether SMU IP is enabled before accessEvan Quan1-153/+113
Since on early phase of bringup, the SMU IP may be not enabled or supported. Without this, we may hit null pointer dereference on accessing smu->adev. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Tested-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Make BREAK_TO_DEBUGGER() a debug printNicholas Kazlauskas1-1/+9
[Why] Warnings in the kernel are generally treated as errors. The BREAK_TO_DEBUGGER macro is not a critical error or warning, but rather intended for developer use to help investigate behavior and sequences for other issues. We do still make use of DC_ERROR/ASSERT(0) in various places in the code for things that are genuine issues. Since most developers don't actually KGDB while debugging the kernel these essentially would have no value on their own since the KGDB breakpoint wouldn't trigger - ASSERT(0) was used as a shortcut to get a stacktrace. [How] Turn it into a DRM_DEBUG_DRIVER print instead. We unfortunately lose the stacktrace, but we still do retain some of the useful debug information this offers by having at least the function and line number loggable. If KGDB is supported in the kernel this will still trigger a real breakpoint as well. Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helperGustavo A. R. Silva2-4/+3
The current codebase makes use of one-element arrays in the following form: struct something { int length; u8 data[1]; }; struct something *instance; instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL); instance->length = size; memcpy(instance->data, source, size); but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. So, replace the one-element array with a flexible-array member. Also, make use of the new struct_size() helper to properly calculate the size of struct SISLANDS_SMC_SWSTATE. This issue was found with the help of Coccinelle and, audited and fixed _manually_. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/radeon/dpm: Replace one-element array and use struct_size() helperGustavo A. R. Silva1-1/+1
The current codebase makes use of one-element arrays in the following form: struct something { int length; u8 data[1]; }; struct something *instance; instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL); instance->length = size; memcpy(instance->data, source, size); but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. So, replace the one-element array with a flexible-array member. Also, make use of the new struct_size() helper to properly calculate the size of struct NISLANDS_SMC_SWSTATE. This issue was found with the help of Coccinelle and, audited and fixed _manually_. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: put some case statments in family orderAlex Deucher1-27/+27
SI and CIK came before VI and newer asics. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu/sdma4: simplify the logic around powering up sdmaAlex Deucher1-6/+2
Just check if it's an APU. The checks for the ppfuncs are pointless because if we don't have them we can't power up sdma anyway so we shouldn't even be in this code in the first place. I'm not sure about the in_gpu_reset check. This probably needs to be double checked. The fini logic doesn't match the init logic however with that in_gpu_reset check in place which seems odd. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: simplify mec2 fw checkAlex Deucher1-2/+1
Check if mec2 fw exists rather than checking asic types. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: simplify CZ/ST and KV/KB/ML checksAlex Deucher2-5/+5
Just check for APU. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: simplify raven and renoir checksAlex Deucher3-5/+4
Just check for APU. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu/gfx10: add navi12 to gfxoff caseAlex Deucher1-0/+1
Looks like it should be handled here as well. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu/sdma4: add renoir to powergating setupAlex Deucher1-0/+1
Looks like renoir should be handled here as well. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: simplify ATIF backlight handlingAlex Deucher1-41/+28
Just register the a pointer to the backlight device and use that. Unifies the DC and non-DC handling. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: print warning when input address is invalidGuchun Chen1-0/+3
This will assist debug in error injection case. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: skip smu_i2c_eeprom_init/fini under sriov modeHua Zhang1-10/+14
When smu_i2c_eeprom_init is called on the smu resuming process under sroiv mode, there will be a call trace: [ 436.377690] dump_stack+0x63/0x85 [ 436.377695] kobject_init+0x77/0x90 [ 436.377704] device_initialize+0x28/0x110 [ 436.377708] device_register+0x12/0x20 [ 436.377756] i2c_register_adapter+0xeb/0x400 [ 436.377763] i2c_add_adapter+0x5a/0x80 [ 436.377951] arcturus_i2c_eeprom_control_init+0x60/0x80 [amdgpu] [ 436.378123] smu_resume+0xcc/0x110 [amdgpu] [ 436.378247] amdgpu_device_gpu_recover+0xfb1/0xfc0 [amdgpu] [ 436.378401] amdgpu_job_timedout+0xf2/0x150 [amdgpu] [ 436.378414] drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378420] ? drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378430] process_one_work+0x1fd/0x3f0 [ 436.378438] worker_thread+0x34/0x410 [ 436.378444] kthread+0x121/0x140 [ 436.378451] ? process_one_work+0x3f0/0x3f0 [ 436.378456] ? kthread_create_worker_on_cpu+0x70/0x70 [ 436.378464] ret_from_fork+0x35/0x40 This is because smu_i2c_eeprom is not released on gpu recovering. Actually, smu_i2c_eeprom_init/fini are only needed under bare mental mode. Signed-off-by: Hua Zhang <hua.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: remove the support of vega20 from swsmuKevin Wang6-3486/+3
by default, vega20 will use legacy powerplay driver. in order to maintain the code conveniently in the future, remove the support of vega20 from swsmu. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmuKevin Wang3-14/+2
the vega20 asic uses legacy powerplay driver by default. 1. cleanup is_support_sw_smu_xgmi() function. (only use for vega20 xgmi pstate check) 2. by default, the vega20 set xgmi pstate by legacy powerplay routine. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amdgpu: change memory training to common functionLikun Gao3-48/+40
Change memory training init and finit a common function, as it only have software behavior do not relay on the IP version of PSP. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: FW Release 1.0.11Anthony Koo2-2/+6
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Remove nv12 work aroundYongqiang Sun6-130/+2
[Why] dal side nv12 wa has a lot of side effects. KMD side wa is used, so this should be remove. [How] Removed wa from dal side. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: fix dml immediate flip inputDmytro Laktyushkin2-2/+6
Set the correct value to immediate flip required field. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: fix dml log2 functionDmytro Laktyushkin1-2/+2
This change removes internal rounding in dml_log2 function. Dml_log2 is expected to return a float output. In case an int is needed dml will floor the output on it's own. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Support CW4 for DMUB ringbuffer inboxNicholas Kazlauskas2-8/+23
[Why] Region 4 is non cacheable and slower than using cache window 4. [How] Check the firmware version to determine how we should program the base address and memory windows. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Add DMUB firmware version helpers in DMUB serviceNicholas Kazlauskas2-0/+12
[Why] In order to switch over the inbox from region4 to cw4 we need to know if the firmware is capable of properly invalidating the cache before reading the commands. Easiest way is to just check the firmware version, but we don't have the helper macros or a way for the dmub_srv to know what version it is. [How] Add a new fw_version field to the creation parameters that driver can optional pass in. Assumes a version of 0x00000000 is invalid. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: vbios data table packingJake Wang2-1/+101
[WHY] Currently we're copying the entire bios image into vbios. Loading time for FW with entire bios(54272 bytes) is 105138us. By copying only the sections of bios we're using(4436 bytes), loading time drops to 104326us which saves us 812us. [HOW] ROM header, master data table, and all data tables will be packed in contiguous manner. The offsets for the data tables are remapped to their newly packed location. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: DP link layer test 4.2.1.1 fix due to specs updateWenjing Liu8-42/+42
[why] DP link layer CTS specs updated to change the test parameters in test 4.2.1.1. Before it requires source to delay 400us on aux no reply. With the specs updates Errata5, it requires source to delay 3.2ms (based on LTTPR aux timeout) This causes our test to fail after updating with the latest test equipment firmware. [how] the change is to allow LTTPR 3.2ms aux timeout delay by default. And only set to 400us if LTTPR is not present. Before this piece of logic is interwined with LTTPR support. Now we will default to 3.2ms aux timeout even if LTTPR support is not enabled by driver. Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: update dml interfaces and variablesDmytro Laktyushkin7-216/+186
Preparation for new asic support. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: 3.2.85Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Fix ABM memory alignment issueWyatt Wood1-3/+42
[Why] Due to packing of abm_config_table, memory addresses aren't aligned to 32 bit boundary dmcub prefers. Therefore when using pointers to this structure, it's possible that dmcub will automatically align the data read from that address, yielding incorrect values. [How] Instead of packing 1 byte boundary, explicitly pack values to 4 byte boundary. Since there is a dependency on the existing iram table structure on driver side, we must copy to a second structure, which is aligned correctly, before passing to fw. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: FW release 1.0.10Anthony Koo4-9/+49
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Implement some asic specific abm call backs.Yongqiang Sun12-98/+120
[Why & How] Implement abm set_pipe call stacks Have some asics speicifc call stacks for abm. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Add bit swap helper based on endiannessRodrigo Siqueira1-24/+26
Christian Koenig pointed out a code duplication related to bit swap in case of big-endian manipulation. This commit adds a helper for handling this verification and reduces the requirement of replicate some part of the code. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Don't pass invalid fw_bss_data pointer into DMUB srvNicholas Kazlauskas1-2/+2
[Why] If bss_data_size is 0 then we shouldn't be passing down fw_bss_data into the DMUB service since the region isn't really "valid." [How] Pass NULL instead if the size is 0. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Check bss_data_size before going down legacy DMUB load pathNicholas Kazlauskas1-2/+2
[Why] New unified firmware binary with only inst const still passes down fw_bss_data != NULL and params->bss_data_size == 0 from DM. This leads it into the legacy path causing firmware state allocation to be too small. [How] Check bss_data_size as well. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Do not fail if build scaling params failsSung Lee1-2/+2
[WHY] Failing validation when building scaling parameters causes corruption to occur due to pipe splitting with smaller pixel widths than HW supports. This needs to fail silently for now to hide the corruption until the corruption itself can be fixed. [HOW] Do not fail validation if building scaling params fails. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/display: Handle persistence in DMJaehyun Chung3-95/+7
[Why] Remove dm_write_persistent_data and dm_read_persistent_data as persistence should be handled in DM. [How] Remove functions. Move read/write calls into DM layer while maintaining logic. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-27drm/amd/display: Fix potential integer wraparound resulting in a hangAric Cyr1-0/+2
[Why] If VUPDATE_END is before VUPDATE_START the delay calculated can become very large, causing a soft hang. [How] Take the absolute value of the difference between START and END. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-27drm/amd/display: drop cursor position check in atomic testSimon Ser1-7/+0
get_cursor_position already handles the case where the cursor has negative off-screen coordinates by not setting dc_cursor_position.enabled. Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: 626bf90fe03f ("drm/amd/display: add basic atomic check for cursor plane") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-27drm/amd/display: Fix potential integer wraparound resulting in a hangAric Cyr1-0/+2
[Why] If VUPDATE_END is before VUPDATE_START the delay calculated can become very large, causing a soft hang. [How] Take the absolute value of the difference between START and END. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-05-27drm/amd/display: drop cursor position check in atomic testSimon Ser1-7/+0
get_cursor_position already handles the case where the cursor has negative off-screen coordinates by not setting dc_cursor_position.enabled. Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: 626bf90fe03f ("drm/amd/display: add basic atomic check for cursor plane") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-05-27Merge branch 'for-5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroupLinus Torvalds1-1/+1
Pull cgroup fixes from Tejun Heo: - Reverted stricter synchronization for cgroup recursive stats which was prepping it for event counter usage which never got merged. The change was causing performation regressions in some cases. - Restore bpf-based device-cgroup operation even when cgroup1 device cgroup is disabled. - An out-param init fix. * 'for-5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup: device_cgroup: Cleanup cgroup eBPF device filter code xattr: fix uninitialized out-param Revert "cgroup: Add memory barriers to plug cgroup_rstat_updated() race window"
2020-05-26drm/amdgpu: fix device attribute node create failed with multi gpuKevin Wang3-41/+58
the origin design will use varible of "attr->states" to save node supported states on current gpu device, but for multi gpu device, when probe second gpu device, the driver will check attribute node states from previous gpu device wthether to create attribute node. it will cause other gpu device create attribute node faild. 1. add member attr_list into amdgpu_device to link supported device attribute node. 2. add new structure "struct amdgpu_device_attr_entry{}" to track device attribute state. 3. drop member "states" from amdgpu_device_attr. v2: 1. move "attr_list" into amdgpu_pm and rename to "pm_attr_list". 2. refine create & remove device node functions parameter. fix: drm/amdgpu: optimize amdgpu device attribute code Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-22drm/amdgpu: Sync with VM root BO when switching VM to CPU update modeFelix Kuehling1-2/+9
This fixes an intermittent bug where a root PD clear operation still in progress could overwrite a PDE update done by the CPU, resulting in a VM fault. Fixes: 108b4d928c03 ("drm/amd/amdgpu: Update VM function pointer") Reported-by: Jay Cornwall <Jay.Cornwall@amd.com> Tested-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-22drm/amd/display: Handle GPU reset for DC blockBhawanpreet Lakha2-1/+182
[Why] Previously we used the s3 codepath for gpu reset. This can lead to issues in certain case where we end of waiting for fences which will never come (because parts of the hw are off due to gpu reset) and we end up waiting forever causing a deadlock. [How] Handle GPU reset separately from normal s3 case. We essentially need to redo everything we do in s3, but avoid any drm calls. For GPU reset case suspend: -Acquire DC lock -Cache current dc_state -Commit 0 stream/planes to dc (this puts dc into a state where it can be powered off) -Disable interrupts resume -Edit cached state to force full update -Commit cached state from suspend -Build stream and plane updates from the cached state -Commit stream/plane updates -Enable interrupts -Release DC lock v2: -Formatting -Release dc_state Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>