aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_pch.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2021-07-30drm/i915: remove explicit CNL handling from intel_pch.cLucas De Marchi1-4/+1
2021-07-22drm/i915/dg2: Add fake PCHMatt Roper1-0/+3
2021-06-07drm/i915: replace IS_GEN and friends with GRAPHICS_VERLucas De Marchi1-5/+5
2021-05-12drm/i915/adl_p: Add PCH supportClinton Taylor1-2/+4
2021-02-11drm/i915/gen9_bc: Recognize TGP PCH + CML combosLyude Paul1-1/+2
2021-02-02Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-nextJani Nikula1-1/+7
2021-01-26drm/i915/adl_s: Add PCH supportAnusha Srivatsa1-1/+7
2021-01-15drm/i915: Try to guess PCH type even without ISA bridgeZhenyu Wang1-17/+22
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay1-3/+3
2020-07-14drm/i915/dg1: Add fake PCHLucas De Marchi1-0/+6
2020-06-02drm/i915: Identify Cometlake platformChris Wilson1-11/+25
2020-05-19drm/i915/rkl: Add PCH supportMatt Roper1-3/+5
2020-01-22drm/i915: Make WARN* drm specific where drm_priv ptr is availablePankaj Bharadiya1-25/+41
2020-01-10drm/i915/pch: convert to using the drm_dbg_kms() macro.Wambui Karuga1-22/+24
2019-11-13drm/i915: Fix detection for a CMP-V PCHImre Deak1-1/+5
2019-11-06drm/i915/tgl: Add second TGL PCH IDJames Ausmus1-0/+1
2019-10-23drm/i915: Add new CNL PCH ID seen on a CML platformImre Deak1-0/+1
2019-10-22drm/i915/aml: Allow SPT PCH for all AML devicesJames Ausmus1-1/+2
2019-10-16drm/i915: Introduce Jasper Lake PCHMatt Roper1-1/+5
2019-09-18drm/i915/cml: Add second PCH ID for CMPMatt Roper1-0/+1
2019-08-08drm/i915: split out intel_pch.[ch] from i915_drv.[ch]Jani Nikula1-0/+201