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2022-05-12i915/guc/reset: Make __guc_reset_context aware of guilty enginesUmesh Nerlige Ramappa5-12/+12
There are 2 ways an engine can get reset in i915 and the method of reset affects how KMD labels a context as guilty/innocent. (1) GuC initiated engine-reset: GuC resets a hung engine and notifies KMD. The context that hung on the engine is marked guilty and all other contexts are innocent. The innocent contexts are resubmitted. (2) GT based reset: When an engine heartbeat fails to tick, KMD initiates a gt/chip reset. All active contexts are marked as guilty and discarded. In order to correctly mark the contexts as guilty/innocent, pass a mask of engines that were reset to __guc_reset_context. Fixes: eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC interface") Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220426003045.3929439-1-umesh.nerlige.ramappa@intel.com
2022-05-12drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.cImre Deak1-4/+4
Fix the following sparse warnings: drivers/gpu/drm/i915/display/intel_display_power.c:2431:34: warning: mixing different enum types: drivers/gpu/drm/i915/display/intel_display_power.c:2431:34: unsigned int enum intel_display_power_domain drivers/gpu/drm/i915/display/intel_display_power.c:2431:34: int enum port drivers/gpu/drm/i915/display/intel_display_power.c:2442:37: warning: mixing different enum types: drivers/gpu/drm/i915/display/intel_display_power.c:2442:37: unsigned int enum intel_display_power_domain drivers/gpu/drm/i915/display/intel_display_power.c:2442:37: int enum port drivers/gpu/drm/i915/display/intel_display_power.c:2468:43: warning: mixing different enum types: drivers/gpu/drm/i915/display/intel_display_power.c:2468:43: unsigned int enum intel_display_power_domain drivers/gpu/drm/i915/display/intel_display_power.c:2468:43: unsigned int enum aux_ch drivers/gpu/drm/i915/display/intel_display_power.c:2479:35: warning: mixing different enum types: drivers/gpu/drm/i915/display/intel_display_power.c:2479:35: unsigned int enum intel_display_power_domain drivers/gpu/drm/i915/display/intel_display_power.c:2479:35: unsigned int enum aux_ch Fixes: 979e1b32e0e2 ("drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platform") Reported-by: Jani Nikula <jani.nikula@intel.com> Cc: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220510114957.406070-1-imre.deak@intel.com
2022-05-12drm/i915/dmc: Load DMC on DG2Anusha Srivatsa2-2/+12
Add Support for DC states on Dg2. v2: Add dc9 as the max supported DC states and disable DC5. v3: set max_dc to 0. (Imre) Cc: Imre Deak <imre.deak@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>(v1) Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504202213.740200-2-anusha.srivatsa@intel.com
2022-05-11drm/i915/gvt: Change from vfio_group_(un)pin_pages to vfio_(un)pin_pagesJason Gunthorpe2-22/+6
Use the existing vfio_device versions of vfio_(un)pin_pages(). There is no reason to use a group interface here, kvmgt has easy access to a vfio_device. Delete kvmgt_vdev::vfio_group since these calls were the last users. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Zhi Wang <zhi.a.wang@intel.com> Link: https://lore.kernel.org/r/5-v4-8045e76bf00b+13d-vfio_mdev_no_group_jgg@nvidia.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-11vfio/mdev: Pass in a struct vfio_device * to vfio_dma_rw()Jason Gunthorpe1-2/+2
Every caller has a readily available vfio_device pointer, use that instead of passing in a generic struct device. Change vfio_dma_rw() to take in the struct vfio_device and move the container users that would have been held by vfio_group_get_external_user_from_dev() to vfio_dma_rw() directly, like vfio_pin/unpin_pages(). Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/4-v4-8045e76bf00b+13d-vfio_mdev_no_group_jgg@nvidia.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-11vfio: Make vfio_(un)register_notifier accept a vfio_deviceJason Gunthorpe1-12/+12
All callers have a struct vfio_device trivially available, pass it in directly and avoid calling the expensive vfio_group_get_from_dev(). Acked-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Jason J. Herne <jjherne@linux.ibm.com> Reviewed-by: Tony Krowiak <akrowiak@linux.ibm.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/1-v4-8045e76bf00b+13d-vfio_mdev_no_group_jgg@nvidia.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-11Merge tag 'gvt-next-2022-04-29' into v5.19/vfio/nextAlex Williamson29-2744/+2487
Merge GVT-g dependencies for vfio. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-11Merge tag 'drm-intel-next-2022-05-06' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie60-7425/+7044
drm/i915 feature pull #2 for v5.19: Features and functionality: - Add first set of DG2 PCI IDs for "motherboard down" designs (Matt Roper) - Add initial RPL-P PCI IDs as ADL-P subplatform (Matt Atwood) Refactoring and cleanups: - Power well refactoring and cleanup (Imre) - GVT-g refactor and mdev API cleanup (Christoph, Jason, Zhi) - DPLL refactoring and cleanup (Ville) - VBT panel specific data parsing cleanup (Ville) - Use drm_mode_init() for on-stack modes (Ville) Fixes: - Fix PSR state pipe A/B confusion by clearing more state on disable (José) - Fix FIFO underruns caused by not taking DRAM channel into account (Vinod) - Fix FBC flicker on display 11+ by enabling a workaround (José) - Fix VBT seamless DRRS min refresh rate check (Ville) - Fix panel type assumption on bogus VBT data (Ville) - Fix panel data parsing for VBT that misses panel data pointers block (Ville) - Fix spurious AUX timeout/hotplug handling on LTTPR links (Imre) Merges: - Backmerge drm-next (Jani) - GVT changes (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87bkwbkkdo.fsf@intel.com
2022-05-10drm/i915/pvc: read fuses for link copy enginesLucas De Marchi1-0/+29
The new Link Copy engines in PVC may be fused off according to the mslice_mask. Each bit of the MEML3_EN_MASK we read from the GEN10_MIRROR_FUSE3 register disables a pair of link copy engines. v2 (Tvrtko): - Minor cosmetic changes: s/u8/unsigned long/, use instance local variable. (Tvrtko) Bspec: 44483 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-13-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: skip all copy engines from aux table invalidateLucas De Marchi1-1/+2
As we have more copy engines now, mask all of them from aux table invalidate. v2 (MattR): - Use I915_MAX_BCS to determine mask rather than hardcoding BCS8. (Prathap) Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-12-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: Reset support for new copy enginesMatt Roper2-18/+34
Add the reset support for new copy engines in PVC. Bspec: 52549 Original-author: CQ Tang Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-11-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: Interrupt support for new copy enginesMatt Roper2-0/+20
Add the interrupt handler support for new copy engines. Bspec: 54030 Original-author: CQ Tang Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-10-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: Engine definitions for new copy enginesMatt Roper4-1/+83
This patch adds the basic definitions needed to support new copy engines. Also updating the cmd_info to accommodate new engines, as the engine id's of legacy engines have been changed. v2: - Add _BCS(n) definition, similar to other engines. (Tvrtko) - Add I915_MAX_BCS definition, similar to other engnes. (Prathap) - Move GVT change to avoid u16 overflow to its own patch. (Tvrtko) Original-author: CQ Tang Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-9-matthew.d.roper@intel.com
2022-05-10drm/i915/gvt: Use intel_engine_mask_t for ring maskMatt Roper1-1/+1
When i915 adds additional PVC blitter instances (in an upcoming patch), the definition of VECS0 will change from bit(10) to bit(18), causing GVT's R_ALL mask to overflow the u16 storage that's currently used. Let's replace the u16 with an intel_engine_mask_t to ensure we avoid this. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-8-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: Reduce stack usage in reset selftest with extra blitter engineJohn Harrison1-2/+7
PVC adds extra blitter engines (in the following patch). The reset selftest has a local array on the stack which is sized by the number of engines. The increase pushes the size of this array to the point where it trips the 'stack too large' compile warning. This patch takes the allocation of the stack and makes it dynamic instead. v2 (MattR): - Minor cosmetic changes: re-sort definition and allocate using kmalloc_array(). (Tvrtko) Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-7-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: Read correct RP_STATE_CAP registerMatt Roper2-1/+4
The SoC registers, including RP_STATE_CAP, have moved to a new location in GTTMMADR on Ponte Vecchio. We need to update the register offset accordingly. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-5-matthew.d.roper@intel.com
2022-05-10drm/i915/pvc: Define MOCS table for PVCAyaz A Siddiqui6-8/+53
v2 (MattR): - Clarify comment above RING_CMD_CCTL programming. - Remove bspec reference from field definition. (Lucas) - Add WARN if we try to use a (presumably uninitialized) wb_index of 0. On most platforms 0 is an invalid MOCS entry and even on the ones where it isn't, it isn't the right setting for wb_index. (Lucas) Bspec: 45101, 72161 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com> Signed-off-by: Fei Yang <fei.yang@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-4-matthew.d.roper@intel.com
2022-05-10drm/i915/gem: Make drop_pages() return boolLucas De Marchi1-1/+1
Commit e4e806253003 ("drm/i915: Change shrink ordering to use locking around unbinding.") changed the return type to int without changing the return values or their meaning to "0 is success". Move it back to boolean. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220503061556.513175-1-lucas.demarchi@intel.com
2022-05-09drm/i915: Only setup private tmpfs mount when needed and fix loggingTvrtko Ursulin3-35/+22
If i915 does not want to use huge pages there is a) no point in setting up the private mount and b) should former fail, it is misleading to log THP support is disabled in the caller, which does not even know if callee tried to enable it. Fix both by restructuring the flow in i915_gemfs_init and at the same time note the failure to set it up in all cases. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Eero Tamminen <eero.t.tamminen@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220429100414.647857-2-tvrtko.ursulin@linux.intel.com
2022-05-09drm/i915: Enable THP on Icelake and beyondTvrtko Ursulin1-4/+9
We have a statement from HW designers that the GPU read regression when using 2M pages was fixed from Icelake onwards, which was also confirmed by bencharking Eero did last year: """ When IOMMU is disabled, enabling THP causes following perf changes on TGL-H (GT1): 10-15% SynMark Batch[0-3] 5-10% MemBW GPU texture, SynMark ShMapVsm 3-5% SynMark TerrainFly* + Geom* + Fill* + CSCloth + Batch4 1-3% GpuTest Triangle, SynMark TexMem* + DeferredAA + Batch[5-7] + few others -7% MemBW GPU blend In the above 3D benchmark names, * means all the variants of tests with the same prefix. For example "SynMark TexMem*", means both TexMem128 & TexMem512 tests in the synthetic (Intel internal) SynMark test suite. In the (public, but proprietary) GfxBench & GLB(enchmark) test suites, there are both onscreen and offscreen variants of each test. Unless explicitly stated otherwise, numbers are for both variants. All tests are run with FullHD monitor. All tests are fullscreen except for GLB and GpuTest ones, which are run in 1/2 screen window (GpuTest triangle is run both in fullscreen and 1/2 screen window). """ Since the only regression is MemBW GPU blend, against many more gains, it sounds it is time to enable THP on Gen11+. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> References: https://gitlab.freedesktop.org/drm/intel/-/issues/430 Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Eero Tamminen <eero.t.tamminen@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220429100414.647857-1-tvrtko.ursulin@linux.intel.com
2022-05-09drm/i915: remove single-use GEM_DEBUG_EXEC()Jani Nikula2-3/+2
Reduce the magic of what's going on in GEM_DEBUG_EXEC() by expanding it inline and being explicit about it. It's as single use case anyway, so the macro feels overkill. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504183716.987793-2-jani.nikula@intel.com
2022-05-09drm/i915: remove unused GEM_DEBUG_DECL() and GEM_DEBUG_BUG_ON()Jani Nikula1-4/+0
There are already too many choices here, take away the unused ones. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504183716.987793-1-jani.nikula@intel.com
2022-05-09drm/i915: Fix race in __i915_vma_remove_closedKarol Herbst1-4/+7
i915_vma_reopen checked if the vma is closed before without taking the lock. So multiple threads could attempt removing the vma. Instead the lock needs to be taken before actually checking. v2: move struct declaration Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v5.3+ Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5732 Signed-off-by: Karol Herbst <kherbst@redhat.com> Fixes: 155ab8836caa ("drm/i915: Move object close under its own lock") Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220420095720.3331609-1-kherbst@redhat.com (cherry picked from commit 1df1c79cbb7ac9bf148930be3418973c76ba8dde) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-05-08i915: Call aops write_begin() and write_end() directlyMatthew Wilcox (Oracle)1-12/+11
pagecache_write_begin() and pagecache_write_end() are now trivial wrappers, so call the aops directly. Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Reviewed-by: Christoph Hellwig <hch@lst.de>
2022-05-06drm/i915: Drop has_psr from device infoJosé Roberto de Souza3-5/+1
No need to have this parameter in intel_device_info struct as all platforms with display version 9 or newer has this feature. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-7-jose.souza@intel.com
2022-05-06drm/i915: Drop has_dp_mst from device infoJosé Roberto de Souza3-5/+1
No need to have this parameter in intel_device_info struct as the requirement to support it is the DDI support. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-6-jose.souza@intel.com
2022-05-06drm/i915: Drop has_ddi from device infoJosé Roberto de Souza3-5/+3
No need to have this parameter in intel_device_info struct as all platforms with display version 9 or newer, haswell or broadwell supports it. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-5-jose.souza@intel.com
2022-05-06drm/i915: Drop has_logical_ring_elsq from device infoJosé Roberto de Souza3-6/+2
No need to have this parameter in intel_device_info struct as all platforms with graphics version 11 or newer has this feature. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-4-jose.souza@intel.com
2022-05-06drm/i915: Drop has_reset_engine from device infoJosé Roberto de Souza3-7/+1
No need to have this parameter in intel_device_info struct as all platforms with graphics version 7 or newer can reset engines. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-3-jose.souza@intel.com
2022-05-06drm/i915: Drop has_rc6 from device infoJosé Roberto de Souza3-10/+2
No need to have this parameter in intel_device_info struct as all platforms with graphics version 6 or newer have software support for this feature. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-2-jose.souza@intel.com
2022-05-06drm/i915: Drop has_gt_uc from device infoJosé Roberto de Souza4-6/+2
No need to have this parameter in intel_device_info struct as all platforms with graphics version 9 or newer has graphics microcontroller. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-1-jose.souza@intel.com
2022-05-06drm/i915/gt: Fix build error without CONFIG_PMYueHaibing1-1/+1
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c: In function ‘act_freq_mhz_show’: drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c:276:20: error: implicit declaration of function ‘sysfs_gt_attribute_r_max_func’ [-Werror=implicit-function-declaration] 276 | u32 actual_freq = sysfs_gt_attribute_r_max_func(dev, attr, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Move sysfs_gt_attribute_* macros out of #ifdef block to fix this. Fixes: 56a709cf7746 ("drm/i915/gt: Create per-tile RPS sysfs interfaces") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220506032652.1856-1-yuehaibing@huawei.com
2022-05-06drm/i915: Don't use DRM_DEBUG_WARN_ON for ring unexpectedly not idleTvrtko Ursulin1-1/+3
DRM_DEBUG_WARN_ON should only be used when we are certain CI is guaranteed to exercise a certain code path, so in case of values coming from MMIO reads we cannot be sure CI will have all the possible SKUs and parts, or that it will catch all possible error conditions. Use drm_warn instead. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505110007.943449-2-tvrtko.ursulin@linux.intel.com
2022-05-06drm/i915: Don't use DRM_DEBUG_WARN_ON for unexpected l3bank/mslice configTvrtko Ursulin1-7/+8
DRM_DEBUG_WARN_ON should only be used when we are certain CI is guaranteed to exercise a certain code path, so in case of values coming from MMIO reads we cannot be sure CI will have all the possible SKUs and parts. Use drm_warn instead and move logging to init phase while at it. v2: * GEM_WARN_ON in intel_gt_get_valid_steering. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505110007.943449-1-tvrtko.ursulin@linux.intel.com
2022-05-06Merge tag 'drm-intel-gt-next-2022-05-05' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie23-89/+263
UAPI Changes: - Add kerneldoc for engine class enum (Matt Roper) - Add compute engine ABI (Matt Roper) Driver Changes: - Define GuC firmware version for DG2 (John Harrison) - Clear SET_PREDICATE_RESULT prior to executing the ring (Chris Wilson) - Fix race in __i915_vma_remove_closed (Karol Herbst) - Add register for compute engine's MMIO-based TLB invalidation (Matt Roper) - Xe_HP SDV and DG2 have up to 4 CCS engines (Daniele Ceraolo Spurio) - Add initial Ponte Vecchio definitions (Stuart Summers) - Document the eviction of the Flat-CCS objects (Ramalingam C) - Use existing uncore helper to read gpm_timestamp (Umesh Nerlige Ramappa) - Fix issue with LRI relative addressing (Akeem G Abodunrin) - Skip poisoning SET_PREDICATE_RESULT on dg2 (Chris Wilson) - Optimize the ccs_sz calculation per chunk (Ramalingam C) - Remove superfluous string helper include (Jani Nikula) - Fix assert in i915_ggtt_pin (Tvrtko Ursulin) - Use IOMEM_ERR_PTR() directly (Kefeng Wang) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YnNxCm1pyflu3taj@tursulin-mobl2
2022-05-05drm/i915/huc: Don't fail the probe if HuC init failsDaniele Ceraolo Spurio2-10/+3
The previous patch introduced new failure cases in the HuC init flow that can be hit by simply changing the config, so we want to avoid failing the probe in those scenarios. HuC load failure is already considered a non-fatal error and we have a way to report to userspace if the HuC is not available via a dedicated getparam, so no changes in expectation there. The error message in the HuC init code has also been lowered to info to avoid throwing error message for an expected behavior. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504204816.2082588-5-daniele.ceraolospurio@intel.com
2022-05-05drm/i915/huc: Prepare for GSC-loaded HuCDaniele Ceraolo Spurio5-18/+100
HuC loading via GSC is performed via a PXP command sent through the mei modules, so we need both MEI_GSC and MEI_PXP to be available. Given that the GSC will do both the transfer and the authentication, the legacy HuC loading paths can be safely skipped. Also note that the GSC-loaded HuC survives GT reset. v2: move the huc_is_authenticated() function to this patch. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504204816.2082588-4-daniele.ceraolospurio@intel.com
2022-05-05drm/i915/huc: Add fetch support for gsc-loaded HuC binaryDaniele Ceraolo Spurio3-38/+72
On newer platforms (starting DG2 G10 B-step and G11 A-step), ownership of HuC loading has been moved from the GuC to the GSC. As part of the change, the header format of the HuC binary has been updated and does not match the GuC anymore. The GSC will perform all the required checks on the binary size, so we only need to check that the version matches. Note that since we still haven't added any gsc-loaded FWs, the loaded_via_gsc variable will always be kept to its initialization value of zero. v2: Add a note about loaded_via_gsc being zero (Alan) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504204816.2082588-3-daniele.ceraolospurio@intel.com
2022-05-05drm/i915/huc: drop intel_huc_is_authenticatedDaniele Ceraolo Spurio2-6/+1
The function name is confusing, because it doesn't check the actual auth status in HW but the SW status. Given that there is only one user (the huc_auth function itself), just get rid of it and use the FW status checker directly. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504204816.2082588-2-daniele.ceraolospurio@intel.com
2022-05-05drm/i915/guc: Support programming the EU priority in the GuC descriptorMatthew Brost3-11/+33
In GuC submission mode the EU priority must be updated by the GuC rather than the driver as the GuC owns the programming of the context descriptor. Given that the GuC code uses the GuC priorities, we can't use a generic function using i915 priorities for both execlists and GuC submission. The existing function has therefore been pushed to the execlists back-end while a new one has been added for GuC. v2: correctly use the GuC prio. Cc: John Harrison <john.c.harrison@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504234636.2119794-1-daniele.ceraolospurio@intel.com
2022-05-05drm/i915: Respect VBT seamless DRRS min refresh rateVille Syrjälä1-3/+7
Make sure our choice of downclock mode respects the VBT seameless DRRS min refresh rate limit. v2: s/vrefesh/vrefresh/ (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-10-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Parse the seamless DRRS min refresh rateVille Syrjälä2-1/+9
Extract the seamless DRRS min refresh rate from the VBT. v2: Do a version check Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-9-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Refactor panel_type codeVille Syrjälä1-13/+53
Make the panel type code a bit more abstract along the lines of the source of the panel type. For the moment we have three classes: OpRegion, VBT, fallback. Well introduce another one shortly. We can now also print out all the different panel types, and indicate which one we ultimately selected. Could help with debugging. v2: Add .get_panel_type() vfunc (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-8-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Extract get_panel_type()Ville Syrjälä1-19/+39
Pull the code to determine the panel type into its own set of sane functions. v2: rebase Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-7-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Assume panel_type==0 if the VBT has bogus dataVille Syrjälä1-5/+6
Just assume panel_type==0 always if the VBT gives us bogus data. We actually already do this everywhere else except in parse_panel_options() since we just leave i915->vbt.panel_type zeroed. This also seems to be what Windows does. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-6-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Document the mess around the LFP data tablesVille Syrjälä1-1/+6
Document the fact that struct lvds_lfp_data_entry can't be used directly and instead must be accessed via the data table pointers. Also remove the bogus comment implying that there might be a variable number of panel entries in the table. There are always exactly 16. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-5-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Get access to the tail end of the LFP data blockVille Syrjälä2-1/+59
We need to start parsing stuff from the tail end of the LFP data block. This is made awkward by the fact that the fp_timing table has variable size. So we must use a bit more finesse to get the tail end, and to make sure we allocate enough memory for it to make sure our struct representation fits. v2: Rebase due to the preallocation of BDB blocks v3: Rebase due to min_size WARN relocation v4: Document BDB_LVDS_LFP_DATA vs. BDB_LVDS_LFP_DATA_PTRS order (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-4-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Generate LFP data table pointers if the VBT lacks themVille Syrjälä1-1/+133
Modern VBTs no longer contain the LFP data table pointers block (41). We are expecting to have one in order to be able to parse the LFP data block (42), so let's make one up. Since the fp_timing table has variable size we must somehow determine its size. Rather than just hardcode it we look for the terminator bytes (0xffff) to figure out where each table entry starts. dvo_timing, panel_pnp_id, and panel_name are expected to have fixed size. This has been observed on various machines, eg. TGL with BDB version 240, CML with BDB version 231, etc. The most recent VBT I've observed that still had block 41 had BDB version 228. So presumably the cutoff (if an exact cutoff even exists) is somewhere around BDB version 229-231. v2: kfree the thing we allocated, not the thing+3 bytes v3: Do the debugprint only if we found the LFP data block v4: Fix t0 null check (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-3-ville.syrjala@linux.intel.com
2022-05-05drm/i915/bios: Reorder panel DTD parsingVille Syrjälä1-30/+34
Reorder things so that we can parse the entier LFP data block in one go. For now we just stick to parsing the DTD from it. Also fix the misleading comment about block 42 being deprecated. Only the DTD part is deprecated, the rest is still very much needed. v2: Move the version check+comment into parse_generic_dtd() (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220504150440.13748-2-ville.syrjala@linux.intel.com
2022-05-05drm/i915: Use drm_mode_init() for on-stack modesVille Syrjälä1-2/+3
Initialize on-stack modes with drm_mode_init() to guarantee no stack garbage in the list head, or that we aren't copying over another mode's list head. Based on the following cocci script, with manual fixups: @decl@ identifier M; expression E; @@ - struct drm_display_mode M = E; + struct drm_display_mode M; @@ identifier decl.M; expression decl.E; statement S, S1; @@ struct drm_display_mode M; ... when != S + drm_mode_init(&M, &E); + S1 @@ expression decl.E; @@ - &*E + E Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220218100403.7028-19-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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