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2018-12-03drm/msm: Fix error return checkingWen Yang1-1/+1
The error checks on ret for a negative error return always fails because the return value of iommu_map_sg() is unsigned and can never be negative. Detected with Coccinelle: drivers/gpu/drm/msm/msm_iommu.c:69:9-12: WARNING: Unsigned expression compared with zero: ret < 0 Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> CC: Rob Clark <robdclark@gmail.com> CC: David Airlie <airlied@linux.ie> CC: Julia Lawall <julia.lawall@lip6.fr> CC: linux-arm-msm@vger.kernel.org CC: dri-devel@lists.freedesktop.org CC: freedreno@lists.freedesktop.org CC: linux-kernel@vger.kernel.org Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm/dpu: Ignore alpha for XBGR8888 formatJayant Shekhar1-1/+1
Alpha enable in the pixel format will help in selecting the blend rule. By keeping alpha enable to true we are allowing foreground alpha to blend with the layer. If alpha is don't care, then we should not allow pixel alpha to be part of blend equation. Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm: dpu: Fix "WARNING: invalid free of devm_ allocated data"YueHaibing1-2/+0
'dpu_enc' is a member of 'drm_enc' And 'drm_enc' got allocated with devm_kzalloc in dpu_encoder_init. This gives this error message: ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:459:1-6: WARNING: invalid free of devm_ allocated data Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm/hdmi: Drop pointless static qualifier in msm_hdmi_bind()YueHaibing1-1/+1
There is no need to have the 'struct hdmi_platform_config *hdmi_cfg' variable static since new value always be assigned before use it. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm: Move fence put to where failure occursRobert Foss1-7/+8
If dma_fence_wait fails to wait for a supplied in-fence in msm_ioctl_gem_submit, make sure we release that in-fence. Also remove this dma_fence_put() from the 'out' label. Signed-off-by: Robert Foss <robert.foss@collabora.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm: dpu: Don't set legacy plane->crtc pointerSean Paul1-1/+0
It causes a WARN in drm_atomic_get_plane_state(), and is not used by atomic (or dpu). Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-03drm/msm/gpu: Don't map command buffers with nr_relocs equal to 0Jordan Crouse1-0/+3
If a command buffer doesn't have any relocs assigned to it there then is no need to map it in the kernel address space. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm/hdmi: Enable HPD after HDMI IRQ is set upTodor Tomov3-8/+9
SoCs that contain MDP5 have a top level wrapper called MDSS that manages locks, power and irq for the sub-blocks within it. Irq for HDMI is also routed through the MDSS. Shortly after the Hot Plug Detection (HPD) is enabled in HDMI, HDMI interrupts are recieved by the MDSS interrupt handler. However at this moment the HDMI irq is still not mapped to the MDSS irq domain so the HDMI irq handler cannot be called to process the interrupts. This leads to a flood of HDMI interrupts on CPU 0. If we are lucky to have the HDMI initialization running on a different CPU, it will eventually map the HDMI irq to MDSS irq domain, the next HDMI interrupt will be handled by the HDMI irq handler, the interrupt flood will stop and we will recover. If the HDMI initialization is running on CPU 0, then it cannot complete and there is nothing to stop the interrupt flood on CPU 0. The system is stuck. Fix this by moving the HPD enablement after the HDMI irq is mapped to the MDSS irq domain. Signed-off-by: Todor Tomov <todor.tomov@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-12-03drm/msm: validate display and event threadsJeykumar Sankaran1-33/+16
While creating display and event threads per crtc, validate them before setting their priorities. changes in v2: - use dev_warn (Abhinav Kumar) changes in v3: - fix compilation error changes in v4: - Remove Change-Id (Sean Paul) - Keep logging within 80 char limit (Sean Paul) Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-11-30drm/msm: Grab a vblank reference when waiting for commit_doneSean Paul1-0/+5
Similar to the atomic helpers, we should enable vblank while we're waiting for the commit to finish. DPU needs this, MDP5 seems to work fine without it. Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-11-30drm/msm/dsi: configure VCO rate for 10nm PLL driverAbhinav Kumar1-1/+3
Currenty the VCO rate in the 10nm PLL driver relies on the parent rate which is not configured. Configure the VCO rate to 19.2 Mhz as required by the 10nm PLL driver. Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-11-30drm/msm: fix handling of cmdstream offsetRob Clark1-1/+4
Userspace hasn't used submit cmds with submit_offset != 0 for a while, but this starts cropping up again with cmdstream sub-buffer-allocation in libdrm_freedreno. Doesn't do much good to increment the buf ptr before assigning it. Fixes: 78b8e5b847b4 drm/msm: dump a rd GPUADDR header for all buffers in the command Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-11-30drm/msm/gpu: Fix a couple memory leaks in debugfsDan Carpenter1-4/+11
The msm_gpu_open() function should free "show_priv" on error or it causes static checker warnings. Fixes: 4f776f4511c7 ("drm/msm/gpu: Convert the GPU show function to use the GPU state") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-11-30drm/msm: Fix task dump in gpu recoverySharat Masetty1-5/+4
The current recovery code gets a pointer to the task struct and does a few things all within the rcu_read_lock. This puts constraints on the types of gfp flags that can be used within the rcu lock. This patch instead gets a reference to the task within the rcu lock and releases the lock immediately, this way the task stays afloat until we need it and we also get to use the desired gfp flags. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-11-30drm/msm: Check if target supports crash dump captureSharat Masetty1-0/+4
This patch simply checks first to see if the target can support crash dump capture before proceeding. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-10-28Merge tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drmLinus Torvalds62-3248/+1910
Pull drm updates from Dave Airlie: "This is going to rebuild more than drm as it adds a new helper to list.h for doing bulk updates. Seemed like a reasonable addition to me. Otherwise the usual merge window stuff lots of i915 and amdgpu, not so much nouveau, and piles of everything else. Core: - Adds a new list.h helper for doing bulk list updates for TTM. - Don't leak fb address in smem_start to userspace (comes with EXPORT workaround for people using mali out of tree hacks) - udmabuf device to turn memfd regions into dma-buf - Per-plane blend mode property - ref/unref replacements with get/put - fbdev conflicting framebuffers code cleaned up - host-endian format variants - panel orientation quirk for Acer One 10 bridge: - TI SN65DSI86 chip support vkms: - GEM support. - Cursor support amdgpu: - Merge amdkfd and amdgpu into one module - CEC over DP AUX support - Picasso APU support + VCN dynamic powergating - Raven2 APU support - Vega20 enablement + kfd support - ACP powergating improvements - ABGR/XBGR display support - VCN jpeg support - xGMI support - DC i2c/aux cleanup - Ycbcr 4:2:0 support - GPUVM improvements - Powerplay and powerplay endian fixes - Display underflow fixes vmwgfx: - Move vmwgfx specific TTM code to vmwgfx - Split out vmwgfx buffer/resource validation code - Atomic operation rework bochs: - use more helpers - format/byteorder improvements qxl: - use more helpers i915: - GGTT coherency getparam - Turn off resource streamer API - More Icelake enablement + DMC firmware - Full PPGTT for Ivybridge, Haswell and Valleyview - DDB distribution based on resolution - Limited range DP display support nouveau: - CEC over DP AUX support - Initial HDMI 2.0 support virtio-gpu: - vmap support for PRIME objects tegra: - Initial Tegra194 support - DMA/IOMMU integration fixes msm: - a6xx perf improvements + clock prefix - GPU preemption optimisations - a6xx devfreq support - cursor support rockchip: - PX30 support - rgb output interface support mediatek: - HDMI output support on mt2701 and mt7623 rcar-du: - Interlaced modes on Gen3 - LVDS on R8A77980 - D3 and E3 SoC support hisilicon: - misc fixes mxsfb: - runtime pm support sun4i: - R40 TCON support - Allwinner A64 support - R40 HDMI support omapdrm: - Driver rework changing display pipeline ordering to use common code - DMM memory barrier and irq fixes - Errata workarounds exynos: - out-bridge support for LVDS bridge driver - Samsung 16x16 tiled format support - Plane alpha and pixel blend mode support tilcdc: - suspend/resume update mali-dp: - misc updates" * tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm: (1382 commits) firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. drm/i915/icl: Fix signal_levels drm/i915/icl: Fix DDI/TC port clk_off bits drm/i915/icl: create function to identify combophy port drm/i915/gen9+: Fix initial readout for Y tiled framebuffers drm/i915: Large page offsets for pread/pwrite drm/i915/selftests: Disable shrinker across mmap-exhaustion drm/i915/dp: Link train Fallback on eDP only if fallback link BW can fit panel's native mode drm/i915: Fix intel_dp_mst_best_encoder() drm/i915: Skip vcpi allocation for MSTB ports that are gone drm/i915: Don't unset intel_connector->mst_port drm/i915: Only reset seqno if actually idle drm/i915: Use the correct crtc when sanitizing plane mapping drm/i915: Restore vblank interrupts earlier drm/i915: Check fb stride against plane max stride drm/amdgpu/vcn:Fix uninitialized symbol error drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003) drm/amd/amdgpu: Fix debugfs error handling drm/amdgpu: Update gc_9_0 golden settings. drm/amd/powerplay: update PPtable with DC BTC and Tvr SocLimit fields ...
2018-10-26Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linuxLinus Torvalds1-2/+3
Pull Devicetree updates from Rob Herring: "A bit bigger than normal as I've been busy this cycle. There's a few things with dependencies and a few things subsystem maintainers didn't pick up, so I'm taking them thru my tree. The fixes from Johan didn't get into linux-next, but they've been waiting for some time now and they are what's left of what subsystem maintainers didn't pick up. Summary: - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4 - Work to get rid of direct accesses to struct device_node name and type pointers in preparation for removing them. New helpers for parsing DT cpu nodes and conversions to use the helpers. printk conversions to %pOFn for printing DT node names. Most went thru subystem trees, so this is the remainder. - Fixes to DT child node lookups to actually be restricted to child nodes instead of treewide. - Refactoring of dtb targets out of arch code. This makes the support more uniform and enables building all dtbs on c6x, microblaze, and powerpc. - Various DT binding updates for Renesas r8a7744 SoC - Vendor prefixes for Facebook, OLPC - Restructuring of some ARM binding docs moving some peripheral bindings out of board/SoC binding files - New "secure-chosen" binding for secure world settings on ARM - Dual licensing of 2 DT IRQ binding headers" * tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits) ARM: dt: relicense two DT binding IRQ headers power: supply: twl4030-charger: fix OF sibling-node lookup NFC: nfcmrvl_uart: fix OF child-node lookup net: stmmac: dwmac-sun8i: fix OF child-node lookup net: bcmgenet: fix OF child-node lookup drm/msm: fix OF child-node lookup drm/mediatek: fix OF sibling-node lookup of: Add missing exports of node name compare functions dt-bindings: Add OLPC vendor prefix dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus dt-bindings: thermal: samsung: Add SPDX license identifier dt-bindings: clock: samsung: Add SPDX license identifiers dt-bindings: timer: ostm: Add R7S9210 support dt-bindings: phy: rcar-gen2: Add r8a7744 support dt-bindings: can: rcar_can: Add r8a7744 support dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support dt-bindings: watchdog: renesas-wdt: Document r8a7744 support dt-bindings: thermal: rcar: Add device tree support for r8a7744 Documentation: dt: Add binding for /secure-chosen/stdout-path dt-bindings: arm: zte: Move sysctrl bindings to their own doc ...
2018-10-23drm/msm: fix OF child-node lookupJohan Hovold1-2/+3
Use the new of_get_compatible_child() helper to lookup the legacy pwrlevels child node instead of using of_find_compatible_node(), which searches the entire tree from a given start node and thus can return an unrelated (i.e. non-child) node. This also addresses a potential use-after-free (e.g. after probe deferral) as the tree-wide helper drops a reference to its first argument (i.e. the probed device's node). While at it, also fix the related child-node reference leak. Fixes: e2af8b6b0ca1 ("drm/msm: gpu: Use OPP tables if we can") Cc: stable <stable@vger.kernel.org> # 4.12 Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Cc: David Airlie <airlied@linux.ie> Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-08drm/msm: a6xx: Fix improper u64 divisionSean Paul1-4/+7
This patch uses the proper do_div() macro to perform u64 division and guards against overflow if the result is too large for the unsigned long return type Fixes: a2c3c0a54d4c drm/msm/a6xx: Add devfreq support for a6xx Cc: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08drm/msm: a5xx: Remove unneeded parensSean Paul1-2/+2
A small fixup I posted with my v2 patch [1] that was dropped. [1]- https://lists.freedesktop.org/archives/freedreno/2018-October/003647.html Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm/a6xx: Remove CP perfcounter selects from the protected listJordan Crouse1-3/+1
The CP performance counter selects were accidentally marked as protected so they couldn't be written from PM4 streams. Remove the protection because user space does have an interest in setting up their own counters. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm: dpu: Fix memory leak caused by dropped referenceSean Paul1-3/+1
We are currently leaking a drm_crtc_commit struct for every atomic commit containing plane state. The dpu plane destroy function cleans up the fb reference manually, but fails to release the commit ref. As a result, we just keep allocating drm_crtc_commits without ever freeing them. Fortunately there's a helper function which will clean up all of our mess at once, so use that. Thanks to Doug Anderson for reporting the memory leak (and leaving breadcrumbs from kmemleak!). Reported-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm: a5xx: Fix improper u64 divisionSean Paul1-5/+7
This patch uses the proper do_div() macro to perform u64 division and guards against overflow if the result is too large for the unsigned long return type Fixes: de0a3d094de0 drm/msm: re-factor devfreq code Cc: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm: update generated headersRob Clark8-342/+1149
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-05treewide: Replace more open-coded allocation size multiplicationsKees Cook1-2/+2
As done treewide earlier, this catches several more open-coded allocation size calculations that were added to the kernel during the merge window. This performs the following mechanical transformations using Coccinelle: kvmalloc(a * b, ...) -> kvmalloc_array(a, b, ...) kvzalloc(a * b, ...) -> kvcalloc(a, b, ...) devm_kzalloc(..., a * b, ...) -> devm_kcalloc(..., a, b, ...) Signed-off-by: Kees Cook <keescook@chromium.org>
2018-10-04drm/msm/a6xx: Add devfreq support for a6xxSharat Masetty4-5/+67
Implement routines to estimate GPU busy time and fetching the current frequency for the polling interval. This is required by the devfreq framework which recommends a frequency change if needed. The driver code then tries to set this new frequency on the GPU by sending an Out Of Band(OOB) request to the GMU. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-04drm/msm: re-factor devfreq codeSharat Masetty3-23/+41
The devfreq framework requires the drivers to provide busy time estimations. The GPU driver relies on the hardware performance counteres for the busy time estimations, but different hardware revisions have counters which can be sourced from different clocks. So the busy time estimation will be target dependent. Additionally on targets where the clocks are completely controlled by the on chip microcontroller, fetching and setting the current GPU frequency will be different. This patch aims to embrace these differences by re-factoring the devfreq code a bit. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-04drm/msm/a6xx: Add gmu_read64() register read opSharat Masetty1-0/+10
Add a simple function to read 64 registers in the GMU domain Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-04drm/msm: suspend devfreq on initSharat Masetty1-0/+2
Devfreq turns on and starts recommending power level as soon as it is initialized. The GPU is still not powered on by the time the devfreq init happens and this leads to problems on GPU's where register access is needed to get/set power levels. So we start suspended and only restart devfreq when GPU is powered on. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/a6xx: Add inactive_period for a6xxJordan Crouse1-0/+1
The target definition for a630 didn't set a reasonable value for inactive_period so it defaulted to zero and we were essentially powering down after every submission. Set it back to the default value to keep the GPU from bouncing too much during regular workloads. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm: Replace drm_dev_unref with drm_dev_putThomas Zimmermann1-4/+4
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm: Replace drm_gem_object_{un/reference} with put, get functionsThomas Zimmermann6-8/+8
This patch unifies the naming of DRM functions for reference counting of struct drm_gem_object. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm: Replace drm_framebuffer_{un/reference} with put, get functionsThomas Zimmermann1-2/+2
This patch unifies the naming of DRM functions for reference counting of struct drm_framebuffer. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/a6xx: Poll for HFI responsesJordan Crouse3-120/+57
The only HFI communication with the GMU on sdm845 happens during initialization and all commands are synchronous. A fancy interrupt tasklet and associated infrastructure is entirely not eeded and puts us at the mercy of the scheduler. Instead poll for the message signal and handle the response immediately and go on our way. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03msm/gpu/a6xx: Force of_dma_configure to setup DMA for GMUJordan Crouse1-1/+1
The point of the 'force_dma' parameter for of_dma_configure is to force the device to be set up even if DMA capability is not described by the firmware which is exactly the use case we have for GMU - we need SMMU to get set up but we have no other dma capabilities since memory is managed by the GPU driver. Currently we pass false so of_dma_configure() fails and subsequently GMU and GPU probe does as well. Fixes: 4b565ca5a2c ("drm/msm: Add A6XX device support") Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Tested-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/a5xx: Skip hardware preemption init if no preemptionSharat Masetty1-3/+7
In the case where preemption is not enabled, this patch simply skips preemption related initialization in hardware init sequence. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm: fix unsigned comparison with less than zeroColin Ian King1-1/+1
The return from the call to _mixer_stages can be a negative error code however this is being assigned to an unsigned variable 'stages' hence the check is always false. Fix this by making 'stages' an int. Detected by Coccinelle ("Unsigned expression compared with zero: stages < 0") Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/a6xx: Fix PDC register overlapJordan Crouse3-69/+78
The current design greedily takes a big chunk of the PDC register space instead of just the GPU specific sections which conflicts with other drivers and generally makes a mess of things. Furthermore we only need to map the GPU PDC sections just once during init so map the memory inside the function that uses it and adjust the pointers and register offsets accordingly. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/a6xx: Rename gmu phandle to qcom,gmuJordan Crouse1-1/+1
>From the review for the DT bindings for the GPU/GMU it was suggested that the phandle for the GMU be 'qcom,gmu' instead of just 'gmu'. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/gpu: fix parameters in function msm_gpu_crashstate_captureAnders Roxell1-2/+2
When CONFIG_DEV_COREDUMP isn't defined msm_gpu_crashstate_capture doesn't pass the correct parameters. drivers/gpu/drm/msm/msm_gpu.c: In function ‘recover_worker’: drivers/gpu/drm/msm/msm_gpu.c:479:34: error: passing argument 2 of ‘msm_gpu_crashstate_capture’ from incompatible pointer type [-Werror=incompatible-pointer-types] msm_gpu_crashstate_capture(gpu, submit, comm, cmd); ^~~~~~ drivers/gpu/drm/msm/msm_gpu.c:388:13: note: expected ‘char *’ but argument is of type ‘struct msm_gem_submit *’ static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm, ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/msm/msm_gpu.c:479:2: error: too many arguments to function ‘msm_gpu_crashstate_capture’ msm_gpu_crashstate_capture(gpu, submit, comm, cmd); ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/msm/msm_gpu.c:388:13: note: declared here static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm, In current code the function msm_gpu_crashstate_capture parameters. Fixes: cdb95931dea3 ("drm/msm/gpu: Add the buffer objects from the submit to the crash dump") Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Reviewed-By: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/a6xx: Send the right perf index value to GMUSharat Masetty1-1/+1
The index of the perf table was being set in the wrong bit position in the register. With this fix, the GPU clock can be seen running at desired frequency. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/rd: fix crash with long process cmdlinesRob Clark1-3/+3
The [v]snprintf() functions return the size that *would have* been written into the buffer, rather than the size *actually* written. Which results in us trying to memcpy() past the end of the stack. What we really want is [v]scnprintf(). Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm: dpu: Don't reset dpu_enc->cur_master on .disable()Sean Paul1-2/+2
cur_master in dpu_encoder is assigned at modeset and cleared on .disable(). Unfortunately dpms (or enable/disable) does not guarantee a modeset, so cur_master is NULL when we try to re-enable it. This patch moves the NULL assignment to setup_display where it will be re-assigned later in the function. Tested-by: Bruce Wang <bzwang@chromium.org> Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Revise _dpu_plane_get_aspaceBruce Wang1-29/+6
Remove unneeded checks from _dpu_plane_get_aspace. v3: change _dpu_plane_get_aspace to return a struct *msm_gem_address_space instead passing in a pointer of the same type to edit. Remove uneeded arguments. Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Make dpu_plane_danger_signal_ctrl voidBruce Wang1-22/+4
Removed all impossible checks from the function, which eliminates the need for a return value. This function is also never used outside of dpu_plane.c, so the function is made static. v3: Using helper function _dpu_plane_get_kms() instead of doing it locally. Signed-off-by: Bruce Wang <bzwang@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Change _dpu_crtc_vblank_enable_no_lock to voidBruce Wang1-35/+7
Removes redundant tests for _dpu_crtc_vblank_enable_no_lock. Function return type is now void and all function calls have been changed accordingly. Signed-off-by: Bruce Wang <bzwang@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Remove _dpu_crtc_power_enableBruce Wang1-39/+2
All checks for _dpu_crtc_power_enable are not true, so the function can never return an error code. This removes the need for the function as pm_runtime functions can be used instead. v3: Separated _dpu_crtc_power_enable into _dpu_crtc_power_enable and _dpu_crtc_power_disable for clarity. v4: Removed both _dpu_crtc_power_enable and _dpu_crtc_power_disable and called pm_runtime_get_sync and pm_runtime_put_sync from all call points Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Remove unneeded checks in dpu_crtc.cBruce Wang1-145/+22
Removes impossible checks in dpu_crtc.c. Variable assignments are moved up to be initializations where possible. Some variables are no longer used, these are removed. v3: reverted back to original patch Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Clean up plane atomic disable/updateBruce Wang1-24/+7
Removes unnecessary checks from dpu_plane_atomic_disable, old_state argument for both dpu_plane_atomic_disable and dpu_plane_sspp_atomic_update is removed as it is no longer used. Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-03drm/msm/dpu: Remove unneeded checks in dpu_plane.cBruce Wang1-188/+16
Removes some checks from dpu_plane.c that will never result in an error. Subsequent variable assignments become part of the initialization wherever possible. Unused variables are removed. v3: removed additional impossible checks and called helper function _dpu_plane_get_kms() where possible. Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bruce Wang <bzwang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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