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2014-02-18drm/nv4c/mc: nv4x igp's have a different msi rearm registerIlia Mirkin1-0/+1
See https://bugs.freedesktop.org/show_bug.cgi?id=74492 Reported-by: Ronald <ronald645@gmail.com> Suggested-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbiosIlia Mirkin1-0/+3
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23drm/nouveau/bios: make common code to handle ramcfg strap etcBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23drm/nv108/gr: initial support (need external fuc)Ben Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23drm/nv108/fifo: initial supportBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-12-03drm/nouveau/clk: Add support for NVAA/NVACRoy Spliet1-0/+1
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/fb: implement various bits of work towards memory reclockingBen Skeggs1-0/+4
Not even remotely ready for the vast majority of the world. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau: implement a simple sysfs interface to new pm codeBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/device: initial control object class, with pstate control methodsBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/clk: implement power state and engine clock control in coreBen Skeggs1-0/+4
User control of this has been hard-coded as disabled for now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/volt: implement voltage control in coreBen Skeggs1-0/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/bios: parsing for various tables required for power managementBen Skeggs1-0/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/perfmon: initial infrastructure to expose performance countersBen Skeggs1-0/+9
Internal use only at this point. Userspace later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/bus: add interfaces/helpers for sequencerBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/pwr: initial implementationBen Skeggs1-0/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERMBen Skeggs1-3/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nv50-nvaf/fb: split fbram oclass in preparation for reclockingBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nv50-nvaf/fb: split the class definitions up a bitBen Skeggs1-0/+4
These will diverge further in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirrorBen Skeggs1-0/+1
This is what NVIDIA do on these chipsets, let's hope it works around the reported MSI failures for us on NV86. v2: updated to include G92, as per information provided by NVIDIA. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs1-0/+2
v2. updated to cover GF104, as per information provided by NVIDIA. Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nv44/mpeg: create a copy of the nv31/nv40 implsIlia Mirkin1-0/+1
The nv31/nv40 impls are actually fairly nv44-specific, since they assume the presence of the instance register/context switching. Create a copy before nv31/nv40 get fixed. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05drm/nvd7/gr: initial supportMaarten Lankhorst1-0/+2
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05drm/nvc0-/gr: make register lists from initvals functionsBen Skeggs1-2/+12
Generated context verified to be the same for all supported chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/core: xtensa engine base class implementationIlia Mirkin1-0/+1
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin1-0/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/core: move falcon class to engine/Ben Skeggs1-1/+1
Not really "core" per-se. About to merge Ilia's work adding another similar class for the VP2 xtensa engines, so, seems like a good time to move all these to engine/. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/fb: initialise vram controller as pfb sub-objectBen Skeggs1-0/+11
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs1-0/+2
These are pretty much useless for reclocking purposes. Lets make it clearer what they're for and move them to DEVINIT to signify they're for the very simple PLL setting requirements of running the init tables. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-05-02drm/nvf0/disp: expose display class 2.2Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26drm/nouveau/device: convert to engine, rather than subdevBen Skeggs1-9/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26drm/nouveau/mc: handle irq-related setup ourselvesBen Skeggs1-1/+1
We need to be able to process interrupts before the DRM code is able to actually enable them, set it up ourselves. Also, it's less convoluted to *not* use the DRM wrappers it appears... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26drm/nv04/disp: hide all the cruft away in its own little holeBen Skeggs1-3/+1
It'd be pretty awesome if someone would care enough to port this all properly to a class interface, perhaps submitting a command stream to the core via a sw object on PFIFO (emulating how EVO works basically, and also what nvidia have done forever..).. But, this seems unlikely given how old this hardware is now, so, lets just hide it away. There's a heap of other bits and pieces laying around that are still tangled. I'll (re)move them in pieces. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26drm/nouveau/therm: split the nv50 and nv84 codeMartin Peres1-0/+1
This is needed because temperature management on nv50 can be enabled and it looks about the same as nv40. Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau: restore debugfs/vbios.rom supportMarcin Slusarz1-0/+1
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
2013-02-20nouveau: ACPI support depends on X86 and X86_PLATFORM_DEVICESBen Hutchings1-0/+2
If I build nouveau on ia64, Kconfig warns: warning: (DRM_NOUVEAU) selects ACPI_WMI which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && ACPI) warning: (DRM_NOUVEAU) selects MXM_WMI which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && ACPI_WMI) Make all the ACPI support depend on X86 and select X86_PLATFORM_DEVICES. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/i2c: add support for ddc/aux, and dp link training on anx9805Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nv50-/disp: initial work towards supporting external encodersBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nv50-/disp: move DP link training to core and train from supervisorBen Skeggs1-0/+1
We need to be able to do link training for PIOR-connected ANX9805 from the third supervisor handler (due to script ordering in the bios, can't have the "user" call train because some settings are overwritten from the modesetting bios scripts). This moves link training for SOR-connected DP encoders to the second supervisor interrupt, *before* we call the modesetting scripts (yes, different ordering from PIOR is necessary). This is useful since we should now be able to remove some hacks to workaround races between the supervisor and link training paths. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/i2c: create proper chipset-specific class implementationsBen Skeggs1-0/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/i2c: aux channels not necessarily on nvioBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nv17/fence: split from nv10 codeBen Skeggs1-1/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/gpio/nve0: interrupt regs moved on kepler apparentlyBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/disp: port vblank handling to event interfaceBen Skeggs1-0/+1
This removes the nastiness with the interactions between display and software engines when handling vblank semaphore release interrupts. Now, all the semantics are handled in one place (sw) \o/. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/core: basic event interface between core and drmBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/bios: add support for parsing xpio table dataBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/pbus: add a PBUS subdev that hands IRQs to the right subdevsMartin Peres1-0/+4
We are going to use PTHERM's IRQs for thermal monitoring but we need to route them first. On nv31-50, PBUS's IRQ line is shared with GPIOs IRQs. It seems like nv10-31 GPIO interruptions aren't well handled. I kept the original behaviour but it is wrong and may lead to an IRQ storm. Since we enable all PBUS IRQs, we need a way to avoid being stormed if we don't handle them. The solution I used was to mask the IRQs that have not been handled. This will also print one message in the logs to let us know. v2: drop the shared intr handler because of was racy v3: style fixes v4: drop a useless construct in the chipset-dependent INTR v5: add BUS to the disable mask v6 (Ben Skeggs): - general tidy to match the rest of the driver's style - nva3->nvc0, nva3 can be serviced just fine with nv50.c, rnndb even notes that the THERM_ALARM bit got left in the hw until fermi anyway.. so, it's not going to conflict - removed the peephole and user stuff, for the moment.. will handle them later if we find a good reason to actually care.. - limited INTR_EN to just what we can handle for now, mostly to prevent spam of unknown status bits (seen on at least nv4x) Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/fan: add toggle fan supportMartin Peres1-0/+1
v2: change percent from int to atomic_t v3: random fixes v4 (Ben Skeggs): - adapted for split-out fan-control "protocol" structure - removed need for timer resched - support for forcing 'toggle' control on PWM boards Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/therm: cleanly separate pwm control logic from thermBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nva3/therm: add support for hardware fan tachometerBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: fix various style issues, make more consistentBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
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