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2020-07-24drm/nouveau/core: drop error message when no compatible FW foundBen Skeggs1-4/+1
This is less than useful with some subdevs having _nofw variants in their FWIF lists - it's cleaner to handle them all in the same way. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/nvfw: firmware structures should begin with nvfw_Timur Tabi3-11/+11
Rename all structures that are used directly by firmware to have a nvfw_ prefix. This makes it easier to identify structures that have a fixed, specific layout. A future patch will define several more such structures, so it's important to be consistent now. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-07-24drm/nouveau/tmr: fix nvkm_usec/nvkm_msec definitionsTimur Tabi1-2/+2
nvkm_timer_wait_init() takes a u64 as a duration parameter, but the expression "(m) * 1000" will be promoted only to a 32-bit integer, if 'm' is also an integer. Changing the 1000 to 1000ULL ensures that the expression will be 64 bits. This change currently has no effect as there are no callers of nvkm_msec() that exceed 2000ms. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-06-04drm/nouveau/disp: provide hint to OR allocation about HDA requirementsBen Skeggs1-1/+2
Will be used by a subsequent commit to influence SOR allocation policy. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/disp/gv100-: expose capabilities classBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22drm/nouveau/core: add nvkm_subdev_new_() for bare subdevsBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-04-07drm/nouveau/nvif: protect waits against GPU falling off the busBen Skeggs2-21/+35
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-04-07drm/nouveau/nvif: access PTIMER through usermode class, if availableBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/tu10x: initial supportBen Skeggs2-0/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/acr/tu10x: initial supportBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/core: remove previous versioned fw loaderBen Skeggs1-4/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/secboot: removeBen Skeggs2-31/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/acr: implement new subdev to replace "secure boot"Ben Skeggs3-1/+281
ACR is responsible for managing the firmware for LS (Low Secure) falcons, this was previously handled in the driver by SECBOOT. This rewrite started from some test code that attempted to replicate the procedure RM uses in order to debug early Turing ACR firmwares that were provided by NVIDIA for development. Compared with SECBOOT, the code is structured into more individual steps, with the aim of making the process easier to follow/debug, whilst making it possible to support newer firmware versions that may have a different binary format or API interface. The HS (High Secure) binary(s) are now booted earlier in device init, to match the behaviour of RM, whereas SECBOOT would delay this until we try to boot the first LS falcon. There's also additional debugging features available, with the intention of making it easier to solve issues during FW/HW bring-up in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/fb/gp102-: unlock VPR as part of FB initBen Skeggs2-0/+33
We perform memory allocations long before we hit the code in SECBOOT that would unlock the VPR, which could potentially result in memory allocation within the locked region. Run the scrubber binary right after VRAM init to ensure we don't. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/core/memory: add macros to read/write blocks from objectsBen Skeggs1-0/+16
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/secboot: move code to boot LS falcons to subdevsBen Skeggs6-12/+29
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/msgq: rename msgq-related nvkm_msgqueue_queue to nvkm_falcon_msgqBen Skeggs1-3/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/msgq: pass explicit message queue pointer to recv()Ben Skeggs2-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/msgq: move handling of init message to subdevsBen Skeggs6-1/+57
When the PMU/SEC2 LS FWs have booted, they'll send a message to the host with various information, including the configuration of message/command queues that are available. Move the handling for this to the relevant subdevs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/cmdq: move command generation to subdevsBen Skeggs4-4/+99
This moves the code to generate commands for the ACR unit of the PMU/SEC2 LS firmwares to those subdevs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/cmdq: rename cmdq-related nvkm_msqqueue_queue to nvkm_falcon_cmdqBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/cmdq: implement a more explicit send() interfaceBen Skeggs1-0/+5
Takes the command queue pointer directly instead of requiring a function to lookup based on an queue type, as well as an explicit timeout value. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/cmdq: split the condition for queue readiness vs pmu acr readinessBen Skeggs1-0/+2
This is to allow for proper separation of the LS interface code from the queue handling code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/qmgr: allow arbtrary priv + return code for callbacksBen Skeggs1-0/+18
Code to interface with LS firmwares is being moved to the subdevs where it belongs, rather than living in the common falcon code. Arbitrary private data passed to callbacks is to allow for something other than struct nvkm_msgqueue to be passed into the callback (like the pointer to the subdev itself, for example), and the return code will be used where we'd like to detect failure from synchronous messages. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/msgq: explicitly create message queue from subdevsBen Skeggs4-0/+10
Code to interface with LS firmwares is being moved to the subdevs where it belongs, rather than living in the common falcon code. This is an incremental step towards that goal. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/cmdq: explicitly create command queue(s) from subdevsBen Skeggs4-0/+13
Code to interface with LS firmwares is being moved to the subdevs where it belongs, rather than living in the common falcon code. This is an incremental step towards that goal. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn/qmgr: explicitly create queue manager from subdevsBen Skeggs3-0/+7
Code to interface with LS firmwares is being moved to the subdevs where it belongs, rather than living in the common falcon code. This is an incremental step towards that goal. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: add printk macrosBen Skeggs1-0/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: reset sec2/gsp falcons harderBen Skeggs2-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: specify queue register offsets from subdevBen Skeggs1-0/+6
Also fixes the values for Turing, even though we don't use it yet. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: specify debug/production register offset from subdevBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: specify EMEM address from subdevBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: move bind_context WAR out of common codeBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/flcn: specify FBIF offset from subdevBen Skeggs1-0/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/nvenc: add a stub implementation for the GPUs where it should be supportedBen Skeggs2-2/+12
Mostly so we don't lose info hidden in falcon. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/nvdec/gm107: rename from gp102 implementationBen Skeggs1-1/+1
NVDEC is available from GM107, and we currently only have a stub implementation anyway, let's make it explicit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/nvdec: initialise SW state for falcon from constructorBen Skeggs1-3/+2
This will allow us to register the falcon with ACR, and further customise its behaviour by providing the nvkm_falcon_func structure directly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/nvdec: select implementation based on available fwBen Skeggs1-0/+1
This will allow for further customisation of the subdev depending on what firmware is available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/sec2: use falcon funcsBen Skeggs1-1/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/sec2: initialise SW state for falcon from constructorBen Skeggs1-1/+2
This will allow us to register the falcon with ACR, and further customise its behaviour by providing the nvkm_falcon_func structure directly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/sec2: select implementation based on available firmwareBen Skeggs1-0/+2
This will allow for further customisation of the subdev depending on what firmware is available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/sec2/gp108: split from gp102 implementationBen Skeggs1-0/+1
ACR LS FW loading is moving out of SECBOOT and into their specific subdevs, and the available GP108/GV100 FWs differ from the other GP10x boards. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/gp108: split from gp107Ben Skeggs1-0/+1
ACR LS FW loading is moving out of SECBOOT and into their specific subdevs, and the available GP107/GP108 FWs have interface differences. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/pmu: initialise SW state for falcon from constructorBen Skeggs1-2/+2
This will allow us to register the falcon with ACR, and further customise its behaviour by providing the nvkm_falcon_func structure directly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/pmu/gp10b: split from gm20b implementationBen Skeggs1-0/+1
ACR LS FW loading is moving out of SECBOOT and into their specific subdevs, and the available GM20B/GP10B FWs have interface differences. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gsp: initialise SW state for falcon from constructorBen Skeggs1-3/+2
This will allow us to register the falcon with ACR, and further customise its behaviour by providing the nvkm_falcon_func structure directly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/acr: add loaders for currently available LS firmware imagesBen Skeggs4-0/+141
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/acr: add stub implementation for all GPUs currently supported by SECBOOTBen Skeggs1-0/+8
PMU, SEC2 and GR will be modified to register their falcons with ACR before the main commit switching everything over. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/core: define ACR subdevBen Skeggs2-0/+13
This will replace the current SECBOOT subdev for handling firmware on secure falcons. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/core: add representation of generic binary objectsBen Skeggs1-0/+13
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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