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path: root/drivers/gpu/drm/nouveau/nv50_graph.c (follow)
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2011-11-10drm/nv50/gr: typo fix, how about we not reset fifo during graph init?Ben Skeggs1-2/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20drm/nv50/gr: refactor initialisationBen Skeggs1-81/+37
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-26Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6Linus Torvalds1-3/+6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (135 commits) drm/radeon/kms: fix DP training for DPEncoderService revision bigger than 1.1 drm/radeon/kms: add missing vddci setting on NI+ drm/radeon: Add a rmb() in IH processing drm/radeon: ATOM Endian fix for atombios_crtc_program_pll() drm/radeon: Fix the definition of RADEON_BUF_SWAP_32BIT drm/radeon: Do an MMIO read on interrupts when not uisng MSIs drm/radeon: Writeback endian fixes drm/radeon: Remove a bunch of useless _iomem casts drm/gem: add support for private objects DRM: clean up and document parsing of video= parameter DRM: Radeon: Fix section mismatch. drm: really make debug levels match in edid failure code drm/radeon/kms: fix i2c map for rv250/280 drm/nouveau/gr: disable fifo access and idle before suspend ctx unload drm/nouveau: pass flag to engine fini() method on suspend drm/nouveau: replace nv04_graph_fifo_access() use with direct reg bashing drm/nv40/gr: rewrite/split context takedown functions drm/nouveau: detect disabled device in irq handler and return IRQ_NONE drm/nouveau: ignore connector type when deciding digital/analog on DVI-I drm/nouveau: Add a quirk for Gigabyte NX86T ...
2011-07-25drm/nouveau/gr: disable fifo access and idle before suspend ctx unloadBen Skeggs1-0/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-07-25drm/nouveau: pass flag to engine fini() method on suspendBen Skeggs1-3/+1
It may not be necessary to fail in certain cases (such as failing to idle) on module unload, whereas on suspend it's important to ensure a consistent state can be restored on resume. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-20treewide: remove duplicate includesVitaliy Ivanov1-1/+0
Many stupid corrections of duplicated includes based on the output of scripts/checkincludes.pl. Signed-off-by: Vitaliy Ivanov <vitalivanov@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-05-16drm/nva3: implement support for copy engineBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: remove remnants of nouveau_pgraph_engineBen Skeggs1-1/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nv50/gr: move to exec engine interfacesBen Skeggs1-202/+224
This needs a massive cleanup, but to catch bugs from the interface changes vs the engine code cleanup, this will be done later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: move engine object creation into per-engine hooksBen Skeggs1-0/+26
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: Fix missing whitespace checkpatch.pl errors.Emil Velikov1-1/+1
This patch fixes messages such as ERROR: space required after that ',' ERROR: spaces required around that '=' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-05-16drm/nouveau: Fix brace placement checkpatch.pl errors.Emil Velikov1-2/+1
Fix 'ERROR: that open brace { should be on the previous line' Fix 'ERROR: else should follow close brace }' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2011-04-05drm/nv50: use "nv86" tlb flush method on everything except 0x50/0xacBen Skeggs1-1/+1
It has been reported that this greatly improves (and possibly fixes completely) the stability of NVA3+ chipsets. In traces of my NVA8, NVIDIA now appear to be doing this too. The most recent traces of 0x50 and 0xac I could find don't show NVIDIA checking PGRAPH status on these flushes, so for now, we won't either. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-03-14drm/nv50: check for vm traps on every gr irqBen Skeggs1-2/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-03-14drm/nouveau: add nouveau_enum_find() util functionBen Skeggs1-46/+46
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nv50: flesh out ZCULL init and match nvidia on later chipsetsBen Skeggs1-5/+34
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nv50: fix typos in CCACHE error reportingMarcin Slusarz1-4/+4
The code was supposed to print registers around 0x405018 (which is read earlier), not 0x405818. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nv50: enable page flippingBen Skeggs1-6/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-25drm/nv50: Fix race with PFIFO during PGRAPH context destruction.Francisco Jerez1-0/+3
Reported-by: Xavier Chantry <chantry.xavier@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-30drm/nv50: sync up gr data error names with rnn, use for nvc0 alsoBen Skeggs1-7/+42
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: implement global channel address space on new VM codeBen Skeggs1-0/+3
As of this commit, it's guaranteed that if an object is in VRAM that its GPU virtual address will be constant. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: import new vm codeBen Skeggs1-2/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c filesBen Skeggs1-2/+498
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow itBen Skeggs1-5/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: fix compute object classBen Skeggs1-2/+8
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: Keep track of the head a channel is vsync'ing to.Francisco Jerez1-0/+3
In a multihead setup vblank interrupts may end up enabled in both heads. In that case we want to ignore the vblank interrupts coming from the wrong CRTC to avoid tearing and unbalanced calls to drm_vblank_get/put (fdo bug 31074). Reported-by: Felix Leimbach <felix.leimbach@gmx.net> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: Implement the pageflip ioctl.Francisco Jerez1-0/+16
nv0x-nv4x should be mostly fine, nv50 doesn't work yet. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: Implement the vblank DRM hooks.Francisco Jerez1-8/+1
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: improve evo error handler when more than just channel 0 activeBen Skeggs1-6/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: remove excessive alignment of graph/crypt contextsBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: only expose the object classes that are supported by the chipsetBen Skeggs1-30/+61
We previously added all the available classes for the entire generation, even though the objects wouldn't work on the hardware. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: store engine type in gpuobj class structsBen Skeggs1-10/+10
We will eventually want to address hw engines other than PGRAPH. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: Refactor context destruction to avoid a lock ordering issue.Francisco Jerez1-0/+11
The destroy_context() engine hooks call gpuobj management functions to release the channel resources, these functions use HARDIRQ-unsafe locks whereas destroy_context() is called with the HARDIRQ-safe context_switch_lock held, that's a lock ordering violation. Push the engine-specific channel destruction logic into destroy_context() and let the hardware-specific code lock and unlock when it's actually needed. Change the engine destruction order to avoid a race in the small gap between pgraph and pfifo context uninitialization. Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: add more fine-grained locking to channel list + structuresBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-11-18drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hangBen Skeggs1-0/+52
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: Remove implicit argument from nv_wait().Francisco Jerez1-1/+1
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanityBen Skeggs1-20/+19
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: modify object accessors, offset in bytes rather than dwordsBen Skeggs1-9/+9
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nv50: cleanup nv50_fifo.cBen Skeggs1-4/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nouveau: remove ability to use external firmwareBen Skeggs1-36/+28
This was always really a developer option, and if it's really necessary we can hack this in ourselves. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nouveau: add instmem flush() hookBen Skeggs1-6/+2
This removes the previous prepare_access() and finish_access() hooks, and replaces it with a much simpler flush() hook. All the chipset-specific code before nv50 has its use removed completely, as it's not required there at all. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nouveau: Fix a couple of sparse warnings.Francisco Jerez1-5/+5
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-04-09drm/nv50: Allow using the NVA3 new compute class.Marcin Kościelnicki1-3/+4
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-03-10drm/nv50: Improve PGRAPH interrupt handling.Marcin Kościelnicki1-0/+18
This makes nouveau recognise and report more kinds of PGRAPH errors, as well as prevent GPU lockups resulting from some of them. Lots of guesswork was involved and some part of this is probably incorrect. Some potential-lockuop situations are handled by just resetting a whole PGRAPH subunit, which doesn't sound like a "proper" solution, but seems to work just fine... for now. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-03-10drm/nv50: Remove redundant/incorrect ctxvals initialisation.Marcin Kościelnicki1-4/+0
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised earlier anyway by both our ctxprog generator and blob ctxvals. It's actually incorrect with the generator, since we use different layout on pre-NVA0. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-25drm/nv50: Implement ctxprog/state generation.Marcin Kościelnicki1-32/+42
This removes dependence on external firmware for NV50 generation cards. If the generated ctxprogs don't work for you for some reason, please report it. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-10drm/nv50: avoid unloading pgraph context when ctxprog is runningMaarten Maathuis1-3/+7
- We need to disable pgraph fifo access before checking the current channel, otherwise we could still hit a running ctxprog. - The writes to 0x400500 are already handled by pgraph->fifo_access and are therefore redundant, moreover pgraph fifo access should not be reenabled before current context is set as invalid. So remove them altogether. Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-14drm/nv50: Fix typo in PGRAPH initialisation.Marcin Kościelnicki1-1/+1
This enables streamout functionality. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-14drm/nv50: wait for pgraph to idle before unloading the contextMaarten Maathuis1-0/+1
This should fix the problem with gpu hangs people have had when closing channels. Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2009-12-16drm/nv40: implement ctxprog/state generationBen Skeggs1-3/+7
The context programs are *very* simple compared to the ones used by the binary driver. There's notes in nv40_grctx.c explaining most of the things we don't implement. If we discover if/why any of it is required further down the track, we'll handle it then. The PGRAPH state generated for each chipset should match what NVIDIA do almost exactly (there's a couple of exceptions). If someone has a lot of time on their hands, they could figure out the mapping of object/method to PGRAPH register and demagic the initial state a little, it's not terribly important however. At time of commit, confirmed to be working at least well enough for accelerated X (and where tested, for 3D apps) on NV40, NV43, NV44, NV46, NV49, NV4A, NV4B and NV4E. A module option has been added to force the use of external firmware blobs if it becomes required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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