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2022-02-11drm/amdkfd: replace err by dbg print at svm vram migrationAlex Sierra1-8/+9
Avoid spam the kernel log on application memory allocation failures. __func__ argument was also removed from dev_fmt macro due to parameter conflicts with dynamic_dev_dbg. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.comi> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdkfd: Fix prototype warning for get_process_num_bosRajneesh Bhardwaj1-1/+1
Fix the warning: no previous prototype for 'get_process_num_bos' [-Wmissing-prototypes] Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdkfd: CRIU fix extra whitespace and block comment warningsRajneesh Bhardwaj1-2/+3
Fix checkpatch reported warning for a quoted line and block line comments. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: adjust register address calculationStanley.Yang1-0/+7
the UMC_STATUS register is not linear, adjust offset calculation formula to get correct address Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: skipping SDMA hw_init and hw_fini for S0ix.Rajib Mahapatra1-0/+8
[Why] SDMA ring buffer test failed if suspend is aborted during S0i3 resume. [How] If suspend is aborted for some reason during S0i3 resume cycle, it follows SDMA ring test failing and errors in amdgpu resume. For RN/CZN/Picasso, SMU saves and restores SDMA registers during S0ix cycle. So, skipping SDMA suspend and resume from driver solves the issue. This time, the system is able to resume gracefully even the suspend is aborted. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rajib Mahapatra <rajib.mahapatra@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: remove ctx->lockKen Xue3-8/+11
KMD reports a warning on holding a lock from drm_syncobj_find_fence, when running amdgpu_test case “syncobj timeline test”. ctx->lock was designed to prevent concurrent "amdgpu_ctx_wait_prev_fence" calls and avoid dead reservation lock from GPU reset. since no reservation lock is held in latest GPU reset any more, ctx->lock can be simply removed and concurrent "amdgpu_ctx_wait_prev_fence" call also can be prevented by PD root bo reservation lock. call stacks: ================= //hold lock amdgpu_cs_ioctl->amdgpu_cs_parser_init->mutex_lock(&parser->ctx->lock); … //report warning amdgpu_cs_dependencies->amdgpu_cs_process_syncobj_timeline_in_dep \ ->amdgpu_syncobj_lookup_and_add_to_sync -> drm_syncobj_find_fence \ -> lockdep_assert_none_held_once … amdgpu_cs_ioctl->amdgpu_cs_parser_fini->mutex_unlock(&parser->ctx->lock); Signed-off-by: Ken Xue <Ken.Xue@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: Reset OOB table error count infoStanley.Yang1-0/+3
The OOB table error count info should be reset after reset eeprom table Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amd/pm: fulfill the support for DriverSmuConfig tableEvan Quan4-1/+24
Enable the support for DriverSmuConfig table on Navi1x and Sienna_Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amd/pm: correct UMD pstate clocks for Dimgrey Cavefish and Beige GobyEvan Quan2-5/+29
Correct the UMD pstate profiling clocks for Dimgrey Cavefish and Beige Goby. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11amdgpu/pm: Add emit_clock_levels callsDarren Powell1-14/+35
(v4) Modifications to satisfy checkpatch --strict (v3) Rewrote patchset to order patches as (API, hw impl, usecase) - modified amdgpu_get_pp_od_clk_voltage to try amdgpu_dpm_emit_clock_levels and fallback to amdgpu_dpm_print_clock_levels if emit is not implemented. - modified amdgpu_get_pp_dpm_clock to try amdgpu_dpm_emit_clock_levels and fallback to amdgpu_dpm_print_clock_levels if emit is not implemented. - Newline is printed to buf if no output produced == Test == LOGFILE=pp_clk.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON} lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_od_clk_voltage pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie pp_dpm_socclk pp_dpm_fclk pp_dpm_dcefclk pp_dpm_vclk pp_dpm_dclk " for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11amdgpu/pm: Implement emit_clk_levels for navi10Darren Powell1-0/+210
(v4) Modifications to satisfy checkpatch --strict (v3) Rewrote patchset to order patches as (API, hw impl, usecase) - implement emit_clk_levels for navi10, based on print_clk_levels, but using sysfs_emit without smu_cmn_get_sysfs() workaround Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: loose check for umc poison modeTao Zhou1-13/+5
No need to check poison setting for each channel, check for umc0 channel0 is enough. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: add support for GC 10.1.4Lang Yu8-3/+26
Add basic support for GC 10.1.4, it uses same IP blocks with GC 10.1.3 Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdkfd: fix loop error handlingTom Rix1-2/+2
Clang static analysis reports this problem kfd_chardev.c:2594:16: warning: The expression is an uninitialized value. The computed value will also be garbage while (ret && i--) { ^~~ i is a loop variable and this block unwinds a problem in the loop. When the error happens before the loop, this value is garbage. Move the initialization of i to its decalaration. Fixes: be072b06c739 ("drm/amdkfd: CRIU export BOs as prime dmabuf objects") Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amd/display: extend dcn201 supportOliver Logush2-1/+2
Signed-off-by: Oliver Logush <ollogush@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdkfd: fix freeing an unset pointerTom Rix1-4/+2
clang static analysis reports this problem kfd_chardev.c:2092:2: warning: 1st function call argument is an uninitialized value kvfree(bo_privs); ^~~~~~~~~~~~~~~~ When bo_buckets alloc fails, it jumps to an error handler that frees the yet to be allocated bo_privs. Because bo_buckets is the first error, return directly. Fixes: 5ccbb057c0a1 ("drm/amdkfd: CRIU Implement KFD checkpoint ioctl") Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdkfd: CRIU return -EFAULT for copy_to_user() failureDan Carpenter1-3/+3
If copy_to_user() fails, it returns the number of bytes remaining to be copied but we want to return a negative error code (-EFAULT) to the user. Fixes: 9d5dabfeff3c ("drm/amdkfd: CRIU Save Shared Virtual Memory ranges") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: David Yat Sin <david.yatsin@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdkfd: CRIU fix a NULL vs IS_ERR() checkDan Carpenter1-1/+1
The kfd_process_device_data_by_id() does not return error pointers, it returns NULL. Fixes: bef153b70c6e ("drm/amdkfd: CRIU implement gpu_id remapping") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: David Yat Sin <david.yatsin@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amd/pm: fix enabled features retrieving on Renoir and Cyan SkillfishEvan Quan3-8/+22
For Cyan Skillfish and Renoir, there is no interface provided by PMFW to retrieve the enabled features. So, we assume all features are enabled. Fixes: 7ade3ca9cdb5 ("drm/amd/pm: correct the usage for 'supported' member of smu_feature structure") Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-11drm/amdgpu: Fix htmldoc warningAndrey Grodzovsky1-1/+1
Update function name. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220211205500.601391-1-andrey.grodzovsky@amd.com
2022-02-11drm/i915: Nuke some dead codeVille Syrjälä1-17/+1
Remove all the dead code from icl_ddi_bigjoiner_pre_enable(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220203183823.22890-6-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
2022-02-11drm/i915: Clean up the bigjoiner state copy logicVille Syrjälä3-75/+108
Currently the bigjoiner state copy logic is kind of a byzantine mess. Clean it up to operate in the following manner during a full modeset: 1) master uapi -> hw state copy 2) master hw -> slave hw state copy And during a non-modeset update we do: 1) master uapi -> hw state light copy 2) master hw -> slave hw state light copy I think that is now easier to reason about since we never do any kind of master uapi -> slave hw state copy short circuit that could happen previously. Obviously this does now depend on the master uapi->hw copy always happening before the master hw -> slave hw copy, but that is guaranteed by the fact that we always add both crtcs to the state early, the crtcs are registered in pipe order (so the compute_config loop happens in pipe order), and the hardware requires the master pipe has to be lower than the slave pipe as well. And for good measure we shall add a check+WARN for this before doing the bigjoiner crtc assignment. v2: Fix uapi.ctm vs. hw.ctm copy-paste fail Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220204072049.1610-1-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
2022-02-11drm/i915: Remove weird code from intel_atomic_check_bigjoiner()Ville Syrjälä1-22/+11
There's some weird junk in intel_atomic_check_bigjoiner() that's trying to look at the old crtc state's bigjoiner usage for some reason. That code is totally unnecessary, and maybe even actively harmful. Not entirely sure which since it's such a mess that I can't actually wrap my brain around what it ends up doing. Either way, thanks to intel_bigjoiner_add_affected_crtcs() all of the old bigjoiner crtcs are guaranteed to be in the state already if any one of them is in the state. Also if any one of those crtcs got flagged for a modeset, then all of them will have been flagged, and the bigjoiner links will have been detached via kill_bigjoiner_slave(). So there is no need to look examing any old bigjoiner usage in intel_atomic_check_bigjoiner(). All we have to care about is whether bigjoiner is needed for the new state, and whether we can get the slave crtc we need. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220203183823.22890-4-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
2022-02-11drm/i915: Fix bigjoiner state copy failsVille Syrjälä1-1/+13
We seem to be missing a few things from the bigjoiner state copy. Namely hw.mode isn't getting copied (which probably causes PIPESRC to be misconfigured), CTM/LUTs aren't getting copied (which could cause the pipe to produced incorrect output), and we also forgot to copy over the color_mgmt_changed flag so potentially we fail to do the actual CTM/LUT programming (assuming we aren't doing a full modeset or fastset). Fix it all. v2: Fix uapi.ctm vs. hw.ctm copy-paste fail Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220204072009.1546-1-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
2022-02-11drm/i915: Flag crtc scaling_filter changes as modesetVille Syrjälä1-0/+4
The core doesn't flag scaling_filter prop changes as needing a modeset. That doesn't work for us since we only reprogram the pipe scaler during full modesets and fastsets. So we need to flag the prop change as a modeset ourselves. Assuming nothing else has changed the operation will get promoted (demoted?) to a fastset later. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220203183823.22890-2-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
2022-02-11drm/i915/dp: Reuse intel_hdmi_tmds_clock()Ville Syrjälä3-16/+7
Reuse intel_hdmi_tmds_clock() for DP->HDMI TMDS clock calculations. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211015133921.4609-9-ville.syrjala@linux.intel.com Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
2022-02-11drm/i915/hdmi: Simplify intel_hdmi_mode_clock_valid()Ville Syrjälä1-16/+21
Just loop over the possible bpc values instead of using an ugly if construct. A slight change in behaviour is that we now call intel_hdmi_{source,sink}_bpc_possible() even for 8bpc, but that is fine since 8bpc is always supported. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211015133921.4609-8-ville.syrjala@linux.intel.com Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
2022-02-11drm/cma-helper: Set VM_DONTEXPAND for mmapRobin Murphy1-0/+1
drm_gem_cma_mmap() cannot assume every implementation of dma_mmap_wc() will end up calling remap_pfn_range() (which happens to set the relevant vma flag, among others), so in order to make sure expectations around VM_DONTEXPAND are met, let it explicitly set the flag like most other GEM mmap implementations do. This avoids repeated warnings on a small minority of systems where the display is behind an IOMMU, and has a simple driver which does not override drm_gem_cma_default_funcs. Arm hdlcd is an in-tree affected driver. Out-of-tree, the Apple DCP driver is affected; this fix is required for DCP to be mainlined. [Alyssa: Update commit message.] Fixes: c40069cb7bd6 ("drm: add mmap() to drm_gem_object_funcs") Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211013143654.39031-1-alyssa@rosenzweig.io
2022-02-11drm/panfrost: Handle IDVS_GROUP_SIZE featureAlyssa Rosenzweig3-0/+7
The IDVS group size feature was missing. It is used on some Bifrost and Valhall GPUs, and is the last kernel-relevant Bifrost feature we're missing. This feature adds an extra IDVS group size field to the JM_CONFIG register. In kbase, the value is configurable via the device tree; kbase uses 0xF as a default if no value is specified. Until we find a device demanding otherwise, let's always set the 0xF default on devices which support this feature mimicking kbase's behaviour. Tuning this register slightly improves performance of index-driven vertex shading. On Mali-G52 (with Mesa), overall glmark2 score is improved from 1026 to 1037. Geometry-heavy scenes like -bshading are improved from 1068 to 1098. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220211145849.3148-1-alyssa.rosenzweig@collabora.com
2022-02-11drm/i915: Extract skl_crtc_calc_dbuf_bw()Ville Syrjälä1-38/+44
Extract the dbuf slice data_rate calculation into a small helper. Should make it a bit easier to handle the different color planes of planar formats correctly. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220118092354.11631-7-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-02-11drm/i915: Extract skl_allocate_plane_ddb()Ville Syrjälä1-17/+24
Replace some copy-pasta with a function. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220118092354.11631-6-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-02-11drm/i915: Introduce skl_plane_ddb_iterVille Syrjälä1-48/+49
Collect a bit of the stuff used during the plane ddb allocation into a struct we can pass around. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220118092354.11631-5-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-02-11drm/i915: Fix plane relative_data_rate calculationVille Syrjälä1-61/+2
We are currently computing the relative data rates as src_size * scale_factor where scale_factor is src_size / dst_size. Thus relative data rate is src_size * src_size / dst_size, which is just utter nonsense. What we really seem to want is just a reasonable estimate on how much data will be fetched which is just src_size. So let's do that instead. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220118092354.11631-4-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-02-11drm/i915: Extract skl_ddb_entry_init()Ville Syrjälä1-19/+25
Extract a small helper to populate a ddb entry. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220118092354.11631-3-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-02-11drm/i915: Drop pointless dev_priv argumentVille Syrjälä1-6/+5
skl_ddb_entry_init_from_hw() has no need for dev_priv. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220118092354.11631-2-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-02-11drm/i915: split out gem/i915_gem_create.h from i915_drv.hJani Nikula4-4/+19
We already have the gem/i915_gem_create.c file. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f4d5108498ce10fff8577520276d40e86b2d5a16.1644507885.git.jani.nikula@intel.com
2022-02-11drm/i915: split out gem/i915_gem_dmabuf.h from i915_drv.hJani Nikula6-5/+24
We already have the gem/i915_gem_dmabuf.c file. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/2f3fa0fb7cd78c204e27b2454410b6530289efdc.1644507885.git.jani.nikula@intel.com
2022-02-11drm/i915/dg2: Add Wa_22011100796Bruce Chang1-0/+9
Whenever Full soft reset is required, reset all individual engines first, and then do a full soft reset. Signed-off-by: Bruce Chang <yu.bruce.chang@intel.com> cc: Matt Roper <matthew.d.roper@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Ramalingam C <ramalingam.c@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220128185209.18077-5-ramalingam.c@intel.com
2022-02-11drm/i915: More gt idling time with guc submissionRamalingam C1-1/+1
On i915_selftest@live@gt_timelines, we create many contexts in loop and create and submit request and then destoy contexts. Destroying the context needs to disable scheduling, wait for G2H, deregister context and wait for G2H to destroy each context. Idling of the gt has to wait for all this to complete which is taking ~3sec for this test. Hence we are increasing the igt_flush_test's timeout for gt idling to 3Sec. Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220128185209.18077-4-ramalingam.c@intel.com
2022-02-11drm/i915: align the plane_vma to min_page_size of stolen memRamalingam C1-2/+3
Align the plane vma size to the stolem memory regions' min_page_size. Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Matthew Auld <matthew.auld@intel.com> cc: Chris P Wilson <chris.p.wilson@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220128185209.18077-3-ramalingam.c@intel.com
2022-02-11drm/i915/dg2: Add Wa_22011450934Ramalingam C2-0/+32
An indirect ctx wabb is implemented as per Wa_22011450934 to avoid rcs restore hang during context restore of a preempted context in GPGPU mode Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Chris Wilson <chris.p.wilson@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220128185209.18077-2-ramalingam.c@intel.com
2022-02-11drm/i915/selftests: Disable runtime pm wakeref tracking for the mock deviceVille Syrjälä3-0/+6
commit c50df701d49e ("drm/i915: Enable rpm wakeref tracking whether runtime pm is enabled or not") enabled wakeref tracking even for the mock device. Turns out that has somewhat significant overhead, and on the glacial Core m3's we have in CI the vma selftests are now exceeding the allotted time budget. So let's disable the wakeref tracking once again for the mock device in order to avoid blowing up the selftest runtime. Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Acked-by: Tomi Sarvela <tomi.p.sarvela@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220204171053.18409-1-ville.syrjala@linux.intel.com
2022-02-11drm/i915: remove leftover i915_gem_pm.h declarations from i915_drv.hJani Nikula2-3/+1
Remove the duplicates. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/48f5ace6393533372da5d13df3de0203c8db11b3.1644507885.git.jani.nikula@intel.com
2022-02-11drm/i915: split out i915_gem_internal.h from i915_drv.hJani Nikula31-16/+67
We already have the i915_gem_internal.c file. Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/6715d1f3232c445990630bb3aac00f279f516fee.1644507885.git.jani.nikula@intel.com
2022-02-11drm/syncobj: flatten dma_fence_chains on transferChristian König1-5/+56
It is illegal to add a dma_fence_chain as timeline point. Flatten out the fences into a dma_fence_array instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nirmoy Das <nirmoy.das@linux.intel.com> Cc: <stable@vger.kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220209182600.434803-1-christian.koenig@amd.com
2022-02-11drm/i915/mst: update slot information for 128b/132bJani Nikula1-2/+31
128b/132b supports using 64 slots starting from 0, while 8b/10b reserves slot 0 for metadata. Commit d6c6a76f80a1 ("drm: Update MST First Link Slot Information Based on Encoding Format") added support for updating the topology state accordingly, and commit 41724ea273cd ("drm/amd/display: Add DP 2.0 MST DM Support") started using it in the amd driver. This feels more than a little cumbersome, especially updating the information in atomic check. For i915, add the update to MST connector .compute_config hook rather than iterating over all MST managers and connectors in global mode config .atomic_check. Fingers crossed. v3: - Propagate errors from intel_dp_mst_update_slots() (Ville) v2: - Update in .compute_config() not .atomic_check (Ville) Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Lyude Paul <lyude@redhat.com> Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220208152317.3019070-1-jani.nikula@intel.com
2022-02-11drm/i915/dp: add 128b/132b support to link status checksJani Nikula3-11/+34
Abstract link status check to a function that takes 128b/132b and 8b/10b into account, and use it. Also dump link status on failures. Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/cec395d435679a290a1c35fcbfc54555101bfad1.1643878928.git.jani.nikula@intel.com
2022-02-11drm/i915/dp: rewrite DP 2.0 128b/132b link training based on errataJani Nikula1-1/+300
The DP 2.0 errata completely overhauls the 128b/132b link training, with no provisions for backward compatibility with the original DP 2.0 specification. The changes are too intrusive to consider reusing the same code for both 8b/10b and 128b/132b, mainly because the LTTPR channel equalisation is done concurrently instead of serialized. NOTES: * It's a bit unclear when to wait for DP_INTERLANE_ALIGN_DONE and per-lane DP_LANE_SYMBOL_LOCKED. Figure xx4 in the SCR implies the LANEx_CHANNEL_EQ_DONE sequence may end with either 0x77,0x77,0x85 *or* 0x33,0x33,0x84 (for four lane configuration in DPCD 0x202..0x204) i.e. without the above bits set. Text elsewhere seems contradictory or incomplete. * We read entire link status (6 bytes) everywhere instead of individual DPCD addresses. * There are some subtle ambiguities or contradictions in the order of some DPCD access and TPS signal enables/disables. It's also not clear whether these are significant. v4: - Wait for intra-hop clear after link training end (Ville) - Wait instead of single check for intra-hop clear before link train v3: - Use msecs_to_jiffies_timeout() (Ville) - Read status at the beginning of interlane align done loop (Ville) - Try to simplify timeout flag use where possible (Ville) v2: - Always try one last time after timeouts to avoid races (Ville) - Extend timeout to cover the entire LANEx_EQ_DONE sequence (Ville) - Also check for eq interlane align done in LANEx_CDS_DONE Sequence (Ville) - Check for Intra-hop status before link training Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220208143209.2997337-1-jani.nikula@intel.com
2022-02-11drm/i915/dp: move intel_dp_prepare_link_train() callJani Nikula1-2/+2
Call it from the higher level function, as it will be shared between two code paths. Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c0fffbf7213c09e42be9875d38d3001e0026b063.1643878928.git.jani.nikula@intel.com
2022-02-11drm/dp: add 128b/132b link status helpers from DP 2.0 E11Jani Nikula1-0/+63
The DP 2.0 errata redefines link training. There are some new status bits, and some of the old ones need to be checked independently. Add helpers to do this. Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/5a46260d1f171fed46d0ab8fe4b6499abd65ce24.1643878928.git.jani.nikula@intel.com
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