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2021-05-18drm: bridge: it66121: fix an error code in it66121_probe()Dan Carpenter1-1/+1
This code is passing the wrong variable to PTR_ERR() so it doesn't return the correct error code. Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/YJ+ZX3BdKPAN0pUZ@mwanda
2021-05-18drm/virtio: free virtqueues on probe failureXie Yongji1-1/+3
We should call virtio_gpu_deinit() to free virtqueues when drm_dev_register() failed. Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Link: http://patchwork.freedesktop.org/patch/msgid/20210517084913.403-3-xieyongji@bytedance.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-05-18drm/virtio: Fix double free on probe failureXie Yongji1-0/+1
The virtio_gpu_init() will free vgdev and vgdev->vbufs on failure. But such failure will be caught by virtio_gpu_probe() and then virtio_gpu_release() will be called to do some cleanup which will free vgdev and vgdev->vbufs again. So let's set dev->dev_private to NULL to avoid double free. Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Link: http://patchwork.freedesktop.org/patch/msgid/20210517084913.403-2-xieyongji@bytedance.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-05-18drm/virtio: Fixes a potential NULL pointer dereference on probe failureXie Yongji1-0/+3
The dev->dev_private might not be allocated if virtio_gpu_pci_quirk() or virtio_gpu_init() failed. In this case, we should avoid the cleanup in virtio_gpu_release(). Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Link: http://patchwork.freedesktop.org/patch/msgid/20210517084913.403-1-xieyongji@bytedance.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-05-17Merge drm/drm-next into drm-intel-nextRodrigo Vivi434-8891/+14854
Time to get back in sync... Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-05-17drm: Mark IRQ_BUSID ioctl as legacyThomas Zimmermann4-13/+14
The functionality is only implemented for legacy drivers. Mark the ioctl as legacy and move the code behind CONFIG_DRM_LEGACY. If legacy drivers are disabled, the ioctl call now returns -EINVAL instead of -EOPNOTSUPP. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210516195135.3755-1-tzimmermann@suse.de
2021-05-17drm: Remove unused branch in legacy PCI initializationThomas Zimmermann1-3/+0
The legacy PCI init code sets the drvdata for drivers with MODESET flag, but none of the old UMS drivers sets the flag. Remove the branch. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210516191918.20974-1-tzimmermann@suse.de
2021-05-17drm: Don't include drm_legacy.h in drm_lease.cThomas Zimmermann1-1/+0
DRM leases do not use DRM legacy code. Remove the rsp include statement. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210516185937.5644-4-tzimmermann@suse.de
2021-05-17drm/nouveau: Don't include drm_legacy.hThomas Zimmermann1-2/+0
Nouveau does not use DRM legacy code. Remove the rsp. include statement. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210516185937.5644-3-tzimmermann@suse.de
2021-05-17drm/i915: Don't include drm_legacy.hThomas Zimmermann2-2/+0
i915 does not use DRM legacy code. Remove the rsp include statements. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210516185937.5644-2-tzimmermann@suse.de
2021-05-17drm/ingenic: Fix pixclock rate for 24-bit serial panelsPaul Cercueil1-1/+1
When using a 24-bit panel on a 8-bit serial bus, the pixel clock requested by the panel has to be multiplied by 3, since the subpixels are shifted sequentially. The code (in ingenic_drm_encoder_atomic_check) already computed crtc_state->adjusted_mode->crtc_clock accordingly, but clk_set_rate() used crtc_state->adjusted_mode->clock instead. Fixes: 28ab7d35b6e0 ("drm/ingenic: Properly compute timings when using a 3x8-bit panel") Cc: stable@vger.kernel.org # v5.10 Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: H. Nikolaus Schaller <hns@goldelico.com> # CI20/jz4780 (HDMI) and Alpha400/jz4730 (LCD) Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20210323144008.166248-1-paul@crapouillou.net
2021-05-17drm/i915/gem: Pin the L-shape quirked object as unshrinkableChris Wilson2-6/+7
When instantiating a tiled object on an L-shaped memory machine, we mark the object as unshrinkable to prevent the shrinker from trying to swap out the pages. We have to do this as we do not know the swizzling on the individual pages, and so the data will be scrambled across swap out/in. Not only do we need to move the object off the shrinker list, we need to mark the object with shrink_pin so that the counter is consistent across calls to madvise. v2: in the madvise ioctl we need to check if the object is currently shrinkable/purgeable, not if the object type supports shrinking Fixes: 0175969e489a ("drm/i915/gem: Use shrinkable status for unknown swizzle quirks") References: https://gitlab.freedesktop.org/drm/intel/-/issues/3293 References: https://gitlab.freedesktop.org/drm/intel/-/issues/3450 Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: <stable@vger.kernel.org> # v5.12+ Link: https://patchwork.freedesktop.org/patch/msgid/20210517084640.18862-1-matthew.auld@intel.com
2021-05-17drm/exynos/decon5433: Remove redundant error printing in exynos5433_decon_probe()Zhen Lei1-3/+1
When devm_ioremap_resource() fails, a clear enough error message will be printed by its subfunction __devm_ioremap_resource(). The error information contains the device name, failure cause, and possibly resource information. Therefore, remove the error printing here to simplify code and reduce the binary size. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-05-17drm/exynos: Remove redundant error printing in exynos_dsi_probe()Zhen Lei1-3/+1
When devm_ioremap_resource() fails, a clear enough error message will be printed by its subfunction __devm_ioremap_resource(). The error information contains the device name, failure cause, and possibly resource information. Therefore, remove the error printing here to simplify code and reduce the binary size. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-05-17drm/exynos: correct exynos_drm_fimd kerneldocKrzysztof Kozlowski1-1/+1
Correct the kerneldoc of fimd_shadow_protect_win() to fix W=1 warnings: drivers/gpu/drm/exynos/exynos_drm_fimd.c:734: warning: expecting prototype for shadow_protect_win(). Prototype was for fimd_shadow_protect_win() instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2021-05-17drm/tegra: Fix shift overflow in tegra_shared_plane_atomic_updateNathan Chancellor1-1/+1
Clang warns: drivers/gpu/drm/tegra/hub.c:513:11: warning: shift count >= width of type [-Wshift-count-overflow] base |= BIT(39); ^~~~~~~ BIT is unsigned long, which is 32-bit on ARCH=arm, hence the overflow warning. Switch to BIT_ULL, which is 64-bit and will not overflow. Fixes: 7b6f846785f4 ("drm/tegra: Support sector layout on Tegra194") Link: https://github.com/ClangBuiltLinux/linux/issues/1351 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-17drm/tegra: sor: Fully initialize SOR before registrationThierry Reding1-14/+13
Before registering the SOR host1x client, make sure that it is fully initialized. This avoids a potential race condition between the SOR's probe and the host1x device initialization in cases where the SOR is the final sub-device to register to a host1x instance. Reported-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-17gpu: host1x: Split up client initalization and registrationThierry Reding1-6/+24
In some cases we may need to initialize the host1x client first before registering it. This commit adds a new helper that will do nothing but the initialization of the data structure. At the same time, the initialization is removed from the registration function. Note, however, that for simplicity we explicitly initialize the client when the host1x_client_register() function is called, as opposed to the low-level __host1x_client_register() function. This allows existing callers to remain unchanged. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-17drm/tegra: sor: Do not leak runtime PM referencePavel Machek (CIP)1-4/+10
It's theoretically possible for the runtime PM reference to leak if the code fails anywhere between the pm_runtime_resume_and_get() and pm_runtime_put() calls, so make sure to release the runtime PM reference in that case. Practically this will never happen because none of the functions will fail on Tegra, but it's better for the code to be pedantic in case these assumptions will ever become wrong. Signed-off-by: Pavel Machek (CIP) <pavel@denx.de> [treding@nvidia.com: add commit message] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-17drm/bridge: lt9611: Add missing MODULE_DEVICE_TABLEZou Wei1-0/+1
This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/1620801955-19188-1-git-send-email-zou_wei@huawei.com
2021-05-17drm/i915/gvt: Move mdev attribute groups into kvmgt moduleZhenyu Wang6-138/+118
As kvmgt module contains all handling for VFIO/mdev, leaving mdev attribute groups in gvt module caused dependency issue. Although it was there for possible other hypervisor usage, that turns out never to be true. So this moves all mdev handling into kvmgt module completely to resolve dependency issue. With this fix, no config workaround is required. So revert previous workaround commits: adaeb718d46f ("vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV") and 07e543f4f9d1 ("vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV"). Reviewed-by: Colin Xu <colin.xu@intel.com> Cc: Arnd Bergmann <arnd@kernel.org> Cc: Jason Gunthorpe <jgg@ziepe.ca> Cc: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20210513083902.2822350-1-zhenyuw@linux.intel.com
2021-05-16drm: correct function name drm_legacy_ctxbitmap_flush()Yang Yingliang1-1/+1
Fix the following make W=1 kernel build warning: drivers/gpu/drm/drm_context.c:136: warning: expecting prototype for drm_ctxbitmap_flush(). Prototype was for drm_legacy_ctxbitmap_flush() instead Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20210513071918.1728535-1-yangyingliang@huawei.com
2021-05-15drm: simpledrm: fix a potential NULL dereferenceDan Carpenter1-2/+7
The drm_format_info() function returns NULL if the format is unsupported, but the simplefb_get_validated_format() is expected to return error pointers. If we propagate the NULL return then it will lead to a NULL dereference in the callers. Swap the NULL and trade it in for an ERR_PTR(-EINVAL). Fixes: 11e8f5fd223b ("drm: Add simpledrm driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/YJ+aC47XX58ICXax@mwanda
2021-05-14drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057)José Roberto de Souza1-1/+19
Buffer compression is not usable in A stepping. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Clinton A Taylor <clinton.a.taylor@intel.com> Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-20-matthew.d.roper@intel.com
2021-05-14drm/i915/display/adl_p: Implement Wa_22011320316José Roberto de Souza1-1/+20
Implementation details are in the HSD 22011320316, requiring CD clock to be at least 307MHz to make DC states to work. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-19-matthew.d.roper@intel.com
2021-05-14drm/i915/adl_p: Implement Wa_22011091694José Roberto de Souza2-1/+14
Adding a new hook to ADL-P just to avoid another platform check in gen12lp_init_clock_gating() but also open to it. BSpec: 54369 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-18-matthew.d.roper@intel.com
2021-05-14drm/i915/adl_p: Add IPs stepping mappingJosé Roberto de Souza2-1/+19
This will allow us to better implement workarounds. Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-17-matthew.d.roper@intel.com
2021-05-14drm/i915/bigjoiner: atomic commit changes for uncompressed joinerAnimesh Manna4-1/+49
Respective bit for master or slave to be set for uncompressed bigjoiner in dss_ctl1 register. Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-16-matthew.d.roper@intel.com
2021-05-14drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoinerAnimesh Manna1-2/+6
For uncompressed big joiner DSC engine will not be used so will avoid compute config of DSC. Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-15-matthew.d.roper@intel.com
2021-05-14drm/i915/bigjoiner: Mode validation with uncompressed pipe joinerAnimesh Manna1-2/+5
No need for checking dsc flag for uncompressed pipe joiner mode validation. Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-14-matthew.d.roper@intel.com
2021-05-14drm/i915/adl_p: Enable/disable loadgen sharingMika Kahola2-0/+9
Disable loadgen sharing for DP link rate 1.62 GHz and HDMI 5.94 GHz. For all other modes, we can enable loadgen sharing feature. BSpec: 55359 Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-13-matthew.d.roper@intel.com
2021-05-14drm/i915: Move intel_modeset_all_pipes()Ville Syrjälä3-38/+39
Move intel_modeset_all_pipes() to a central place so that we can use it elsewhere as well. No functional changes. Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-12-matthew.d.roper@intel.com
2021-05-14drm/i915/adl_p: Enable modular fiaJosé Roberto de Souza2-0/+5
Alderlake P have modular FIA like TGL but it is always modular in all skus, not like TGL that we had to read a register to check if it is monolithic or modular. BSpec: 55480 BSpec: 50572 Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-11-matthew.d.roper@intel.com
2021-05-14drm/i915/display/tc: Rename safe_mode functions ownershipJosé Roberto de Souza1-18/+17
When DP_PHY_MODE_STATUS_NOT_SAFE is set, it means that display has the control over the TC phy. The "not safe" naming is confusing using ownership make it easier to read also future platforms will have a new register that does the same job as DP_PHY_MODE_STATUS_NOT_SAFE but with the onwership name. BSpec: 49294 Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-10-matthew.d.roper@intel.com
2021-05-14drm/i915/adl_p: Add cdclk support for ADL-PAnusha Srivatsa1-13/+28
ADL-P has 3 possible refclk frequencies: 19.2MHz, 24MHz and 38.4MHz While we're at it, remove the drm_WARNs. They've never actually helped us catch any problems, but it's very easy to forget to update them properly for new platforms. BSpec: 55409, 49208 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Clinton Taylor <clinton.a.taylor@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-9-matthew.d.roper@intel.com
2021-05-14drm/i915/adl_p: Extend PLANE_WM bits for blocks & linesMatt Roper1-2/+2
ADL-P further extends the bits in PLANE_WM that represent blocks and lines; we need to extend our masks accordingly. Since these bits are reserved and MBZ on earlier platforms, it's safe to use the larger bitmask on all platforms. Bspec: 50419 Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-8-matthew.d.roper@intel.com
2021-05-14drm/i915/xelpd: Provide port/phy mapping for vbtJosé Roberto de Souza1-1/+17
This will allow proper DDI initialization based on vbt information. Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-7-matthew.d.roper@intel.com
2021-05-14drm/i915: Get slice height before computing rc paramsVandita Kulkarni1-4/+4
We need slice height to calculate few RC parameters hence assign slice height first. Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-6-matthew.d.roper@intel.com
2021-05-14drm/i915/xelpd: Support DP1.4 compression BPPsVandita Kulkarni1-8/+23
Support compression BPPs from bpc to uncompressed BPP -1. So far we have 8,10,12 as valid compressed BPPS now the support is extended. Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-5-matthew.d.roper@intel.com
2021-05-14drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bppVandita Kulkarni1-10/+10
Move the platform specific max bpc calculation into intel_dp_dsc_compute_bpp function Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-4-matthew.d.roper@intel.com
2021-05-14drm/i915/xelpd: Increase maximum watermark lines to 255Matt Roper2-6/+12
XE_LPD continues to use the same "skylake-style" watermark programming as other recent platforms. The only change to the watermark calculations compared to Display12 is that XE_LPD now allows a maximum of 255 lines vs the old limit of 31. Due to the larger possible lines value, the corresponding bits representing the value in PLANE_WM are also extended, so make sure we read/write enough bits. Let's also take this opportunity to switch over to the REG_FIELD notation. Bspec: 49325 Bspec: 50419 Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-3-matthew.d.roper@intel.com
2021-05-14drm/i915/xelpd: Handle new location of outputs D and EMatt Roper5-22/+74
The DDI naming template for display version 12 went A-C, TC1-TC6. With XE_LPD, that naming scheme for DDI's has now changed to A-E, TC1-TC4. The XE_LPD design keeps the register offsets and bitfields relating to the TC outputs in the same location they were previously. The new "D" and "E" outputs now take the locations that were previously used by TC5 and TC6 outputs, or what we would have considered to be outputs "H" and "I" under the legacy lettering scheme. For the most part everything will just work as long as we initialize the output with the proper 'enum port' value. However we do need to take care to pick the correct AUX channel when parsing the VBT (e.g., a reference to 'AUX D' is actually asking us to use the 8th aux channel, not the fourth). We should also make sure that our encoders and aux channels are named appropriately so that it's easier to correlate driver debug messages with the bspec instructions. v2: - Update handling of TGL_TRANS_CLK_SEL_PORT. (Jose) v3: - Add hpd_pin to handle outputs D and E (Jose) - Fixed conversion of BIOS port to aux ch for TC ports (Jose) Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-2-matthew.d.roper@intel.com
2021-05-15Merge tag 'drm-msm-fixes-2021-05-09' of https://gitlab.freedesktop.org/drm/msm into drm-fixesDave Airlie9-18/+47
- dsi regression fix - dma-buf pinning fix - displayport fixes - llc fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGuqLZDAEJwUFKb6m+h3kyxgjDEKa3DPA1fHA69vxbXH=g@mail.gmail.com
2021-05-15Merge tag 'drm-intel-fixes-2021-05-14' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixesDave Airlie6-61/+12
drm/i915 fixes for v5.13-rc2: - Fix active callback alignment annotations and subsequent crashes - Retract link training strategy to slow and wide, again - Avoid division by zero on gen2 - Use correct width reads for C0DRB3/C1DRB3 registers - Fix double free in pdp allocation failure path - Fix HDMI 2.1 PCON downstream caps check Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87a6oxu9ao.fsf@intel.com
2021-05-14drm/vmwgfx: Fix return value check in vmw_setup_pci_resources()Qiheng Lin1-2/+2
In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. After that, the error code -ENOMEM should be returned. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Qiheng Lin <linqiheng@huawei.com> Signed-off-by: Zack Rusin <zackr@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514082812.1697-1-linqiheng@huawei.com
2021-05-14drm/vmwgfx: Fix memory allocation check and a leak of object fifoColin Ian King1-1/+5
The allocation of fifo is lacking an allocation failure check, so fix this by adding one. In the case where fifo->static_buffer fails to be allocated the error return path neglects to kfree the fifo object. Fix this by adding in the missing kfree. Kudos to Dan Carpenter for spotting the missing kzalloc failure check. Addresses-Coverity: ("Resource leak") Fixes: 2cd80dbd3551 ("drm/vmwgfx: Add basic support for SVGA3") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Zack Rusin <zackr@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210514144930.89813-1-colin.king@canonical.com
2021-05-14drm/panfrost: Add mt8183-mali compatible stringNicolas Boichat1-0/+10
Add support for MT8183's G72 Bifrost. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210421132841.v13.4.I5f6b04431828ec9c3e41e65f3337cec6a127480d@changeid
2021-05-14drm/panfrost: devfreq: Disable devfreq when num_supplies > 1Nicolas Boichat1-0/+9
GPUs with more than a single regulator (e.g. G72 on MT8183) will require platform-specific handling for devfreq, for 2 reasons: 1. The opp core (drivers/opp/core.c:_generic_set_opp_regulator) does not support multiple regulators, so we'll need custom handlers. 2. Generally, platforms with 2 regulators have platform-specific constraints on how the voltages should be set (e.g. minimum/maximum voltage difference between them), so we should not just create generic handlers that simply change the voltages without taking care of those constraints. Disable devfreq for now on those GPUs. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210421132841.v13.3.I3af068abe30c9c85cabc4486385c52e56527a509@changeid
2021-05-14drm/i915: Merge fix for "drm: Switch to %p4cc format modifier"Stephen Rothwell1-4/+2
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Fixes: 92f1d09ca4ed ("drm: Switch to %p4cc format modifier") Cc: Sakari Ailus <sakari.ailus@linux.intel.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Link: https://lore.kernel.org/dri-devel/20210514115307.4364aff9@canb.auug.org.au/T/#macc61d4e0b17ca0da2b26aae8fbbcbf47324da13
2021-05-14drm/mediatek: Fix PM reference leak in mtk_crtc_ddp_hw_init()Wang Li1-1/+1
pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to putting operation will result in reference leak here. Fix it by replacing it with pm_runtime_resume_and_get to keep usage counter balanced. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wang Li <wangli74@huawei.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
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