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2020-11-16drm/amdgpu: remove experimental flag from arcturusAlex Deucher1-4/+4
This has been stable for a while. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: update vgh bounding boxYongqiang Sun1-13/+47
[Why & How] Update bounding box as per spread sheet. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Increase sr enter/exit in rn ddr4 watermark tableWyatt Wood1-2/+2
[Why] After removing added latency for HostVM by default, DDR4 sr exit latencies were no longer large enough for some panels and caused underflow. [How] Add 1us to sr enter/exit watermark. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: 3.2.112Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: correct data typeRaymond Yang1-1/+1
[Why] We should use int for counting variable [How] Change type from bool to uint32_t Signed-off-by: Raymond Yang <rayyang@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Expose new CRC window propertyWayne Lin5-9/+201
[Why] Instead of calculating CRC on whole frame, add flexibility to calculate CRC on specific frame region. [How] Add few crc window coordinate properties. By default, CRC is calculated on whole frame unless user space specifies the CRC calculation window. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: [FW Promotion] Release 0.0.42Anthony Koo1-2/+2
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Add dual edp optimization flag.Yongqiang Sun4-1/+6
[Why & How] Add a dual edp power optimization flag, so driver will notify this flag to dmub FW to determine if apply the power optimization. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: set dpp dto as per requested clk for lower case.Yongqiang Sun1-5/+23
[Why] Blue screen when PNP with multiple monitor or hotplug external monitor when playing video due to dpp dto isn't programmed properly. If lower dpp clock, dpp dto need to be programmed first, and actual dpp clk not avalable yet. [How] set dpp dto as per request clk for lower case before dpp clk update, and after dpp clk updated set dpp dto again with actual dpp clk. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Add I2C memory low power supportJacky Liao4-3/+32
[Why] The I2C memory blocks should be powered down when they are not in use. This will reduce power consumption. [How] 1. Write to I2C_LIGHT_SLEEP_FORCE to put memory in light sleep when released 2. Added a debug option to allow this behaviour to be turned off Signed-off-by: Jacky Liao <ziyu.liao@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Detect dynamic backlight support in eDP sinkRoy Chan2-0/+8
[Why] Check if the eDP sink supports the dynamic backlight control [How] Query the dynamic backlight capability in DPCD (eDP case only) Signed-off-by: Roy Chan <roy.chan@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: minor restructuring of pbn calculation functionsWenjing Liu1-4/+10
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: fix cursor calculation for 1xnY rotated display groupsSamson Tam1-5/+57
[Why] Cursor is missing on displays 2 and up when doing rotated display groups in 1xnY setup. Calculation puts cursor out of bounds so it is not enabled. [How] In dcn10_set_cursor_position(), add in viewport.y into cursor calculations for 1xnY rotated display groups. For pipe split, check viewport.y for both pipes and use lower one to normalize cursor position before calculations. Add odm 2:1 support ( using same calculations as pipe split ). Signed-off-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: remove unused dml variablesDmytro Laktyushkin3-5/+0
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Handle Unknown Result for SMU Periodic Retraining on DCN2.1Sung Lee1-1/+2
[WHY & HOW] Currently if VBIOSSMC_Result_UnknownCmd is returned as result of smu msg there is no way to know. Put 1 in param so if 1 is returned, this unknown case is handled. Signed-off-by: Sung Lee <sung.lee@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Populate hostvm parameter before DML calculationSung Lee3-1/+4
[Why] If the system does not have hostvm enabled, disabling it for DML validation will allow more modes to pass at lower voltage levels. [How] When initializing HostVM save state to hubbub and read back when populating DML pipes from context. Signed-off-by: Sung Lee <sung.lee@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Hook up PSR residency command to DSATWyatt Wood4-0/+29
[Why] Use GPINT command to get PSR residency from FW. [How] Hook up PSR residency command to DSAT. Since PSR Count Request is deprecated, we will use this. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Program dpp dto based on actual dpp clkYongqiang Sun1-3/+26
[Why] dpp dto phase and modulo are programmed with actual dpp global clk and pipe clk. Need to use actual dpp clk to prgoram dpp dto modulo to get more accuracy ratio. [How] assign actual dpp clk to dccg for dpp modulo programming. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amdgpu/sriov: reopen sienna_child smu ip block under sriovJane Jian1-1/+1
open smu ip block meets with one-vf mode need Signed-off-by: Jane Jian <Jane.Jian@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amdgpu: update golden setting for sienna_cichlidLikun Gao1-0/+7
Update golden setting for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/pm: update driver if file for sienna cichlidLikun Gao3-28/+12
Update driver if file for sienna cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/pm: enable the fine grain tuning function for vangoghXiaojian Du1-0/+4
This patch is to enale the fine grain tuning function for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/pm: add the fine grain tuning function for vangoghXiaojian Du4-0/+158
This patch is to add the fine grain tuning function for vangogh. This function uses the pp_od_clk_voltage sysfs file to configure the min and max value of gfx clock frequency or restore the default value. Command guide: echo "s level value" > pp_od_clk_voltage "s" - set the sclk frequency "level" - 0 or 1, "0" represents the min value, "1" represents the max value "value" - the target value of sclk frequency, it should be limited in the safe range echo "r" > pp_od_clk_voltage "r" - reset the sclk frequency, restore the default value instantly echo "c" > pp_od_clk_voltage "c" - commit the min and max value of sclk frequency to the system only after the commit command, the setting target values by "s" command will take effect. Example: 1)check the default sclk frequency $ cat pp_od_clk_voltage OD_SCLK: 0: 200Mhz 1: 1400Mhz OD_RANGE: SCLK: 200MHz 1400MHz 2)use "s" -- set command to configure the min or max sclk frequency $ echo "s 0 600" > pp_od_clk_voltage $ echo "s 1 1000" > pp_od_clk_voltage $ echo "c" > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 600Mhz 1: 1000Mhz OD_RANGE: SCLK: 200MHz 1400MHz 3)use "r" -- reset command to restore the min and max sclk frequency $ echo "r" > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 200Mhz 1: 1400Mhz OD_RANGE: SCLK: 200MHz 1400MHz Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amd/display: Update dmub codeBhawanpreet Lakha9-21/+70
There is a delta in the dmub code - add boot options - add boot status - remove unused auto_load_is_done func pointer Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/amdgpu: fix usable gart size calculationNirmoy Das1-9/+4
amdgpu_do_test_moves() is failing because of wrong usable gart size calculation and throwing: [drm:amdgpu_do_test_moves [amdgpu]] *ERROR* 0000000020bdc9f3 bind failed Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-16drm/i915/selftests: Fix wrong return value of perf_request_latency()Zhang Xiaoxu1-1/+3
If intel context create failed, the perf_request_latency() will return 0 rather than error, because we doesn't initialize the return value. Fixes: 25c26f18ea79 ("drm/i915/selftests: Measure dispatch latency") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhang Xiaoxu <zhangxiaoxu5@huawei.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20201116143540.3648870-1-zhangxiaoxu5@huawei.com
2020-11-16drm/i915/selftests: Fix wrong return value of perf_series_engines()Zhang Xiaoxu1-1/+3
If intel context create failed, the perf_series_engines() will return 0 rather than error, because we doesn't initialize the return value. Fixes: cbfd3a0c5a55 ("drm/i915/selftests: Add request throughput measurement to perf") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhang Xiaoxu <zhangxiaoxu5@huawei.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20201116144112.3673011-1-zhangxiaoxu5@huawei.com
2020-11-16drm/i915: Avoid memory leak with more than 16 workarounds on a listTvrtko Ursulin1-1/+3
I forgot to free the old list when growing past 16 entries. Luckily, as much as I checked, none of the current platforms has more than 16 workarounds on a single list. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Fixes: 452420d22d5b ("drm/i915: Fuse per-context workaround handling with the common framework") Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20201113132510.2298483-1-tvrtko.ursulin@linux.intel.com
2020-11-16drm/panfrost: Move the GPU reset bits outside the timeout handlerBoris Brezillon3-64/+130
We've fixed many races in panfrost_job_timedout() but some remain. Instead of trying to fix it again, let's simplify the logic and move the reset bits to a separate work scheduled when one of the queue reports a timeout. v5: - Simplify panfrost_scheduler_stop() (Steven Price) - Always restart the queue in panfrost_scheduler_start() even if the status is corrupted (Steven Price) v4: - Rework the logic to prevent a race between drm_sched_start() (reset work) and drm_sched_job_timedout() (timeout work) - Drop Steven's R-b - Add dma_fence annotation to the panfrost_reset() function (Daniel Vetter) v3: - Replace the atomic_cmpxchg() by an atomic_xchg() (Robin Murphy) - Add Steven's R-b v2: - Use atomic_cmpxchg() to conditionally schedule the reset work (Steven Price) Fixes: 1a11a88cfd9a ("drm/panfrost: Fix job timeout handling") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201105151704.2010667-1-boris.brezillon@collabora.com
2020-11-16drm: fix oops in drm_atomic_set_crtc_for_connectorSimon Ser1-2/+2
crtc can be NULL. connector, extracted from conn_state, can't. Fixes: e3aae683e861 ("drm: convert drm_atomic_uapi.c to new debug helpers") Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/7xhyNYrWtzUIt3HNrWfi9iScW0k475RZiKNfF5TbPs@cp4-web-031.plabs.ch
2020-11-16drm/virtio: Make virtgpu_dmabuf_ops with static keywordZou Wei1-1/+1
Fix the following sparse warning: ./virtgpu_prime.c:46:33: warning: symbol 'virtgpu_dmabuf_ops' was not declared. Should it be static? Signed-off-by: Zou Wei <zou_wei@huawei.com> Link: http://patchwork.freedesktop.org/patch/msgid/1605338173-22100-1-git-send-email-zou_wei@huawei.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-15drm/i915: Pimp the watermark documentation a bitVille Syrjälä1-23/+25
Document what each of the "raw" vs. "optimal" vs. "intermediate" watermarks do. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201106173042.7534-4-ville.syrjala@linux.intel.com
2020-11-15drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm codeVille Syrjälä2-16/+27
intel_atomic_crtc_state_for_each_plane_state() peeks at the plane's current state without holding the plane's mutex, trusting that the crtc's mutex will protect it. In practice that does work since our planes can't move between pipes, but it sets a bad example. intel_atomic_crtc_state_for_each_plane_state() also relies on crtc_state.uapi.plane_mask which may be full of lies when it comes to the bigjoiner stuff, so soon we can't use it as is anyway. So best to just get rid of it entirely. Which we can easily do by switching to the g4x/vlv "raw" watermark approach. Later on we should even be able to move the "raw" watermark computation into the normal .plane_check() code, leaving only the merging/clamping of the final watermarks to the later stages. But that will require adjusting the ilk+ wm code similarly as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201106173042.7534-3-ville.syrjala@linux.intel.com
2020-11-15drm/i915: Pass intel_atomic_state aroundVille Syrjälä1-11/+13
Pass the whole intel_atomic_state to skl_build_pipe_wm() and skl_allocate_pipe_ddb() so we can start to iterate stuff containerd in the commit. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201106173042.7534-2-ville.syrjala@linux.intel.com
2020-11-15drm/i915/dp: Add from_crtc_state to copy color blobsManasi Navare3-6/+10
No functional changes here, just adds a from_crtc_state as a prep for bigjoiner v2: * More prep with intel_atomic_state (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201113155656.17630-2-manasi.d.navare@intel.com
2020-11-15drm/i915: Pass intel_atomic_state instead of drm_atomic_stateManasi Navare1-14/+18
No functional changes, to align with previous cleanups pass intel_atomic_state instead of drm_atomic_state. Also pass this intel_atomic_state with crtc_state to some of the atomic_check functions. v2: * Squash some changes from next patch (Ville) Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201113155656.17630-1-manasi.d.navare@intel.com
2020-11-16drm/lima: Unconditionally call dev_pm_opp_of_remove_table()Viresh Kumar2-6/+1
dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. Reviewed-by: Qiang Yu <yuq825@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/c995335d16d8b4b4ff47b1273869c33e14782b32.1603867405.git.viresh.kumar@linaro.org
2020-11-16drm/lima/lima_sched: Remove unused and unnecessary variable 'ret'Lee Jones1-2/+1
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/lima/lima_sched.c: In function ‘lima_sched_run_job’: drivers/gpu/drm/lima/lima_sched.c:227:20: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Cc: Qiang Yu <yuq825@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: "Christian König" <christian.koenig@amd.com> Cc: dri-devel@lists.freedesktop.org Cc: lima@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201113134938.4004947-24-lee.jones@linaro.org
2020-11-16drm/lima/lima_drv: Demote kernel-doc formatting abuseLee Jones1-1/+1
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/lima/lima_drv.c:264: warning: cannot understand function prototype: 'const struct drm_driver lima_drm_driver = ' Cc: Qiang Yu <yuq825@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Cc: lima@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201113134938.4004947-16-lee.jones@linaro.org
2020-11-16drm/lima: simplify the return expression of lima_devfreq_targetLiu Shixin1-6/+1
Simplify the return expression. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200919100850.1639111-1-liushixin2@huawei.com
2020-11-16drm/panel: s6e63m0: Set up some display infoLinus Walleij1-0/+9
Copy over the width/height in millimeters to the (somewhat redundant) display info, and set up the bus format and bus flags for the display. When used as DPI this display requires DE to be active low and pixel data to be output on the negative edge. It might be that it was previously used with a display controller that either does not support these settings or was hardcoded to use these as default. This information comes from the source code of the Samsung GT-I9070 mobile phone. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-6-linus.walleij@linaro.org
2020-11-16drm/panel: s6e63m0: Support 3WIRE protocolLinus Walleij1-1/+2
The panel can be connected using 3WIRE, then it is however necessary that the flag SPI_3WIRE is preserved on the device, as we set this from generic device tree parsing code (or similar). Just |= the SPI mode. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-5-linus.walleij@linaro.org
2020-11-16drm/panel: s6e63m0: Add some explanationsLinus Walleij1-0/+7
The SPI DCS code was a bit hard to understand as the device accepts 9-bit transfers packed into 16-bit words with the most significant bit in bit 9 of the 16-bit word. Add some clarifying comments. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-4-linus.walleij@linaro.org
2020-11-16drm/panel: s6e63m0: Implement reading from panelLinus Walleij1-6/+13
This code was found in the Samsung vendor tree for the Samsung GT-I9070 mobile phone. Let's support reading before we implement the 3WIRE protocol for both reading and writing. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-3-linus.walleij@linaro.org
2020-11-16drm/panel: s6e63m0: Simplify SPI writingLinus Walleij1-9/+2
This writing code is equivalent to the spi_write() helper in the SPI framework. Insert a comment that this will always work fine since SPI buffers are in native endianness. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-2-linus.walleij@linaro.org
2020-11-16Merge branch 'linux-5.11' of git://github.com/skeggsb/linux into drm-nextDave Airlie1-5/+1
-next fix for type stuff. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv5vuM54oU1Yp8sX5ZVmJAv+-oQRQj-AeaKFb3qs1EtP-g@mail.gmail.com
2020-11-16Merge branch 'linux-5.10' of git://github.com/skeggsb/linux into drm-fixesDave Airlie3-22/+24
- atomic modesetting regression fix - ttm pre-nv50 fix - connector NULL ptr deref fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv5D9p78MNN0OxVeRZxN8LDqcadJEGUEFCgWJQ6+_rjPuw@mail.gmail.com
2020-11-15drm/gma500: Remove 2D accel codePatrik Jakobsson8-319/+1
2D acceleration is only available on PSB and MRST and very slow on both platforms. CPU acceleration is faster so don't bother with 2D accel anymore. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201115175420.32167-1-patrik.r.jakobsson@gmail.com
2020-11-15drm/gma500: Remove GTT roll supportPatrik Jakobsson3-135/+12
GTT roll support was used to accelerate fb panning on some machines. Unfortunately this never worked properly with multiple monitors and caused issues on others where the framebuffer wouldn't fit in stolen memory. Let's remove it! Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20201028143608.1284-1-patrik.r.jakobsson@gmail.com
2020-11-14drm/panel/samsung-sofef00: Add panel for OnePlus 6/T devicesCaleb Connolly3-0/+364
The OnePlus 6/T devices use different panels however they are functionally identical with the only differences being the resolution. The panels also don't seem to be used by any other devices, just combine them into one driver. The panels are: samsung,sofef00 and samsung,s6e3fc2x01 Signed-off-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> [fixed checkpatch warnings] Link: https://patchwork.freedesktop.org/patch/msgid/20201112161920.2671430-2-caleb@connolly.tech
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