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2020-07-05drm/mediatek: mtk_dsi: Use the drm_panel_bridge APIEnric Balletbo i Serra1-159/+14
Replace the manual panel handling code by a drm_panel_bridge. This simplifies the driver and allows all components in the display pipeline to be treated as bridges, paving the way to generic connector handling. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: mtk_dsi: Use simple encoderEnric Balletbo i Serra1-11/+2
The mtk_dsi driver uses an empty implementation for its encoder. Replace the code with the generic simple encoder. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: mtk_dsi: Convert to bridge driverEnric Balletbo i Serra1-38/+79
Convert mtk_dsi to a bridge driver with built-in encoder support for compatibility with existing component drivers. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: mtk_dsi: Rename bridge to next_bridgeEnric Balletbo i Serra1-5/+6
This is really a cosmetic change just to make a bit more readable the code after convert the driver to drm_bridge. The bridge variable name will be used by the encoder drm_bridge, and the chained bridge will be named next_bridge. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: mtk_hdmi: Remove debug messages for function callsEnric Balletbo i Serra2-15/+1
Equivalent information can be nowadays obtained using function tracer Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: mtk_mt8173_hdmi_phy: Remove unnused const variablesEnric Balletbo i Serra1-48/+0
There are some `static const u8` variables that are not used, this triggers a warning building with `make W=1`, it is safe to remove them, so do it and make the compiler more happy. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: Delete not used of_device_get_match_dataMatthias Brugger1-1/+0
The driver will be loaded by via a platform device. So we will need to get the device_node from the parent device. Depending on this we will set the driver data. As all this is done later already, just delete the call to of_device_get_match_data. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-05drm/mediatek: Remove unnecessary conversion to boolBernard Zhao1-4/+1
In function mtk_dsi_clk_hs_state, remove unnecessary conversion to bool return, this change is to make the code a bit readable. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-07-03drm/i915: Export ppgtt_bind_vmaChris Wilson8-60/+58
Reuse the ppgtt_bind_vma() for aliasing_ppgtt_bind_vma() so we can reduce some code near-duplication. The catch is that we need to then pass along the i915_address_space and not rely on vma->vm, as they differ with the aliasing-ppgtt. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703102519.26539-1-chris@chris-wilson.co.uk
2020-07-03drm/i915/fbc: Allow FBC to recompress after a 3D workload on i85x/i865Ville Syrjälä2-0/+11
Normally i85x/i865 3D activity will block FBC until a 2D blit occurs. I suppose this was meant to avoid recompression while 3D activity is still going on but the frame hasn't yet been presented. Unfortunately that also means that a page flipped 3D workload will permanently block FBC even if it only renders a single frame and then does nothing. Since we are using software render tracking anyway we might as well flip the chicken bit so that 3D does not block FBC. This will avoid the permament FBC blockage in the aforemention use case, but thanks to the software tracking the compressor will not disturb 3D rendering activity. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702153723.24327-5-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-07-03drm/i915/fbc: Enable fbc on i865Ville Syrjälä2-1/+3
Unlike all the other pre-snb desktop platforms i865 actually supports FBC. Let's enable it. Quote from the spec: "DevSDG provides the same Run-Length Encoded Frame Buffer Compression (RLEFBC) function as exists in DevMGM." As i865 only has the one pipe we want to skip massaging the plane<->pipe assignment aimed at getting FBC+LVDS working on the mobile platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702153723.24327-4-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-07-03drm/i915/fbc: Fix nuke for pre-snb platformsVille Syrjälä1-1/+33
The MSG_FBC_REND_STATE register only exists on snb+. For older platforms (would also work for snb+) we can simply rewite DSPSURF to trigger a flip nuke. While generally RMW is considered harmful we'll use it here for simplicity. And since FBC doesn't exist in i830 we don't have to worry about the DSPSURF double buffering hardware fails present on that platform. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702153723.24327-3-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-07-03drm/i915/fbc: Use the correct plane strideVille Syrjälä1-6/+10
Consult the actual plane stride instead of the fb stride. The two will disagree when we remap the gtt. The plane stride is what the hw will be fed so that's what we should look at for the FBC retrictions/cfb allocation. Since we no longer require a fence we are going to attempt using FBC with remapping, and so we should look at correct stride. With 90/270 degree rotation the plane stride is stored in units of pixels, so we need to conver it to bytes for the purposes of calculating the cfb stride. Not entirely sure if this matches the hw behaviour though. Need to reverse engineer that at some point... We also need to reorder the pixel format check vs. stride check to avoid triggering a spurious WARN(stride & 63) with cpp==1 and plane stride==32. v2: Try to deal with rotated stride and related WARN Cc: José Roberto de Souza <jose.souza@intel.com> Fixes: 691f7ba58d52 ("drm/i915/display/fbc: Make fences a nice-to-have for GEN9+") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702153723.24327-2-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-07-03drm/i915/tgl: Clamp min_cdclk to max_cdclk_freq to unblock 8KStanislav Lisovskiy1-2/+9
We still need "Bump up CDCLK" workaround otherwise getting underruns - however currently it blocks 8K as CDCLK = Pixel rate, in 8K case would require CDCLK to be around 1 Ghz which is not possible. v2: - Convert to expression(max(min_cdclk, min(pixel_rate, max_cdclk)) (Ville Syrjälä) - Use type specific min_t, max_t(Ville Syrjälä) Fixes: 46d53e271cea ("Revert "drm/i915: Remove unneeded hack now for CDCLK"") Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702091526.10096-1-stanislav.lisovskiy@intel.com
2020-07-03drm/i915/guc: Expand guc_info debugfs with more informationMichał Winiarski1-7/+16
The information about platform/driver/user view of GuC firmware usage currently requires user to either go through kernel log or parse the combination of "enable_guc" modparam and various debugfs entries. Let's keep things simple and add a "supported/used/wanted" matrix (already used internally by i915) in guc_info debugfs. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Lukasz Fiedorowicz <lukasz.fiedorowicz@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Lukasz Fiedorowicz <lukasz.fiedorowicz@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200701142752.419878-1-michal@hardline.pl
2020-07-03drm/i915: do not read swizzle info if unavailableLucas De Marchi1-5/+9
Since gen8 we don't use swizzle anymore. Don't dump registers related to it: registers may or may not be there. v2: pull the rest of driver state reporting before the read out (Chris) Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200702200714.1278-1-lucas.demarchi@intel.com
2020-07-03drm/i915/gem: Split the context's obj:vma lut into its own mutexChris Wilson5-13/+26
Rather than reuse the common ctx->mutex for locking the execbuffer LUT, split it into its own lock to avoid being taken [as part of ctx->mutex] at inappropriate times. In particular to avoid the inversion from taking the timeline->mutex for the whole execbuf submission in the next patch. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703004306.11117-1-chris@chris-wilson.co.uk
2020-07-03drm/meson: crtc: handle commit of Amlogic FBC framesNeil Armstrong1-30/+88
Since the VD1 Amlogic FBC decoder is now configured by the overlay driver, commit the right registers to decode the Amlogic FBC frame. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-7-narmstrong@baylibre.com
2020-07-03drm/meson: overlay: setup overlay for Amlogic FBC Scatter Memory layoutNeil Armstrong1-15/+32
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use read the FBC header as Scatter Memory layout reference. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-6-narmstrong@baylibre.com
2020-07-03drm/meson: overlay: setup overlay for Amlogic FBC Memory Saving modeNeil Armstrong1-2/+23
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use a different superblock size for the Memory Saving mode. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-5-narmstrong@baylibre.com
2020-07-03drm/meson: overlay: setup overlay for Amlogic FBCNeil Armstrong2-8/+259
Setup the Amlogic FBC decoder for the VD1 video overlay plane. The VD1 Amlogic FBC decoder is integrated in the pipeline like the YUV pixel reading/formatter but used a direct memory address instead. This adds support for the basic layout, and needs to calculate the content body size since the header is allocated after. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-4-narmstrong@baylibre.com
2020-07-03drm/meson: add Amlogic Video FBC registersNeil Armstrong1-0/+22
Add the registers of the VPU VD1 Amlogic FBC decoder module, and routing register. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200703080728.25207-3-narmstrong@baylibre.com
2020-07-03Merge tag 'drm-intel-next-2020-07-02' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie146-3337/+6015
drm/i915 features for v5.9 Highlights: - Rocket Lake (RKL) platform enabling (Matt Roper, Lucas, José, Aditya) Gem/GT: - Numerous selftest fixes and improvements (Chris) - TGL, RKL, EHL workaround updates (Matts Atwood and Roper, Clint, Swathi Dhanavanthri, Chris) - Retry faulthandlers on ENOSPC to avoid oomkiller (Chris) - Numerous refactorings and cleanups (Chris) - Several GT fixes around init/suspend/resume/shutdown (Chris) - Whitelist CTX_TIMESTAMP register on non-RCS (Chris) - Track if an engine requires forcewake w/a (Chris) - Locking improvements (Chris) - Timeslicing improvements (Chris) - Add a safety submission flush in the heartbeat (Chris) - Flush gen3 relocs harder (Chris) - Discard a misplaced GGTT vma (Chris) - Reduce relocation paths to async GPU relocations only (Chris) - It's all build up with no pay off (Chris' own words...) Display: - A plethora of DP MST fixes (Imre) - Implement proper dbuf global state (Ville) - Consider dbuf bandwidth when calculating CDCLK (Stan) - FBC fixes and refactoring (Ville) - PSR fixes and improvements (José, Gwan-gyeong) - Cursor size fixes (Ville) - Overlay color and gamma fixes (Ville) - Fix and improve FSB and HRAWCLK read out (Ville) - Pre allocate and late cleanup of DSB cmd buffer (Animesh) - Stop using mode->private_flags (Ville) - Add plane color encoding support for YCBCR_BT2020 (Kishore Kadiyala) - Update TGL Type-C DP and DKL HBR and HBR+ vswing tables (José) - Fix DSI connector init error path (Vivek) - A plethora of DP vswing/preemph fixes and refactoring (Ville) - Fix TGL DKL vswing sequence selection (Vandita) - Fix ICL hotplug interrupt disabling after storm detection (Imre) - Retry HDCP link integrity check on failure (Oliver Barta) - Fix TBT DPLL fractional divider (Imre) - Fix ICL+ HBR3 source rate (Matt Atwood) - Fix gen2 spurious underruns (Ville) - Fix potential NULL dereference, some spelling fixes (Colin Ian King) - Fix NULL dereference on encoder state probe (Chris) Other: - Backmerge to get mmap locking API (Jani) - Distinguish Comet Lake from Coffee Lake (Chris) - Various compiler warning fixes (Arnd Bergmann, Nathan Chancellor) - WARN* conversions to drm_WARN* (Pankaj) - Switch to device specific parameters with debugfs access (Jani) - Fix agp/intel error path leak (Qiushi Wu) - Forcewake power optimization (Chris) - Irq handler optimization (Chris) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87wo3lkbxt.fsf@intel.com
2020-07-03Merge tag 'drm-misc-fixes-2020-07-02' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixesDave Airlie1-3/+2
* dma-buf: fix a use-after-free bug * sun4i: remove HPD polling Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20200702075143.GA25040@linux-uq9g
2020-07-02drm/i915: Also drop vm.ref along error paths for vma constructionChris Wilson1-10/+6
Not only do we need to release the vm.ref we acquired for the vma on the duplicate insert branch, but also for the normal error paths, so roll them all into one. Reported-by: Andi Shyti <andi.shyti@intel.com> Suggested-by: Andi Shyti <andi.shyti@intel.com> Fixes: 2850748ef876 ("drm/i915: Pull i915_vma_pin under the vm->mutex") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Andi Shyti <andi.shyti@intel.com> Cc: <stable@vger.kernel.org> # v5.5+ Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702211015.29604-1-chris@chris-wilson.co.uk
2020-07-02drm/i915/gem: Drop forced struct_mutex from shrinker_taints_mutexChris Wilson1-11/+0
Since we no longer always take struct_mutex around everything, and want the freedom to create GEM objects, actually taking struct_mutex inside the lock creation ends up pulling the mutex inside other looks. Since we don't use generally use struct_mutex, we can relax the tainting. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702083225.20044-3-chris@chris-wilson.co.uk
2020-07-02drm/i915/gem: Only revoke mmap handlers if activeChris Wilson3-28/+24
Avoid waking up the device and taking stale locks if we know that the object is not currently mmapped. This is particularly useful as not many object are actually mmapped and so we can destroy them without waking the device up, and gives us a little more freedom of workqueue ordering during shutdown. v2: Pull the release_mmap() into its single user in freeing the objects, where there can not be any race with a concurrent user of the freed object. Or so one hopes! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>, Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>, Link: https://patchwork.freedesktop.org/patch/msgid/20200702163623.6402-2-chris@chris-wilson.co.uk
2020-07-02drm/i915/gem: Only revoke the GGTT mmappings on aperture detiling changesChris Wilson3-3/+6
Only a GGTT mmapping will use the aperture detiling registers, so on a tiling change for an object, we only need to revoke those mmappings and not the CPU mmappings (which are always linear irrespective of the tiling). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702163623.6402-1-chris@chris-wilson.co.uk
2020-07-02drm/i915/display: prefer dig_port to reference intel_digital_portLucas De Marchi18-536/+533
We have a mix of dport, intel_dport, intel_dig_port and dig_port to reference a intel_digital_port struct. Numbers are around 5 intel_dport 36 dport 479 intel_dig_port 352 dig_port Since we already removed the intel_ prefix from most of our other structs, do the same here and prefer dig_port. v2: rename everything in i915, not just a few display sources and reword commit message (from Matt Roper) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200701045054.23357-1-lucas.demarchi@intel.com
2020-07-02drm/vmwgfx: Use __drm_atomic_helper_crtc_resetDaniel Vetter1-2/+1
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. v2: Compile fix. Oops. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: VMware Graphics <linux-graphics-maintainer@vmware.com> Cc: Roland Scheidegger <sroland@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200612204940.2134653-1-daniel.vetter@ffwll.ch Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-7-daniel.vetter@ffwll.ch
2020-07-02drm/vc4: Use __drm_atomic_helper_crtc_resetDaniel Vetter1-2/+1
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. Reviewed-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-5-daniel.vetter@ffwll.ch
2020-07-02drm/mtk: Use __drm_atomic_helper_crtc_resetDaniel Vetter1-10/+6
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-4-daniel.vetter@ffwll.ch
2020-07-02drm/imx: Use __drm_atomic_helper_crtc_resetDaniel Vetter1-12/+7
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-3-daniel.vetter@ffwll.ch
2020-07-02drm/amdgpu: Use __drm_atomic_helper_crtc_resetDaniel Vetter1-3/+1
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Mikita Lipski <mikita.lipski@amd.com> Cc: Stylon Wang <stylon.wang@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-2-daniel.vetter@ffwll.ch
2020-07-02drm/atomic-helper: reset vblank on crtc resetDaniel Vetter11-33/+15
Only when vblanks are supported ofc. Some drivers do this already, but most unfortunately missed it. This opens up bugs after driver load, before the crtc is enabled for the first time. syzbot spotted this when loading vkms as a secondary output. Given how many drivers are buggy it's best to solve this once and for all in shared helper code. Aside from moving the few existing calls to drm_crtc_vblank_reset into helpers (i915 doesn't use helpers, so keeps its own) I think the regression risk is minimal: atomic helpers already rely on drivers calling drm_crtc_vblank_on/off correctly in their hooks when they support vblanks. And driver that's failing to handle vblanks after this is missing those calls already, and vblanks could only work by accident when enabling a CRTC for the first time right after boot. Big thanks to Tetsuo for helping track down what's going wrong here. There's only a few drivers which already had the necessary call and needed some updating: - komeda, atmel and tidss also needed to be changed to call __drm_atomic_helper_crtc_reset() intead of open coding it - tegra and msm even had it in the same place already, just code motion, and malidp already uses __drm_atomic_helper_crtc_reset(). - Laurent noticed that rcar-du and omap open-code their crtc reset and hence would actually be broken by this patch now. So fix them up by reusing the helpers, which brings the drm_crtc_vblank_reset() back. Only call left is in i915, which doesn't use drm_mode_config_reset, but has its own fastboot infrastructure. So that's the only case where we actually want this in the driver still. I've also reviewed all other drivers which set up vblank support with drm_vblank_init. After the previous patch fixing mxsfb all atomic drivers do call drm_crtc_vblank_on/off as they should, the remaining drivers are either legacy kms or legacy dri1 drivers, so not affected by this change to atomic helpers. v2: Use the drm_dev_has_vblank() helper. v3: Laurent pointed out that omap and rcar-du used drm_crtc_vblank_off instead of drm_crtc_vblank_reset. Adjust them too. v4: Laurent noticed that rcar-du and omap open-code their crtc reset and hence would actually be broken by this patch now. So fix them up by reusing the helpers, which brings the drm_crtc_vblank_reset() back. v5: also mention rcar-du and ompadrm in the proper commit message above (Laurent). Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Maxime Ripard <mripard@kernel.org> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://syzkaller.appspot.com/bug?id=0ba17d70d062b2595e1f061231474800f076c7cb Reported-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Reported-by: syzbot+0871b14ca2e2fb64f6e3@syzkaller.appspotmail.com Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: "James (Qian) Wang" <james.qian.wang@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mihail Atanassov <mihail.atanassov@arm.com> Cc: Brian Starkey <brian.starkey@arm.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Brian Masney <masneyb@onstation.org> Cc: Emil Velikov <emil.velikov@collabora.com> Cc: zhengbin <zhengbin13@huawei.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-tegra@vger.kernel.org Cc: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-1-daniel.vetter@ffwll.ch
2020-07-02drm/i915: Update DRIVER_DATE to 20200702Jani Nikula1-2/+2
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2020-07-02drm/amd/display: remove redundant initialization of variable resultColin Ian King1-2/+3
The variable result is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: use %u rather than %d for sclk/mclkAlex Deucher1-2/+2
Large clock values may overflow and show up as negative. Reported by prOMiNd on IRC. Acked-by: Nirmoy Das <nirmoy.das@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu/atomfirmware: update vram info handling for renoirAlex Deucher1-1/+10
Add support for integrated_system_info table v12. Use the actual v12 structure. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu/atomfirmware: update to latest integratedinfotableAlex Deucher1-0/+78
Used for renoir. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu/atomfirmware: fix vram_info fetching for renoirAlex Deucher1-0/+1
Renoir uses integrated_system_info table v12. The table has the same layout as v11 with respect to this data. Just reuse the existing code for v12 for stable. Fixes incorrectly reported vram info in the driver output. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/powerplay: fix compile error with ARCH=arcEvan Quan1-1/+2
Fix the compile error below: drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c: In function 'smu_v11_0_init_microcode': >> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of function 'pr_warn'; did you mean 'pci_warn'? [-Werror=implicit-function-declaration] 22 | pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ | ^~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:176:3: note: in expansion of macro 'BUG' 176 | BUG(); Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Only revalidate bandwidth on medium and fast updatesNicholas Kazlauskas1-4/+6
[Why] Changes that are fast don't require updating DLG parameters making this call unnecessary. Considering this is an expensive call it should not be done on every flip. DML touches clocks, p-state support, DLG params and a few other DC internal flags and these aren't expected during fast. A hang has been reported with this change when called on every flip which suggests that modifying these fields is not recommended behavior on fast updates. [How] Guard the validation to only happen if update type isn't FAST. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1191 Fixes: a24eaa5c51255b ("drm/amd/display: Revalidate bandwidth before commiting DC updates") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Create plane rotation propertyPierre-Loup A. Griffais1-0/+8
It's otherwise properly supported, just needs exposing to userspace. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Pierre-Loup A. Griffais <pgriffais@valvesoftware.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdkfd: Add Arcturus GWS support and fix VG10Joseph Greathouse1-2/+6
Add support for GWS in Arcturus, which needs MEC2 firmware #48 or above. Fix the MEC2 version check for Vega 10 GWS support, since Vega 10 firmware adds 0x8000 to the actual firmware revision. We were previously declaring support where it did not exist. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02Revert "drm/amdgpu: support access regs outside of mmio bar"Hawking Zhang3-29/+39
This reverts commit 2eee0229f65e897134566888e5321bcb3af0df7a. Fallback to a stable base until we have a correct new one Signed-off-by:Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: make IB test synchronize with init for SRIOV(v2)Monk Liu1-0/+3
issue: originally we kickoff IB test asynchronously with driver's init, thus the IB test may still running when the driver loading done (modprobe amdgpu done). if we shutdown VM immediately after amdgpu driver loaded then GPU may hang because the IB test is still running fix: flush the delayed_init routine at the bottom of device_init to avoid driver loading done prior to the IB test completes Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdkfd: Update hardware scheduling time quantaJoseph Greathouse5-5/+5
Update PROCESS_QUANTUM, the time the hardware scheduler allows processes to run before switching to other processes when it becomes over-subscribed. Increase this to 10ms, to allow processes to better amortize their task switch times. Update HQD Quantum, the amount of time that an active queue stays attached to the CP before we forcibly switch it for another active queue for fairness. Setting these so that HQD < PROCESS makes it easier to ensure that we get fairness when we have multiple active queues on the device. Otherwise we may start process-swapping before we get to all the queues in a CP. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Enable 4 to 1 mpc combine for max detile useDmytro Laktyushkin1-8/+16
In case of certain display configurations we want to allow max detile buffer utilization by using 4 to 1 mpc combine Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: 3.2.92Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>