aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu
AgeCommit message (Collapse)AuthorFilesLines
2020-07-02drm/amd/display: Add register key and status for edidJing Zhou2-0/+2
[Why] Register key for AE or QA do regression test. New edid status for check. [How] Add register key edid_read_retry_times. Add new edid status EDID_FALL_BACK. Signed-off-by: Jing Zhou <Jing.Zhou@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: [FW Promotion] Release 1.0.22Anthony Koo1-2/+7
[Header Changes] - Add command for notification of active streams to DMUB Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Fix incorrect rounding for 10Hz refresh rangeJaehyun Chung2-32/+10
[Why] In cases where refresh range is slightly below 10, FreeSync is not active or supported. Need to round values before checking refresh range in order to have FreeSync supported in these cases. [How] Remove redundant values and round values before checking valid refresh range. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: [FW Promotion] Release 1.0.21Anthony Koo1-2/+2
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: check dpcd read status of DP_DOWNSTREAM_PORT_0jinlong zhang1-49/+50
[Why] For special DP convert VGA dongle, core_link_read_dpcd for DP_DOWNSTREAM_PORT_0 always return fail, then dongle_type will be set to DISPLAY_DONGLE_NONE, which will cause desktop resolution abnormal. [How] If dpcd for DP_DOWNSTREAM_PORT_0 read fail, skip set dongle_type = DISPLAY_DONGLE_NONE. Signed-off-by: jinlong zhang <jinlong.zhang@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Handle SMU msg responseYongqiang Sun2-4/+75
[Why] SMU may return error code to driver, but driver only check if response is OK. [How] Check SMU response instead of reg_wait, assert in case of reponse isn't OK. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: [FW Promotion] Release 1.0.20Anthony Koo1-2/+2
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Preserve gpu memory allocation for life of dcJoshua Aberback3-12/+14
[Why] We want to keep the same buffer allocated for use during multiple hardware initializations. [How] - allocate gpu memory buffer on clock manager construct - free gpu memory buffer on clock manager destruct Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/display: Initialize psr debug flags to 0Wyatt Wood1-0/+1
[Why] Debug flags are not set by default. [How] Set debug flags to 0 Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: correct discovery_tmr_size init valWenhui Sheng1-1/+1
The legacy way to initialize discovery_tmr_size is using DISCOVERY_TMR_SIZE, while after we reduce DISCOVERY_TMR_SIZE from 64KB to 4KB, variable discovery_tmr_size is also reduced to 4KB, this is not correct, it still should be 64KB, discovery_tmr_size will be used to calculate ip_discovery reserved mem's start address and size. Using DISCOVERY_TMR_OFFSET to init discovery_tmr_size instead. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/powerplay: drop unnecessary "@" on OD sysfs outputEvan Quan1-1/+1
To follow conventional style. And this unnecessary "@" confuses our userspace tool. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/powerplay: update driver if file for sienna_cichlidLikun Gao3-11/+10
Update sienna_cichlid driver if header file to match pptable changes. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amd/powerplay: change method to set board parametersLikun Gao1-87/+2
Copy board parameters directly instead of set each parameter for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: reduce ip discovery data reading sizeWenhui Sheng2-2/+3
Only read first 4K data instead of whole TMR block, so we can reduce the time in full access mode. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: merge atombios init blockWenhui Sheng1-22/+1
After we move request full access before set ip blocks, we can merge atombios init block of SRIOV and baremetal together. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: invoke req full access early enoughWenhui Sheng1-31/+23
From SIENNA_CICHLID, HW introduce a new protection feature which can control the FB, doorbell and MMIO write access for VF, so guest driver should request full access before ip discovery, or we couldn't access ip discovery data in FB. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: move reg base init forward for soc15Wenhui Sheng1-7/+22
Init soc15 reg base early enough so we can touch mailbox related registers in request full access for sriov before set_ip_blocks, vi&nv arch doesn't use reg base in virt ops. v2: fix reg_base_init missed in bare metal case. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: request init data in virt detectionWenhui Sheng7-12/+46
Move request init data to virt detection func, so we can insert request full access between request init data and set ip blocks. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: Let KFD use more VMIDs on ArcturusFelix Kuehling1-3/+8
When there is no graphics support, KFD can use more of the VMIDs. Graphics VMIDs are only used for video decoding/encoding and post processing. With two VCE engines, there is no reason to reserve more than 2 VMIDs for that. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: Clean up KFD VMID assignmentFelix Kuehling16-43/+22
The KFD VMID assignment was hard-coded in a few places. Consolidate that in a single variable adev->vm_manager.first_kfd_vmid. The value is still assigned in gmc-ip-version-specific code. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: SI support for UVD and VCE power managmentAlex Jivin2-17/+67
Port functionality from the Radeon driver to support UVD and VCE power management. Signed-off-by: Alex Jivin <alex.jivin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: SI support for VCE clock controlAlex Jivin3-1/+167
Port functionality from the Radeon driver to support VCE clock control. Signed-off-by: Alex Jivin <alex.jivin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm/amdgpu: SI support for UVD clock controlAlex Jivin2-6/+229
Port functionality from the Radeon driver to support UVD clock control. Signed-off-by: Alex Jivin <alex.jivin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-02drm : Insert blank lines after declarations.Suraj Upadhyay20-0/+74
Resolve checkpatch issues for missing blank lines after declarations. Issues found in multiple files with checkpatch.pl. Signed-off-by: Suraj Upadhyay <usuraj35@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200702131749.GA25710@blackclown
2020-07-02drm/i915: Drop vm.ref for duplicate vma on constructionChris Wilson1-0/+1
As we allow for parallel threads to create the same vma instance concurrently, and we only filter out the duplicates upon reacquiring the spinlock for the rbtree, we have to free the loser of the constructors' race. When freeing, we should also drop any resource references acquired for the redundant vma. Fixes: 2850748ef876 ("drm/i915: Pull i915_vma_pin under the vm->mutex") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: <stable@vger.kernel.org> # v5.5+ Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702083225.20044-1-chris@chris-wilson.co.uk
2020-07-02drm/i915/gt: Move the heartbeat into the high priority system wqChris Wilson1-1/+1
As we ensure that the heartbeat is reasonably fast (and should not block), move the heartbeat work into the system_highpri_wq to avoid having this essential task be blocked behind other slow work, such as our own retire_work_handler. References: https://gitlab.freedesktop.org/drm/intel/-/issues/2119 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702095219.963-2-chris@chris-wilson.co.uk
2020-07-02drm/i915/gt: Harden the heartbeat against a stuck driverChris Wilson2-2/+13
If the driver gets stuck holding the kernel timeline, we cannot issue a heartbeat and so fail to discover that the driver is indeed stuck and do not issue a GPU reset (which would hopefully unstick the driver!). Switch to using a trylock so that we can query if the heartbeat's timeline mutex is locked elsewhere, and then use the timer to probe if it remains stuck at the same spot for consecutive heartbeats, indicating that the mutex has not been released and the engine has not progressed. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200702095219.963-1-chris@chris-wilson.co.uk
2020-07-02drm/meson: viu: fix setting the OSD burst length in VIU_OSD1_FIFO_CTRL_STATMartin Blumenstingl2-9/+8
The burst length is configured in VIU_OSD1_FIFO_CTRL_STAT[31] and VIU_OSD1_FIFO_CTRL_STAT[11:10]. The public S905D3 datasheet describes this as: - 0x0 = up to 24 per burst - 0x1 = up to 32 per burst - 0x2 = up to 48 per burst - 0x3 = up to 64 per burst - 0x4 = up to 96 per burst - 0x5 = up to 128 per burst The lower two bits map to VIU_OSD1_FIFO_CTRL_STAT[11:10] while the upper bit maps to VIU_OSD1_FIFO_CTRL_STAT[31]. Replace meson_viu_osd_burst_length_reg() with pre-defined macros which set these values. meson_viu_osd_burst_length_reg() always returned 0 (for the two used values: 32 and 64 at least) and thus incorrectly set the burst size to 24. Fixes: 147ae1cbaa1842 ("drm: meson: viu: use proper macros instead of magic constants") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200620155752.21065-1-martin.blumenstingl@googlemail.com
2020-07-02drm/i915: Fix the old vs. new epoch counter check during hotplug detectImre Deak1-1/+3
The old epoch counter was left uninited, so the function returned a changed state always. While at it debug print the old epoch counter as well. Fixes: 35205ee9ba46 ("drm/i915: Send hotplug event if edid had changed") Cc: Kunal Joshi <kunal1.joshi@intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200701180001.15857-1-imre.deak@intel.com
2020-07-02drm/hisilicon: Use drmm_kzalloc() instead of devm_kzalloc()Tian Tao1-1/+2
using the new API drmm_kzalloc() instead of devm_kzalloc() v3: still fixed include statements sorted alphabetically. v2: keep the DRM include statements sorted alphabetically. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/1593676183-28525-1-git-send-email-tiantao6@hisilicon.com
2020-07-02Merge tag 'amd-drm-next-5.9-2020-07-01' of git://people.freedesktop.org/~agd5f/linux into drm-nextDave Airlie356-8517/+222264
amd-drm-next-5.9-2020-07-01: amdgpu: - DC DMUB updates - HDCP fixes - Thermal interrupt fixes - Add initial support for Sienna Cichlid GPU - Add support for unique id on Arcturus - Major swSMU code cleanup - Skip BAR resizing if the bios already did id - Fixes for DCN bandwidth calculations - Runtime PM reference count fixes - Add initial UVD support for SI - Add support for ASSR on eDP links - Lots of misc fixes and cleanups - Enable runtime PM on vega10 boards that support BACO - RAS fixes - SR-IOV fixes - Use IP discovery table on renoir - DC stream synchronization fixes amdkfd: - Track SDMA usage per process - Fix GCC10 compiler warnings - Locking fix radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes UAPI: - Update comments to clarify MTYPE From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200701155041.1102829-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-07-02Merge tag 'amd-drm-fixes-5.8-2020-07-01' of git://people.freedesktop.org/~agd5f/linux into drm-fixesDave Airlie4-10/+16
amd-drm-fixes-5.8-2020-07-01: amdgpu: - Fix for vega20 boards without RAS support - DC bandwidth revalidation fix - Fix Renoir vram info fetching - Fix hwmon freq printing Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200701194415.4065-1-alexander.deucher@amd.com
2020-07-02Merge tag 'drm-intel-fixes-2020-07-01' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixesDave Airlie7-15/+304
drm/i915 fixes for v5.8-rc4: - GVT fixes - Include asm sources for render cache clear batches Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87imf7l6ee.fsf@intel.com
2020-07-01drm/i915/dp: Correctly advertise HBR3 for GEN11+Matt Atwood1-17/+11
intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to use before encoder_type is set. This caused GEN11+ to incorrectly strip HBR3 from source rates for edp. Move intel_dp_set_source_rates() to after encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe usages. v2: Alter intel_dp_set_source_rates final position (Ville/Manasi). Remove outdated comment (Ville). Slight optimization of control flow in intel_dp_init_connector. Slight rewording in commit message. Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200630233310.10191-1-matthew.s.atwood@intel.com
2020-07-01drm/amdgpu: use %u rather than %d for sclk/mclkAlex Deucher1-2/+2
Large clock values may overflow and show up as negative. Reported by prOMiNd on IRC. Acked-by: Nirmoy Das <nirmoy.das@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-07-01drm/amdgpu/atomfirmware: fix vram_info fetching for renoirAlex Deucher1-0/+1
Renoir uses integrated_system_info table v12. The table has the same layout as v11 with respect to this data. Just reuse the existing code for v12 for stable. Fixes incorrectly reported vram info in the driver output. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2020-07-01drm/panel: st7703: Assert reset prior to powering down the regulatorsOndrej Jirman1-0/+1
The reset pin is inverted, so if we don't assert reset, the actual gpio will be high and may keep driving the IO port of the panel. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-12-megous@megous.com
2020-07-01drm/panel: st7703: Enter sleep after display offOndrej Jirman1-1/+12
The datasheet suggests to issue sleep in after display off as a part of the panel's shutdown sequence. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-11-megous@megous.com
2020-07-01drm/panel: st7703: Add support for Xingbangda XBD599Ondrej Jirman1-2/+197
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in PinePhone. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-10-megous@megous.com
2020-07-01drm/panel: st7703: Move generic part of init sequence to enable callbackOndrej Jirman1-15/+18
Calling sleep out and display on is a controller specific part of the initialization process. Move it out of the panel specific initialization function to the enable callback. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-9-megous@megous.com
2020-07-01drm/panel: st7703: Move code specific to jh057n closer togetherOndrej Jirman1-24/+24
It's better than having it spread around the driver. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-8-megous@megous.com
2020-07-01drm/panel: st7703: Prepare for supporting multiple panelsOndrej Jirman1-12/+31
Parametrize the driver so that it can support more panels based on st7703 controller. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-7-megous@megous.com
2020-07-01drm/panel: st7703: Rename functions from jh057n prefix to st7703Ondrej Jirman1-44/+46
This is done so that code that's not specific to a particular jh057n panel is named after the controller. Functions specific to the panel are kept named after the panel. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-6-megous@megous.com
2020-07-01drm/panel: rocktech-jh057n00900: Rename the driver to st7703Ondrej Jirman3-14/+14
This rename is done so that the driver matches the name of the display controller and in preparation for adding support for more panels to the driver. This is just a basic file rename, with no code changes. Signed-off-by: Ondrej Jirman <megous@megous.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200701162928.1638874-5-megous@megous.com
2020-07-01drm/i915: Fix g4x fbc watermark enableVille Syrjälä1-12/+21
'level' here means the highest level we can't use, so when checking the fbc watermarks we need a -1 to get at the last enabled level. While at if refactor the code a bit to declutter g4x_compute_pipe_wm(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200429101034.8208-12-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-07-01drm/i915/icl+: Simplify combo/TBT PLL calculation call-chainImre Deak1-37/+27
To simplify things, call the combo PHY/TBT PLL calculation functions directly from the corresponding combo/TypeC PLL get functions, instead of calling the same calculation functions after having to recheck if the given PHY is combo or TypeC. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200629185848.20550-2-imre.deak@intel.com
2020-07-01drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clockImre Deak1-1/+12
When the reference clock is 38.4MHz, using the current TBT PLL fractional divider value results in a slightly off TBT link frequency. This causes an endless loop of link training success followed by a bad link signaling and retraining at least on a Dell WD19TB TBT dock. The workaround provided by the HW team is to divide the fractional divider value by two. This fixed the link training problem on the ThinkPad dock. The same workaround is needed on some EHL platforms and for combo PHY PLLs, these will be addressed in a follow-up. Bspec: 49204 References: HSDES#22010772725 References: HSDES#14011861142 Reported-and-tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Khaled Almahallawy <khaled.almahallawy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200629185848.20550-1-imre.deak@intel.com
2020-07-01drm/i915/gem: Move obj->lut_list under its own lockChris Wilson4-12/+20
The obj->lut_list is traversed when the object is closed as the file table is destroyed during process termination. As this occurs before we kill any outstanding context if, due to some bug or another, the closure is blocked, then we fail to shootdown any inflight operations potentially leaving the GPU spinning forever. As we only need to guard the list against concurrent closures and insertions, the hold is short and merits being treated as a simple spinlock. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200701084439.17025-1-chris@chris-wilson.co.uk
2020-07-01drm/panel: panel-simple: drop use of legacy drm_bus_flagsSam Ravnborg1-14/+14
Replace all uses of the legacy drm_bus_flags with their relevant _SAMPLE_ variant. This is a 1:1 replacement, no effort was made to validate the actual bus flags for the panels. Note: DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE = DRM_BUS_FLAG_PIXDATA_NEGEDGE DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE = DRM_BUS_FLAG_PIXDATA_POSEDGE Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200630180545.1132217-6-sam@ravnborg.org
2020-07-01drm/panel: novatek-nt39016: drop use of legacy drm_bus_flagsSam Ravnborg1-1/+1
Drop use of the legacy drm_bus_flags member and use the more descriptive _SAMPLE_ variant. No functional change. Note: DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE = DRM_BUS_FLAG_PIXDATA_NEGEDGE Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200630180545.1132217-5-sam@ravnborg.org
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.