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2022-07-07drm: bridge: adv7511: unregister cec i2c device after cec adapterAlvin Šipraga1-3/+2
cec_unregister_adapter() assumes that the underlying adapter ops are callable. For example, if the CEC adapter currently has a valid physical address, then the unregistration procedure will invalidate the physical address by setting it to f.f.f.f. Whence the following kernel oops observed after removing the adv7511 module: Unable to handle kernel execution of user memory at virtual address 0000000000000000 Internal error: Oops: 86000004 [#1] PREEMPT_RT SMP Call trace: 0x0 adv7511_cec_adap_log_addr+0x1ac/0x1c8 [adv7511] cec_adap_unconfigure+0x44/0x90 [cec] __cec_s_phys_addr.part.0+0x68/0x230 [cec] __cec_s_phys_addr+0x40/0x50 [cec] cec_unregister_adapter+0xb4/0x118 [cec] adv7511_remove+0x60/0x90 [adv7511] i2c_device_remove+0x34/0xe0 device_release_driver_internal+0x114/0x1f0 driver_detach+0x54/0xe0 bus_remove_driver+0x60/0xd8 driver_unregister+0x34/0x60 i2c_del_driver+0x2c/0x68 adv7511_exit+0x1c/0x67c [adv7511] __arm64_sys_delete_module+0x154/0x288 invoke_syscall+0x48/0x100 el0_svc_common.constprop.0+0x48/0xe8 do_el0_svc+0x28/0x88 el0_svc+0x1c/0x50 el0t_64_sync_handler+0xa8/0xb0 el0t_64_sync+0x15c/0x160 Code: bad PC value ---[ end trace 0000000000000000 ]--- Protect against this scenario by unregistering i2c_cec after unregistering the CEC adapter. Duly disable the CEC clock afterwards too. Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support") Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220612144854.2223873-3-alvin@pqrs.dk
2022-07-07drm: bridge: adv7511: fix CEC power down control register offsetAlvin Šipraga2-6/+3
The ADV7511_REG_CEC_CTRL = 0xE2 register is part of the main register map - not the CEC register map. As such, we shouldn't apply an offset to the register address. Doing so will cause us to address a bogus register for chips with a CEC register map offset (e.g. ADV7533). Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support") Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220612144854.2223873-2-alvin@pqrs.dk
2022-07-07drm/ssd130x: Fix pre-charge period settingEzequiel Garcia1-1/+1
Fix small typo which causes the mask for the 'precharge1' setting to be used with the 'precharge2' value. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220706184133.210888-1-ezequiel@vanguardiasur.com.ar
2022-07-07drm/i915/selftests: Grab the runtime pm in shrink_thpChris Wilson1-1/+6
Since we are not holding a wakeref, shrinking a bound object is not guaranteed. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6370 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220706154738.235204-1-matthew.auld@intel.com
2022-07-07drm/msm/dp: delete vdda regulator related functions from eDP/DP controllerKuogee Hsieh3-115/+2
Vdda regulators are related to both eDP and DP phy so that it should be managed at eDP and DP phy driver instead of controller. This patch removes vdda regulators related functions out of eDP/DP controller. Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1657038556-2231-4-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-06drm/i915: Fix vm use-after-free in vma destructionThomas Hellström1-4/+8
In vma destruction, the following race may occur: Thread 1: Thread 2: i915_vma_destroy(); ... list_del_init(vma->vm_link); ... mutex_unlock(vma->vm->mutex); __i915_vm_release(); release_references(); And in release_reference() we dereference vma->vm to get to the vm gt pointer, leading to a use-after free. However, __i915_vm_release() grabs the vm->mutex so the vm won't be destroyed before vma->vm->mutex is released, so extract the gt pointer under the vm->mutex to avoid the vma->vm dereference in release_references(). v2: Fix a typo in the commit message (Andi Shyti) Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5944 Fixes: e1a7ab4fca0c ("drm/i915: Remove the vm open count") Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Acked-by: Nirmoy Das <nirmoy.das@intel.con> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220620123659.381772-1-thomas.hellstrom@linux.intel.com (cherry picked from commit 1926a6b75954fc1a8b44d10bd0c67db957b78cf7) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-06drm/i915/guc: ADL-N should use the same GuC FW as ADL-SDaniele Ceraolo Spurio1-0/+9
The only difference between the ADL S and P GuC FWs is the HWConfig support. ADL-N does not support HWConfig, so we should use the same binary as ADL-S, otherwise the GuC might attempt to fetch a config table that does not exist. ADL-N is internally identified as an ADL-P, so we need to special-case it in the FW selection code. Fixes: 7e28d0b26759 ("drm/i915/adl-n: Enable ADL-N platform") Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220621233005.3952293-1-daniele.ceraolospurio@intel.com (cherry picked from commit 971e4a9781742aaad1587e25fd5582b2dd595ef8) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-06drm/i915: fix a possible refcount leak in intel_dp_add_mst_connector()Hangyu Hua1-0/+1
If drm_connector_init fails, intel_connector_free will be called to take care of proper free. So it is necessary to drop the refcount of port before intel_connector_free. Fixes: 091a4f91942a ("drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector") Signed-off-by: Hangyu Hua <hbh25y@gmail.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220624130406.17996-1-jose.souza@intel.com Signed-off-by: José Roberto de Souza <jose.souza@intel.com> (cherry picked from commit cea9ed611e85d36a05db52b6457bf584b7d969e2) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-07-07drm: rcar-du: Lift z-pos restriction on primary plane for Gen3Laurent Pinchart1-8/+3
There's no reason to require the primary plane to always be at the bottom of the stack, as the VSP supports arbitrary ordering of planes, and the KMS API doesn't have such a requirement either. Lift the restriction. As the primary plane can now be positioned arbitrarily, enable control of its alpha channel as well. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Tomohito Esaki <etom@igel.co.jp>
2022-07-07drm: rcar-du: Fix Alpha blending issue on Gen3LUU HOAI1-0/+12
As per R-Car-Gen3_Common_OPC_Customer_Notifications_V30.1.pdf, unexpected image output(such as incorrect colors or planes being invisible) can happen on the below conditions, as PnALPHAR register is not initialized by reset. When alpha blending (PpMRm.PpSPIM=0b101) is performed and: •two Planes are enabled on any DUn (n=0,1,2,3) oDSPRn= 0x0000 0031 or 0x0000 0013 •or DU0 and DU1 is used for display at the same time oDSPR0= 0x0000 0001 and DSPR1= 0x0000 0003 oDSPR0= 0x0000 0003 and DSPR1= 0x0000 0001 •or DU2 and DU3(H3 Only) is used for display at the same time oDSPR2= 0x0000 0001 and DSPR3= 0x0000 0003 oDSPR2= 0x0000 0003 and DSPR3= 0x0000 0001 This patch set PnALPHAR register to 0 to avoid this issue. Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm: rcar-du: Add num_rpf to struct rcar_du_device_infoBiju Das3-5/+20
Number of RPF's VSP is different on R-Car and RZ/G2L R-Car Gen3 -> 5 RPFs R-Car Gen2 -> 4 RPFs RZ/G2L -> 2 RPFs Add num_rpf to struct rcar_du_device_info to support later SoC without any code changes. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm: rcar-du: Drop file name from comment header blocksLaurent Pinchart24-24/+24
The comment blocks at the beginning of each file have a one-line summary description of the file that includes the file name. While the description is useful, the file name only creates opportunities for mistakes (as seen in rcar_du_vsp.c) without any added value. Drop it. Reported-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-07drm: rcar-du: Extend CMM HDSE documentationKieran Bingham1-0/+5
When the CMM is enabled, the HDSE offset is further adjusted to compensate for consumed pixels. Explain this further, with an extra comment at the point the offset is adjusted. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2022-07-06drm/amdgpu/display: disable prefer_shadow for generic fb helpersAlex Deucher6-6/+12
Seems to break hibernation. Disable for now until we can root cause it. Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Bug: https://bugzilla.kernel.org/show_bug.cgi?id=216119 Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-06drm/amdgpu: keep fbdev buffers pinned during suspendAlex Deucher1-4/+21
Was dropped when we converted to the generic helpers. Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.") Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-06drm/msm: Switch to pfn mappingsRob Clark1-2/+3
I'm not entirely sure why we were using VM_MIXEDMAP. These are never CoW mappings. Let's switch to be more consistent with what other drivers and the GEM shmem helpers do. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/491218/ Link: https://lore.kernel.org/r/20220625225454.81039-2-robdclark@gmail.com
2022-07-06drm/msm: Deprecate MSM_BO_UNCACHED harderRob Clark3-5/+17
Handle the demotion to MSM_BO_WC at the userspace ABI level, and fix the remaining internal MSM_BO_UNCACHED user. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/489339/ Link: https://lore.kernel.org/r/20220613194623.2588353-1-robdclark@gmail.com
2022-07-06drm/msm/adreno: Defer enabling runpm until hw_init()Rob Clark2-1/+6
To avoid preventing the display from coming up before the rootfs is mounted, without resorting to packing fw in the initrd, the GPU has this limbo state where the device is probed, but we aren't ready to start sending commands to it. This is particularly problematic for a6xx, since the GMU (which requires fw to be loaded) is the one that is controlling the power/clk/icc votes. So defer enabling runpm until we are ready to call gpu->hw_init(), as that is a point where we know we have all the needed fw and are ready to start sending commands to the coproc's. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/489337/ Link: https://lore.kernel.org/r/20220613182036.2567963-1-robdclark@gmail.com
2022-07-06drm/msm/gem: Drop obj lock in msm_gem_free_object()Rob Clark2-9/+13
The only reason we grabbed the lock was to satisfy a bunch of places that WARN_ON() if called without the lock held. But this angers lockdep which doesn't realize no one else can be holding the lock by the time we end up destroying the object (and sees what would otherwise be a locking inversion between reservation_ww_class_mutex and fs_reclaim). Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/14 Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/489364/ Link: https://lore.kernel.org/r/20220613205032.2652374-1-robdclark@gmail.com
2022-07-06drm/msm/dp: remove dp_display_en/disable prototypes and data argumentDmitry Baryshkov1-6/+3
Remove unused dp_display_en/disable prototypes. While we are at it, remove extra 'data' argument that is unused. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/490104/ Link: https://lore.kernel.org/r/20220617232434.1139950-3-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/dp: rename second dp_display_enable()'s argumentDmitry Baryshkov1-3/+3
To follow up recent changes, rename (and change type of) second dp_display_enable()'s argument from generic u32 data to bool force_link_train, which is later passed to dp_ctrl_on_stream(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/490102/ Link: https://lore.kernel.org/r/20220617232434.1139950-2-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/dp: remove unused stubsDmitry Baryshkov1-35/+0
Refactoring DP code transformed several functions into empty stubs. Remove them. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/490100/ Link: https://lore.kernel.org/r/20220617232434.1139950-1-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/adreno: Do not propagate void return valuesGeert Uytterhoeven3-4/+4
With sparse ("make C=2"), lots of error: return expression in void function messages are seen. Fix this by removing the return statements to propagate void return values. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Patchwork: https://patchwork.freedesktop.org/patch/492529/ Link: https://lore.kernel.org/r/0083bc7e23753c19902580b902582ae499b44dbf.1657113388.git.geert@linux-m68k.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/gpu: Add GEM debug label to devcoreRob Clark3-0/+6
When trying to understand an iova fault devcore, once you figure out which buffer we accessed beyond the end of, it is useful to see the buffer's debug label. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/491910/ Link: https://lore.kernel.org/r/20220629211919.563585-3-robdclark@gmail.com
2022-07-06drm/msm/gpu: Capture all BO addr+size in devcoreRob Clark1-27/+7
It is useful to know what buffers userspace thinks are associated with the submit, even if we don't care to capture their content. This brings things more inline with $debugfs/rd cmdstream dumping. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/491908/ Link: https://lore.kernel.org/r/20220629211919.563585-2-robdclark@gmail.com
2022-07-06drm/msm: switch msm_kms_init_aspace() to use device_iommu_mapped()Dmitry Baryshkov1-7/+7
Change msm_kms_init_aspace() to use generic function device_iommu_mapped() instead of the fwnode-specific interface dev_iommu_fwspec_get(). While we are at it, stop referencing platform_bus_type directly and use the bus of the IOMMU device. Suggested-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/489703/ Link: https://lore.kernel.org/r/20220616081106.350262-6-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm: move KMS aspace init to the separate helperDmitry Baryshkov4-56/+49
MDP5 and DPU drivers have the same piece of code now to initialize IOMMU and GEM address space. Move it to the msm_drv.c Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/489701/ Link: https://lore.kernel.org/r/20220616081106.350262-5-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm: Stop using iommu_present()Dmitry Baryshkov1-2/+8
Even if some IOMMU has registered itself on the platform "bus", that doesn't necessarily mean it provides translation for the device we care about. Replace iommu_present() with a more appropriate check. On Qualcomm platforms the IOMMU can be specified either for the MDP/DPU device or for its parent MDSS device depending on the actual platform. Check both of them, since that is how both DPU and MDP5 drivers work. Co-developed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/489699/ Link: https://lore.kernel.org/r/20220616081106.350262-4-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/i915/guc: Asynchronous flush of GuC log regionsAlan Previn2-2/+3
Both error-capture and relay-logging mechanism use the GuC log infrastructure. That means the KMD must send a log flush complete notification back to GuC after reading the data out. This call is currently being sent synchronously. However, synchronous H2Gs cause problems when the system is backed up. There is no need for this to be synchronous. The KMD wasn't even looking at the return status from it. So make it asynchronous and then there is no issue about time outs. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220607002314.1451656-2-alan.previn.teres.alexis@intel.com
2022-07-06drm: xlnx: add <linux/io.h> for readl/writelRandy Dunlap1-0/+1
Add a header file to prevent build errors: ../drivers/gpu/drm/xlnx/zynqmp_dp.c: In function ‘zynqmp_dp_write’: ../drivers/gpu/drm/xlnx/zynqmp_dp.c:335:9: error: implicit declaration of function ‘writel’ [-Werror=implicit-function-declaration] 335 | writel(val, dp->iomem + offset); ../drivers/gpu/drm/xlnx/zynqmp_dp.c: In function ‘zynqmp_dp_read’: ../drivers/gpu/drm/xlnx/zynqmp_dp.c:340:16: error: implicit declaration of function ‘readl’ [-Werror=implicit-function-declaration] 340 | return readl(dp->iomem + offset); Fixes: a204f9743b68 ("drm: Remove linux/i2c.h from drm_crtc.h") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Hyun Kwon <hyun.kwon@xilinx.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Michal Simek <michal.simek@xilinx.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220706184224.29116-1-rdunlap@infradead.org
2022-07-06drm/i915: Nuke PCH_JSPVille Syrjälä3-5/+4
JSP is based on ICP and we don't really need to differentiate between the two. So let's just delcare JSP to be ICP. The only slight change here is for Wa_14011294188 which we used to apply for JSP but now we'll only apply to MCC. This should be fine since the issue being dealt with was introduced in TGP and inherited into MCC. JSP being derived from ICP should not need this workaround. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-07-06drm/i915: Nuke PCH_MCCVille Syrjälä4-6/+5
MCC is derived from TGP, and we have no real need to differentiate between the two. Thus remove PCH_MCC and just declare it to be PCH_TGP compatible. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-07-06drm/i915: Use short PCH names consistentlyVille Syrjälä1-5/+5
The comments regarding PCH compatibility use long vs. short names inconsistently. Just use short names always. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220630150600.24611-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-07-06drm/msm/mdp5: move iommu_domain_alloc() call close to its usageDmitry Baryshkov3-24/+4
Move iommu_domain_alloc() in front of adress space/IOMMU initialization. This allows us to drop final bits of struct mdp5_cfg_platform which remained from the pre-DT days. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/489695/ Link: https://lore.kernel.org/r/20220616081106.350262-3-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/dpu: check both DPU and MDSS devices for the IOMMUDmitry Baryshkov1-3/+11
Follow the lead of MDP5 driver and check both DPU and MDSS devices for the IOMMU specifiers. Historically DPU devices had IOMMU specified in the MDSS device tree node, but as some of MDP5 devices are being converted to the supported by the DPU driver, the driver should adapt and check both devices. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/489696/ Link: https://lore.kernel.org/r/20220616081106.350262-2-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm: Fix %d vs %uRob Clark1-5/+5
In debugging fence rollover, I noticed that GPU state capture and devcore dumps were showing me negative fence numbers. Let's fix that and some related signed vs unsigned confusion. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/489621/ Link: https://lore.kernel.org/r/20220615163532.3013035-1-robdclark@gmail.com
2022-07-06drm/msm/dpu: move struct dpu_hw_blk definition to dpu_hw_utils.hDmitry Baryshkov12-36/+7
There is little point in having a separate header just for a single opaque struct definition. Drop it now and move the struct to the dpu_hw_util.h header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/488016/ Link: https://lore.kernel.org/r/20220601161349.1517667-5-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/dpu: merge base_off with blk_off in struct dpu_hw_blk_reg_mapDmitry Baryshkov15-33/+20
There is little point in keeping a separate MDP address and block offset in this struct. Merge them to form a new blk_addr field used for all register access. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/488017/ Link: https://lore.kernel.org/r/20220601161349.1517667-4-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/dpu: drop length from struct dpu_hw_blk_reg_mapDmitry Baryshkov13-14/+1
We (nearly) do not use the length field from struct dpu_hw_blk_reg_map, so we can drop it safely. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/488013/ Link: https://lore.kernel.org/r/20220601161349.1517667-3-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/dpu: drop xin_id from struct dpu_hw_blk_reg_mapDmitry Baryshkov1-2/+0
Drop the unused field xin_id. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/488011/ Link: https://lore.kernel.org/r/20220601161349.1517667-2-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/adreno: Allow larger address space sizeRob Clark4-1/+24
The restriction to 4G was strictly to work around 64b math bug in some versions of SQE firmware. This appears to be fixed in a650+ SQE fw, so allow a larger address space size on these devices. Also, add a modparam override for debugging and igt. v2: Send the right version of the patch (ie. the one that actually compiles) Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Chia-I Wu <olvaffe@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/487601/ Link: https://lore.kernel.org/r/20220529180428.2577832-1-robdclark@gmail.com
2022-07-06drm/msm/adreno: Fix up formattingKonrad Dybcio1-9/+8
Leading spaces are not something checkpatch likes, and it says so when they are present. Use tabs consistently to indent function body and unwrap a 83-char-long line, as 100 is cool nowadays. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/487592/ Link: https://lore.kernel.org/r/20220528160353.157870-4-konrad.dybcio@somainline.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/a6xx: Add speedbin support for A619 GPUKonrad Dybcio1-0/+19
There are various SKUs of A619, ranging from 565 MHz to 850 MHz, depending on the bin. Add support for distinguishing them, so that proper frequency ranges can be applied, depending on the HW. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/487590/ Link: https://lore.kernel.org/r/20220528160353.157870-3-konrad.dybcio@somainline.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/adreno: Add A619 supportKonrad Dybcio5-6/+169
Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350), 480 (SM4350) and 750G (SM7225). Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/487588/ Link: https://lore.kernel.org/r/20220528160353.157870-2-konrad.dybcio@somainline.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm/adreno: Remove dead codeKonrad Dybcio1-2/+0
This BUG_ON will never be reached, and there is a comment 20 above explaining why. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/487586/ Link: https://lore.kernel.org/r/20220528160353.157870-1-konrad.dybcio@somainline.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/msm: Avoid unclocked GMU register access in 6xx gpu_busyDouglas Anderson6-33/+53
From testing on sc7180-trogdor devices, reading the GMU registers needs the GMU clocks to be enabled. Those clocks get turned on in a6xx_gmu_resume(). Confusingly enough, that function is called as a result of the runtime_pm of the GPU "struct device", not the GMU "struct device". Unfortunately the current a6xx_gpu_busy() grabs a reference to the GMU's "struct device". The fact that we were grabbing the wrong reference was easily seen to cause crashes that happen if we change the GPU's pm_runtime usage to not use autosuspend. It's also believed to cause some long tail GPU crashes even with autosuspend. We could look at changing it so that we do pm_runtime_get_if_in_use() on the GPU's "struct device", but then we run into a different problem. pm_runtime_get_if_in_use() will return 0 for the GPU's "struct device" the whole time when we're in the "autosuspend delay". That is, when we drop the last reference to the GPU but we're waiting a period before actually suspending then we'll think the GPU is off. One reason that's bad is that if the GPU didn't actually turn off then the cycle counter doesn't lose state and that throws off all of our calculations. Let's change the code to keep track of the suspend state of devfreq. msm_devfreq_suspend() is always called before we actually suspend the GPU and msm_devfreq_resume() after we resume it. This means we can use the suspended state to know if we're powered or not. NOTE: one might wonder when exactly our status function is called when devfreq is supposed to be disabled. The stack crawl I captured was: msm_devfreq_get_dev_status devfreq_simple_ondemand_func devfreq_update_target qos_notifier_call qos_max_notifier_call blocking_notifier_call_chain pm_qos_update_target freq_qos_apply apply_constraint __dev_pm_qos_update_request dev_pm_qos_update_request msm_devfreq_idle_work Fixes: eadf79286a4b ("drm/msm: Check for powered down HW in the devfreq callbacks") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/489124/ Link: https://lore.kernel.org/r/20220610124639.v4.1.Ie846c5352bc307ee4248d7cab998ab3016b85d06@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2022-07-06drm/bridge: ti-sn65dsi86: Use atomic variants of drm_bridge_funcsSam Ravnborg1-8/+15
Move away from the deprecated enable/disable operations in drm_bridge_funcs and enable atomic use. v3: - Drop use of DRM_BRIDGE_STATE_OPS v2: - fix build (kernel test robot <lkp@intel.com>) Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Kieran Bingham <kieran.bingham@ideasonboard.com> Cc: Douglas Anderson <dianders@chromium.org> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Robert Foss <robert.foss@linaro.org> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220703202724.9553-2-sam@ravnborg.org
2022-07-06drm/mediatek: dpi: Add dp_intf supportGuillaume Ranquet5-0/+51
Dpintf is the displayport interface hardware unit. This unit is similar to dpi and can reuse most of the code. This patch adds support for mt8195-dpintf to this dpi driver. Main differences are: - 4 pixels for one iteration for dp_intf while dpi is 1 pixel for one iteration. - Input of dp_intf is two pixels per iteration. - Some register contents differ slightly between the two components. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-6-rex-bc.chen@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-07-06drm/mediatek: dpi: Add pixels_per_iter config supportBo-Chen Chen1-3/+23
The quantity of output for one iteration could be different for dpi and dp_intf. For dp_intf, it's 4 pixels for one iteration it's 1 pixel for one iteration for dpi. Therefore, we add a new config "pixels_per_iter" to control quantity of transferred pixels per iteration. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-5-rex-bc.chen@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2022-07-06drm/mediatek: dpi: Add input_2pixel config supportBo-Chen Chen2-0/+8
The input pixel per iteration could be different, so we add a new config "input_2pixel" to control this. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220705102530.1344-4-rex-bc.chen@mediatek.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
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