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2019-09-02drm/sti: Include the right headerLinus Walleij1-1/+1
The sti_hdmi.c file include <linux/of_gpio.h> despite not even using any GPIOs. What it does use is devm_ioremap_nocache() which comes from <linux/io.h> implicitly by including that header. Fix this up by including the right header instead. Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190823071428.6155-1-linus.walleij@linaro.org
2019-09-02drm: sti: use cec_notifier_conn_(un)registerDariusz Marcinkiewicz1-7/+12
Use the new cec_notifier_conn_(un)register() functions to (un)register the notifier for the HDMI connector, and fill in the cec_connector_info. Changes since v2: Don't invalidate physical address before unregistering the notifier. Signed-off-by: Dariusz Marcinkiewicz <darekm@google.com> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190814104520.6001-7-darekm@google.com
2019-09-02drm/etnaviv: fix missing unlock on error in etnaviv_iommuv1_context_alloc()Wei Yongjun1-1/+3
Add the missing unlock before return from function etnaviv_iommuv1_context_alloc() in the error handling case. Fixes: 27b67278e007 ("drm/etnaviv: rework MMU handling") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2019-09-02drm: dw-hdmi-i2s: enable audio clock in audio_startupCheng-Yi Chiang1-0/+9
In the designware databook, the sequence of enabling audio clock and setting format is not clearly specified. Currently, audio clock is enabled in the end of hw_param ops after setting format. On some monitors, there is a possibility that audio does not come out. Fix this by enabling audio clock in audio_startup ops before hw_param ops setting format. Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190902035435.44463-1-cychiang@chromium.org
2019-09-02drm/nouveau/sec2/gp102: add missing MODULE_FIRMWAREsBen Skeggs1-0/+12
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org [v5.2+]
2019-09-01drm/exynos: drop use of drmP.hSam Ravnborg7-3/+19
There was a few uses of drmP that was missed in the last patch removing this header from exynos. Remove the final uses of this header. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Inki Dae <inki.dae@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Jingoo Han <jingoohan1@gmail.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2019-08-31drm/i915/perf: Assert locking for i915_init_oa_perf_state()Chris Wilson3-1/+19
We use the context->pin_mutex to serialise updates to the OA config and the registers values written into each new context. Document this relationship and assert we do hold the context->pin_mutex as used by gen8_configure_all_contexts() to serialise updates to the OA config itself. v2: Add a white-lie for when we call intel_gt_resume() from init. v3: Lie while we have the context pinned inside atomic reset. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20190830181929.18663-1-chris@chris-wilson.co.uk
2019-08-30drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+Matt Roper1-2/+6
The bspec was recently updated with these new cdclk values for ICL, EHL, and TGL. Bspec: 20598 Bspec: 49201 Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826225540.11987-3-matthew.d.roper@intel.com
2019-08-30drm/i915: Allow /2 CD2X divider on gen11+Matt Roper2-55/+38
The bspec has just recently been updated with new cdclk values that require the use of a /2 CD2X divider rather than a /1 divider. Once we add the divider selection logic to ICL+ cdclk programming, we have pretty much the same logic we were already using on CNL, so it's simpler to drop icl_set_cdclk() completely and reuse cnl_set_cdclk() on gen11+ platforms as well. v2: - Using ICL_CDCLK_CD2X_PIPE_NONE + BXT_CDCLK_CD2X_PIPE(pipe) for TGL is correct, but looks really confusing. Add some TGL_ macros that alias these to avoid confusion. (Ville) - Use DIV_ROUND_CLOSEST rather than / when applying the divider. (Ville) Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830004828.19359-1-matthew.d.roper@intel.com
2019-08-30drm/i915: Fix regression with crtc disable orderingMaarten Lankhorst1-10/+11
When we moved the code to disable crtc's to a separate patch, we forgot to ensure that for_each_oldnew_intel_crtc_in_state_reverse() was moved as well. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: 66d9cec8a6c9 ("drm/i915/display: Move the commit_tail() disable sequence to separate function") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830101644.8740-1-maarten.lankhorst@linux.intel.com
2019-08-30drm/amdgpu: Move null pointer dereference checkAustin Kim1-2/+3
Null pointer dereference check should have been checked, ahead of below routine. struct amdgpu_device *adev = hwmgr->adev; With this commit, it could avoid potential NULL dereference. Signed-off-by: Austin Kim <austindh.kim@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: Fix undefined dm_ip_block for navi12Petr Cvek1-0/+2
There is missing "if defined" CONFIG_DRM_AMD_DC block for non DC configurations. This will cause link error. The patch is fixing that. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110979 Signed-off-by: Petr Cvek <petrcvekcz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: fix no interrupt issue for renoir emu (v2)Aaron Liu1-8/+10
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN register, that limits IH to use physical address (FBPA, GPA) directly. Those chicken bits need to be programmed first. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV seriesAaron Liu1-0/+4
In Renoir's emulator, those chicken bits need to be programmed. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amd/powerplay: SMU_MSG_OverridePcieParameters is unsupport for APUAaron Liu1-0/+3
For apu, SMU_MSG_OverridePcieParameters is unsupport. So return directly in smu_override_pcie_parameters function. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/i915: Use RCU for unlocked vm_idr lookupChris Wilson1-7/+4
Since i915_address_space is now RCU protected, we can do the vm_idr lookup without taking the vm_idr_mutex, just with the rcu_read_lock() instead. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830180325.7755-1-chris@chris-wilson.co.uk
2019-08-30drm/amdgpu: Handle job is NULL use case in amdgpu_device_gpu_recoverAndrey Grodzovsky1-6/+4
This should be checked at all places job is accessed. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/i915: Remove ppgtt->dirty_enginesChris Wilson2-16/+1
This is no longer used anywhere and so can be removed. However, tracking the dirty status on the ppgtt doesn't work very well if the ppgtt is shared, so perhaps for the best that it is no longer required. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830180000.24608-3-chris@chris-wilson.co.uk
2019-08-30drm/i915/gtt: Downgrade Cherryview back to aliasing-ppgttChris Wilson2-60/+11
With the upcoming change in timing (dramatically reducing the latency between manipulating the ppGTT and execution), no amount of tweaking could save Cherryview, it would always fail to invalidate its TLB. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830180000.24608-2-chris@chris-wilson.co.uk
2019-08-30drm/i915/gtt: Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgttChris Wilson2-47/+20
With the upcoming change in timing (dramatically reducing the latency between manipulating the ppGTT and execution), no amount of tweaking could save Baytrail, it would always fail to invalidate its TLB. Ville was right, Baytrail is beyond hope. v2: Rollback on all gen7; same timing instability on TLB invalidation. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830180000.24608-1-chris@chris-wilson.co.uk
2019-08-30drm/i915: unify icp, tgp and mcc irq setupLucas De Marchi1-29/+21
Use a single function to setup the SDE irq and make MCC, ICP and TGP use it, just like was done for the irq handler. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829211526.30525-4-jose.souza@intel.com Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-08-30drm/i915: parameterize SDE hotplug registersLucas De Marchi2-38/+33
Ice Lake, Tiger Lake and Elkhart Lake all have different port configurations and all of them can be parameterized the same way to form the SDE hotplug bitmask. Avoid making them a special case an just use the parameterized macros. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829211526.30525-3-jose.souza@intel.com Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-08-30drm/i915: unify icp, tgp and mcc irq handlingLucas De Marchi1-49/+16
The differences are only on the pins, trigger and long_detect function. The MCC handling is already partially merged, so merge TGP as well. Remove the pins argument from icp_irq_handler() so we have all the differences between the 3 set in a common if ladder. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829211526.30525-2-jose.souza@intel.com Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-08-30drm/i915: parameterize south hpd macrosLucas De Marchi2-42/+16
South, follow the north. Instead of defining separate macros for each port, make them take port as parameter as done for TC ports and for north engine. This will allow us to easily extend this as needed. tgp_ddi_port_hotplug_long_detect() is also removed as after the EHL introduction the tgp variant is an exact copy of icp. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829211526.30525-1-jose.souza@intel.com Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2019-08-30drm/panfrost: Remove unnecessary hwaccess_lock spin_lockRob Herring3-7/+0
With the introduction of the as_lock to serialize address space registers, the hwaccess_lock is only used within the job code and is not protecting anything. panfrost_job_hw_submit() only accesses registers for 1 job slot and it's already serialized by drm_sched. Fixes: 7282f7645d06 ("drm/panfrost: Implement per FD address spaces") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-9-robh@kernel.org
2019-08-30drm/panfrost: Flush and disable address space when freeing page tablesRob Herring1-7/+9
Currently, page tables are freed without disabling the address space first. This probably is fine as we'll switch to new page tables when the address space is allocated again and runtime PM suspend will reset the GPU clearing the registers. However, it's better to clean up after ourselves. There is also a problem that we could be accessing the h/w in tlb_inv_context() when suspended. Rework the disable code to make sure we flush caches/TLBs and disable the address space before freeing the page tables if we are not suspended. As the tlb_inv_context() hook is only called when freeing the page tables and we do a flush before disabling the AS, lets remove the flush from tlb_inv_context and avoid any runtime PM issues. Fixes: 7282f7645d06 ("drm/panfrost: Implement per FD address spaces") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-8-robh@kernel.org
2019-08-30drm/panfrost: Add cache/TLB flush before switching address spaceRob Herring1-0/+2
It's not entirely clear if this is required, but add a flush of GPU caches and TLBs before we change an address space to new page tables. Fixes: 7282f7645d06 ("drm/panfrost: Implement per FD address spaces") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-7-robh@kernel.org
2019-08-30drm/panfrost: Split mmu_hw_do_operation into locked and unlocked versionRob Herring1-13/+13
In preparation to call mmu_hw_do_operation with the as_lock already held, Add a mmu_hw_do_operation_locked function. Fixes: 7282f7645d06 ("drm/panfrost: Implement per FD address spaces") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-6-robh@kernel.org
2019-08-30drm/panfrost: Rework page table flushing and runtime PM interactionRob Herring1-20/+18
There is no point in resuming the h/w just to do flush operations and doing so takes several locks which cause lockdep issues with the shrinker. Rework the flush operations to only happen when the h/w is already awake. This avoids taking any locks associated with resuming which trigger lockdep warnings. Fixes: 013b65101315 ("drm/panfrost: Add madvise and shrinker support") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-5-robh@kernel.org
2019-08-30drm/panfrost: Remove unnecessary mmu->lock mutexRob Herring2-10/+0
There's no need to serialize io-pgtable calls and the as_lock is sufficient to serialize flush operations, so we can remove the per page table lock. Fixes: 7282f7645d06 ("drm/panfrost: Implement per FD address spaces") Suggested-by: Robin Murphy <robin.murphy@arm.com> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-4-robh@kernel.org
2019-08-30drm/panfrost: Hold runtime PM reference until jobs completeRob Herring1-11/+28
Doing a pm_runtime_put as soon as a job is submitted is wrong as it should not happen until the job completes. It works currently because we are relying on the autosuspend timeout to keep the h/w enabled. Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Steven Price <steven.price@arm.com> Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-3-robh@kernel.org
2019-08-30drm/panfrost: Rework runtime PM initializationRob Herring2-13/+6
There's a few issues with the runtime PM initialization. The documentation states pm_runtime_set_active() should be called before pm_runtime_enable(). The pm_runtime_put_autosuspend() could suspend the GPU before panfrost_perfcnt_init() is called which touches the h/w. The autosuspend delay keeps things from breaking. There's no need explicitly power off the GPU only to wake back up with pm_runtime_get_sync(). Just delaying pm_runtime_enable to the end of probe is sufficient. Lets move all the runtime PM calls into the probe() function so they are all in one place and are done after all initialization. Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Cc: Steven Price <steven.price@arm.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190826223317.28509-2-robh@kernel.org
2019-08-30Merge branch 'arm/smmu' into arm/mediatekJoerg Roedel1-8/+16
2019-08-30drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+Ramalingam C3-63/+219
>From Gen12 onwards, HDCP HW block is implemented within transcoders. Till Gen11 HDCP HW block was part of DDI. Hence required changes in HW programming is handled here. As ME FW needs the transcoder detail on which HDCP is enabled on Gen12+ platform, we are populating the detail in hdcp_port_data. v2: _MMIO_TRANS is used [Lucas and Daniel] platform check is moved into the caller [Lucas] v3: platform check is moved into a macro [Shashank] v4: Few optimizations in the coding [Shashank] v5: Fixed alignment in macro definition in i915_reg.h [Shashank] unused variables "reg" is removed. v6: Configuring the transcoder at compute_config. transcoder is used instead of pipe in macros. Rebased. v7: transcoder is cached at intel_hdcp hdcp_port_data is configured with transcoder index asper ME FW. v8: s/trans/cpu_transcoder s/tc/cpu_transcoder v9: rep_ctl is prepared for TCD too. return moved into deault of rep_ctl prepare function [Shashank] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190828164216.405-7-ramalingam.c@intel.com
2019-08-30drm/i915/hdcp: update current transcoder into intel_hdcpRamalingam C5-1/+62
On gen12+ platforms, HDCP HW is associated to the transcoder. Hence on every modeset update associated transcoder into the intel_hdcp of the port. v2: s/trans/cpu_transcoder [Jani] v3: comment is added for fw_ddi init for gen12+ [Shashank] only hdcp capable transcoder is translated into fw_tc [Shashank] v4: fw_tc initialization is kept for modeset. [Tomas] few extra doc is added at port_data init [Tomas] v5: Few comments are improvised [Tomas] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190828164216.405-6-ramalingam.c@intel.com
2019-08-30drm: Move port definition back to i915 headerRamalingam C7-2/+26
We dont need the definition of the enum port outside I915, anymore. Hence move enum port definition into I915 driver itself. v2: intel_display.h is included in intel_hdcp.h v3: enum port is declared in headers. v4: commit msg is rephrased. v5: copyright year is updated [Tomas] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Reviewed-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190828164216.405-3-ramalingam.c@intel.com
2019-08-30drm/i915: mei_hdcp: I915 sends ddi index as per ME FWRamalingam C1-1/+16
I915 converts it's port value into ddi index defiend by ME FW and pass it as a member of hdcp_port_data structure. Hence expose the enum mei_fw_ddi to I915 through i915_mei_interface.h. v2: Copyright years are bumped [Tomas] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Acked-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190828164216.405-2-ramalingam.c@intel.com
2019-08-30drm/selftests: modes: Add more unit tests for the cmdline parserMaxime Ripard2-0/+137
Let's add some unit tests for the recent bugs we just fixed. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-4-mripard@kernel.org
2019-08-30drm/modes: Introduce a whitelist for the named modesMaxime Ripard1-0/+20
The named modes support has introduced a number of glitches that were in part due to the fact that the parser will take any string as a named mode. Since we shouldn't have a lot of options there (and they should be pretty standard), let's introduce a whitelist of the available named modes so that the kernel can differentiate between a poorly formed command line and a named mode. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-3-mripard@kernel.org
2019-08-30drm/modes: Fix the command line parser to take force options into accountMaxime Ripard1-5/+19
The command line parser when it has been rewritten introduced a regression when the only thing on the command line is an option to force the detection of a connector (such as video=HDMI-A-1:d), which are completely valid. It's been further broken by the support for the named modes which take anything that is not a resolution as a named mode. Let's fix this by running the extra command line option parser on the named modes if they only take a single character. Fixes: e08ab74bd4c7 ("drm/modes: Rewrite the command line parser") Reported-by: Jernej Škrabec <jernej.skrabec@gmail.com> Reported-by: Thomas Graichen <thomas.graichen@googlemail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-2-mripard@kernel.org
2019-08-30drm/modes: Add a switch to differentiate free standing optionsMaxime Ripard1-1/+9
Some extra command line options can be either specified without anything else on the command line (basically all the force connection options), but some other are only relevant when matched with a resolution (margin and interlace). Let's add a switch to restrict if needed the available option set. Fixes: e08ab74bd4c7 ("drm/modes: Rewrite the command line parser") Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190827115850.25731-1-mripard@kernel.org
2019-08-30Merge tag 'drm-intel-fixes-2019-08-29' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixesDave Airlie4-2/+19
drm/i915 fixes for v5.3-rc7: - Fix DP MST max BPC property creation after DRM register - Fix unused ggtt deballooning and NULL dereference in guest - Fix DSC eDP transcoder identification - Fix WARN from DMA API debug by setting DMA max segment size Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87a7bseati.fsf@intel.com
2019-08-30Merge tag 'drm-fixes-5.3-2019-08-28' of git://people.freedesktop.org/~agd5f/linux into drm-fixesDave Airlie5-27/+92
drm-fixes-5.3-2019-08-28: amdgpu: - Fix GFXOFF regression for PCO and RV2 - Fix missing fence reference - Fix VG20 power readings on certain SMU firmware versions - Fix dpm level setup for VG20 - Add an ATPX laptop quirk Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829022925.32678-1-alexander.deucher@amd.com
2019-08-30Merge tag 'drm-misc-fixes-2019-08-28' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixesDave Airlie7-18/+50
drm-misc-fixes for v5.3 (rc7?): - Make qxl reservel the vga ports using vgaargb to prevent switching to vga compatibility mode. - Fix omap port lookup for SDI output - Use virtio_max_dma_size to fix an issue with swiotlb. - Compiler fixes to komeda. - Add missing of_node_get() call in komeda. - Reorder the komeda de-init functions. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f187c28b-6279-2c4f-3e53-296ee899133b@linux.intel.com
2019-08-29drm/i915/execlists: Try rearranging breadcrumb flushChris Wilson1-11/+9
The addition of the DC_FLUSH failed to ensure sanctity of the post-sync write as CI immediately got a completion CS-event before the breadcrumb was coherent. So let's try the other idea of moving the post-sync write into the CS_STALL. References: https://bugs.freedesktop.org/show_bug.cgi?id=111514 References: e8f6b4952ec5 ("drm/i915/execlists: Flush the post-sync breadcrumb write harder") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190829081150.10271-2-chris@chris-wilson.co.uk
2019-08-29drm/i915/display: Move the commit_tail() disable sequence to separate functionManasi Navare2-34/+59
Create a new function intel_commit_modeset_disables() consistent with the naming in drm atomic helpers and similar to the enable function. This helps better organize the disable sequence in atomic_commit_tail() No functional change v4: * Do not create a function pointer, just a function (Maarten) v3: * Rebase (Manasi) v2: * Create a helper for old_crtc_state disables (Lucas) Suggested-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190828224701.422-1-manasi.d.navare@intel.com
2019-08-29drm/i915/display: Rename update_crtcs() to commit_modeset_enables()Manasi Navare2-6/+6
This patch has no functional changes. This just renames the update_crtcs() hooks to commit_modeset_enables() to match the drm_atomic helper naming conventions. v2: * Rebase on drm-tip Suggested-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190827221735.29351-2-manasi.d.navare@intel.com
2019-08-29drm/i915: s/for_each_sgt_dma/for_each_sgt_daddr/Matthew Auld5-10/+10
The sg_table for our backing store might contain addresses from stolen-memory or in the future local-memory, at which point this is no longer a dma-iterator. As a consequence we should now break on NULL iter.sgp, instead of dmap == 0 which is considered an invalid dma address. As a bonus, gcc much prefers this construct, Function old new delta gen8_ggtt_insert_entries 211 192 -19 gen6_ggtt_insert_entries 292 262 -30 i915_error_object_create 996 954 -42 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190829201919.21493-1-matthew.auld@intel.com
2019-08-29drm/amdgpu: Enable DC on RenoirRoman Li2-0/+9
Enable DC support for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add DCN2.1 changes to DMLRoman Li2-0/+23
Hook up the DML changes for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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