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2019-07-30drm/amdgpu/powerplay: add set_mp1_state for vega20Alex Deucher1-0/+29
This sets the SMU into the proper state for various operations (shutdown, unload, GPU reset, etc.). Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu/powerplay: return success if set_mp1_state is not setAlex Deucher1-5/+3
Some asics (APUs) don't have this callback so we want to return success. Avoids spurious error messages on APUs. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu/powerplay: add a new interface to set the mp1 stateAlex Deucher3-0/+25
This is required for certain cases such as various GPU resets (mode1, mode2), BACO, shutdown, unload, etc. to put the SMU into the appropriate state for when the hw is re-initialized. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add reset_method asic callback for naviAlex Deucher1-1/+14
Navi uses either mode1 or baco depending on various conditions. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add reset_method asic callback for soc15Alex Deucher1-2/+15
APUs only support mode2 reset. dGPUs use either mode1 or baco depending on various conditions. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add reset_method asic callback for viAlex Deucher1-0/+7
VI always uses the legacy pci based reset. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add reset_method asic callback for cikAlex Deucher1-0/+7
CIK always uses the legacy pci based reset. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add reset_method asic callback for siAlex Deucher1-0/+7
SI always uses the legacy pci based reset. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add an asic callback to determine the reset methodAlex Deucher1-0/+10
Sometimes the driver may have to behave differently depending on the method we are using to reset the GPU. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: enable SW SMU reset functionalityEvan Quan1-7/+9
Move SMU irq handler register to sw_init as that's totally software related. Otherwise, it will prevent SMU reset working. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: fix null pointer dereference around dpm state relatesEvan Quan2-6/+15
DPM state relates are not supported on the new SW SMU ASICs. But still it's not OK to trigger null pointer dereference on accessing them. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: minor fixes around SW SMU power and fan settingEvan Quan2-25/+21
Add checking for possible invalid input and null pointer. And drop redundant code. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/display: enable S/G for RAVEN chipShirish S2-2/+2
enables gpu_vm_support in dm and adds AMDGPU_GEM_DOMAIN_GTT as supported domain v2: Move BO placement logic into amdgpu_display_supported_domains v3: Use amdgpu_bo_validate_uswc in amdgpu_display_supported_domains. v4: amdgpu_bo_validate_uswc moved to sepperate patch. Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: Add check for USWC support for amdgpu_display_supported_domainsAndrey Grodzovsky1-1/+8
This verifies we don't add GTT as allowed domain for APUs when USWC is disabled. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: Create helper to clear AMDGPU_GEM_CREATE_CPU_GTT_USWCAndrey Grodzovsky2-26/+37
Move the logic to clear AMDGPU_GEM_CREATE_CPU_GTT_USWC in amdgpu_bo_do_create into standalone helper so it can be reused in other functions. v4: Switch to return bool. v5: Fix typos. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: Fix hard hang for S/G display BOs.Andrey Grodzovsky2-5/+5
HW requires for caching to be unset for scanout BO mappings when the BO placement is in GTT memory. Usually the flag to unset is passed from user mode but for FB mode this was missing. v2: Keep all BO placement logic in amdgpu_display_supported_domains Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Shirish S <shirish.s@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: adding xgmi error monitoringJonathan Kim1-2/+36
monitor xgmi errors via mc pie status through fica registers. Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com> Reviewed-by: Kent Russell <Kent.Russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: add perfmon and fica atomics for dfJonathan Kim2-77/+128
adding perfmon and fica atomic operations to adhere to data fabrics finite state machine requirements for indirect register access. Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com> Reviewed-by: Kent Russell <Kent.Russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdkfd: Remove dead code from gfx8/gfx9 trap handlersJay Cornwall2-764/+4
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdkfd: Replace gfx10 trap handler with correct branchJay Cornwall2-1219/+1128
Previously submitted code was taken from an incorrect branch and was non-functional. Cc: Oak Zeng <oak.zeng@amd.com> Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-By: Oak Zeng <oak.zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdkfd: Fix lost single step exceptions in gfx9 trap handlerJay Cornwall2-705/+733
If the trap is entered due to MODE.DEBUG_EN=1 and SAVECTX is raised concurrently the handler cannot identify the source of the exception. This causes the debugger to lose single step exception notification when a context save request arrives at the same time. When MODE.DEBUG_EN=1 and STATUS.HALT=0 (exception not already handled) jump to the second-level trap handler upon entering the trap. The second-level trap will set STATUS.HALT=1 and return to the shader. If SAVECTX was raised then control flow will return to the trap, which will then handle the context save request. Cc: Tony Tye <tony.tye@amd.com> Cc: Laurent Morichetti <laurent.morichetti@amd.com> Cc: Qingchuan Shi <qingchuan.shi@amd.com> Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Laurent Morichetti <laurent.morichetti@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdkfd: Use SQC when TCP would fail in gfx9 context save.Jay Cornwall2-126/+320
When a wavefront raises TRAPSTS.XNACK_ERROR with STATUS.ALLOW_REPLAY=0 subsequent memory instructions have undefined behavior. In practice SQC stores continue to work but TCP stores do not. Context save is permitted to fail after XNACK error because the wavefront will be halted and subsequently terminated. However the debugger has an interest in retrieving the wavefront VGPR/LDS state. Detect the out-of-spec case and use SQC stores during context save in place of TCP stores. Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu/gmc10: fix pte mytpe field error for navi14tiancyin2-2/+2
navi14 share same PTE format with navi10. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: tiancyin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: use VCN firmware offset for cache windowJames Zhu1-3/+0
Since we are using the signed FW now, and also using PSP firmware loading, but it's still potential to break driver when loading FW directly instead of PSP, so we should add offset. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: fix temperature granularity error in smu11Kevin Wang1-9/+9
in this patch, drm/amd/powerplay: add callback function of get_thermal_temperature_range the driver missed temperature granularity change on other temperature. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: some cosmetic fixesEvan Quan2-35/+28
Drop redundant check, duplicate check, duplicate setting and fix the return value. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: no pptable transfer and dpms enabled with "dpm=0"Evan Quan1-0/+3
Honor the 'dpm' module parameter setting on SW SMU routine as what we did on previous ASICs. SMU FW loading is still proceeded even with "dpm=0". Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/display: fix a missing null check on a failed kzallocColin Ian King1-0/+2
Currently the allocation of config may fail and a null pointer dereference on config can occur. Fix this by added a null check on a failed allocation of config. Addresses-Coverity: ("Dereference null return") Fixes: c2cd9d04ecf0 ("drm/amd/display: Hook up calls to do stereo mux and dig programming to stereo control interface") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/radeon: Use dev_get_drvdata where possibleChuhong Yuan1-10/+5
Instead of using to_pci_dev + pci_get_drvdata, use dev_get_drvdata to make code simpler. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/display: Use dev_get_drvdataChuhong Yuan1-2/+1
Instead of using to_pci_dev + pci_get_drvdata, use dev_get_drvdata to make code simpler. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdgpu: Use dev_get_drvdata where possibleChuhong Yuan1-14/+7
Instead of using to_pci_dev + pci_get_drvdata, use dev_get_drvdata to make code simpler. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/display: readd -msse2 to prevent Clang from emitting libcalls to undefined SW FP routinesNick Desaulniers4-0/+16
arch/x86/Makefile disables SSE and SSE2 for the whole kernel. The AMDGPU drivers modified in this patch re-enable SSE but not SSE2. Turn on SSE2 to support emitting double precision floating point instructions rather than calls to non-existent (usually available from gcc_s or compiler_rt) floating point helper routines for Clang. This was originally landed in: commit 10117450735c ("drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines") but reverted in: commit 193392ed9f69 ("Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines"") due to bugreports from GCC builds. Add guards to only do so for Clang. Link: https://bugs.freedesktop.org/show_bug.cgi?id=109487 Link: https://github.com/ClangBuiltLinux/linux/issues/327 Suggested-by: Sedat Dilek <sedat.dilek@gmail.com> Suggested-by: Sami Tolvanen <samitolvanen@google.com> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amdkfd: Fix byte align on VegaMKent Russell1-1/+2
This was missed during the addition of VegaM support Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/powerplay: add callback function of get_thermal_temperature_rangeKevin Wang4-30/+40
1. the thermal temperature is asic related data, move the code logic to xxx_ppt.c. 2. replace data structure PP_TemperatureRange with smu_temperature_range. 3. change temperature uint from temp*1000 to temp (temperature uint). Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/i915: make i915_selftest.h self-containedLucas De Marchi1-0/+2
Fix build breakage: In file included from <command-line>: ./drivers/gpu/drm/i915/i915_selftest.h:125:1: error: unknown type name ‘bool’ 125 | bool __igt_timeout(unsigned long timeout, const char *fmt, ...); | ^~~~ Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190730181759.26162-1-lucas.demarchi@intel.com
2019-07-30Merge tag 'for-linus-hmm' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdmaLinus Torvalds1-3/+44
Pull HMM fixes from Jason Gunthorpe: "Fix the locking around nouveau's use of the hmm_range_* APIs. It works correctly in the success case, but many of the the edge cases have missing unlocks or double unlocks. The diffstat is a bit big as Christoph did a comprehensive job to move the obsolete API from the core header and into the driver before fixing its flow, but the risk of regression from this code motion is low" * tag 'for-linus-hmm' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: nouveau: unlock mmap_sem on all errors from nouveau_range_fault nouveau: remove the block parameter to nouveau_range_fault mm/hmm: move hmm_vma_range_done and hmm_vma_fault to nouveau mm/hmm: always return EBUSY for invalid ranges in hmm_range_{fault,snapshot}
2019-07-30drm/i915/tgl: handle DP aux interruptsLucas De Marchi2-5/+14
For Tiger Lake the DE Port Interrupt Definition bits changed, so use the new bit definitions. Cc: Jose Souza <jose.souza@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190713010940.17711-7-lucas.demarchi@intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20190725234813.27179-4-lucas.demarchi@intel.com
2019-07-30drm/i915/tgl: Update north display hotplug detection to TGL connectionsJosé Roberto de Souza2-7/+56
TGL has 3 combophys and 6 TC/TBT ports, so it has 2 more TC/TBT ports than ICL and the PORT_C on TGL is a combophy. So here adding a new hpd north table and function to detect long pulse for TGL. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190713010940.17711-6-lucas.demarchi@intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20190725234813.27179-3-lucas.demarchi@intel.com
2019-07-30drm/i915/tgl: Add hpd interrupt handlingLucas De Marchi4-12/+154
Add hotdplug detection for all ports on TGP. icp_hpd_detection_setup() is refactored to be shared with TGP. While we increase the number of pins, add a BUILD_BUG_ON() to avoid going over the number of bits allowed. v2: use BITS_PER_TYPE and correct type for BUILD_BUG_ON() check (requested by Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jose Souza <jose.souza@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190725234813.27179-2-lucas.demarchi@intel.com
2019-07-30drm/i915: Update DRIVER_DATE to 20190730Rodrigo Vivi1-2/+2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2019-07-30drm/rockchip: Make analogix_dp_atomic_check staticYueHaibing1-2/+2
Fix sparse warning: drivers/gpu/drm/bridge/analogix/analogix_dp_core.c:1151:5: warning: symbol 'analogix_dp_atomic_check' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190730150057.57388-1-yuehaibing@huawei.com
2019-07-30drm/i915/gt: Provide a local intel_context.vmChris Wilson10-32/+31
Track the currently bound address space used by the HW context. Minor conversions to use the local intel_context.vm are made, leaving behind some more surgery required to make intel_context the primary through the selftests. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190730143209.4549-2-chris@chris-wilson.co.uk
2019-07-30drm/i915: Move aliasing_ppgtt underneath its i915_ggttChris Wilson7-51/+71
The aliasing_ppgtt provides a PIN_USER alias for the global gtt, so move it under the i915_ggtt to simplify later transformations to enable intel_context.vm. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190730143209.4549-1-chris@chris-wilson.co.uk
2019-07-30drm/bridge: tc358764: Fix build errorYueHaibing1-1/+2
If CONFIG_DRM_TOSHIBA_TC358764=y but CONFIG_DRM_KMS_HELPER=m, building fails: drivers/gpu/drm/bridge/tc358764.o:(.rodata+0x228): undefined reference to `drm_atomic_helper_connector_reset' drivers/gpu/drm/bridge/tc358764.o:(.rodata+0x240): undefined reference to `drm_helper_probe_single_connector_modes' drivers/gpu/drm/bridge/tc358764.o:(.rodata+0x268): undefined reference to `drm_atomic_helper_connector_duplicate_state' drivers/gpu/drm/bridge/tc358764.o:(.rodata+0x270): undefined reference to `drm_atomic_helper_connector_destroy_state' Like TC358767, select DRM_KMS_HELPER to fix this, and change to select DRM_PANEL to avoid recursive dependency. Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: f38b7cca6d0e ("drm/bridge: tc358764: Add DSI to LVDS bridge driver") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190729090520.25968-1-yuehaibing@huawei.com
2019-07-30drm/bridge: lvds-encoder: Fix build error while CONFIG_DRM_KMS_HELPER=mYueHaibing1-0/+1
If DRM_LVDS_ENCODER=y but CONFIG_DRM_KMS_HELPER=m, build fails: drivers/gpu/drm/bridge/lvds-encoder.o: In function `lvds_encoder_probe': lvds-encoder.c:(.text+0x155): undefined reference to `devm_drm_panel_bridge_add' Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: dbb58bfd9ae6 ("drm/bridge: Fix lvds-encoder since the panel_bridge rework.") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190729071216.27488-1-yuehaibing@huawei.com
2019-07-30platform: Add platform_find_device_by_driver() helperSuzuki K Poulose4-12/+6
Provide a helper to lookup platform devices by matching device driver in order to avoid drivers trying to use platform bus internals. Cc: Eric Anholt <eric@anholt.net> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: "Heiko Stübner" <heiko@sntech.de> Cc: Inki Dae <inki.dae@samsung.com> Cc: "Rafael J. Wysocki" <rafael@kernel.org> Cc: Sandy Huang <hjc@rock-chips.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20190723221838.12024-8-suzuki.poulose@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-07-30drivers: Introduce device lookup variants by of_nodeSuzuki K Poulose1-6/+1
Introduce wrappers for {bus/driver/class}_find_device() to locate devices by its of_node. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: dri-devel@lists.freedesktop.org Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: devicetree@vger.kernel.org Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Frank Rowand <frowand.list@gmail.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: linux-i2c@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-spi@vger.kernel.org Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Takashi Iwai <tiwai@suse.com> Cc: Alan Tull <atull@kernel.org> Cc: linux-fpga@vger.kernel.org Cc: Peter Rosin <peda@axentia.se> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: "Rafael J. Wysocki" <rafael@kernel.org> Cc: Thor Thayer <thor.thayer@linux.intel.com> Cc: Jiri Slaby <jslaby@suse.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Peter Rosin <peda@axentia.se> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> # I2C part Acked-by: Moritz Fischer <mdf@kernel.org> # For FPGA part Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20190723221838.12024-3-suzuki.poulose@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-07-30drm/i915: Inline engine->init_context into its callerChris Wilson7-46/+25
We only use the init_context vfunc once while recording the default context state, and we use the same sequence in each backend (eliding steps that do not apply). Remove the vfunc for simplicity and de-duplication. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190729113720.24830-1-chris@chris-wilson.co.uk
2019-07-30drm/syncobj: fix leaking dma_fence in drm_syncobj_query_ioctlChristian König1-5/+5
We need to check the context number instead if the previous sequence to detect an error and if an error is detected we need to drop the reference to the current fence or otherwise would leak it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 27b575a9aa2f ("drm/syncobj: add timeline payload query ioctl v6") Link: https://patchwork.freedesktop.org/patch/319123/
2019-07-30drm: sti: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+3
Mark switch cases where we are expecting to fall through. This patch fixes the following warning (Building: arm): drivers/gpu/drm/sti/sti_hdmi.c: In function ‘hdmi_audio_configure’: drivers/gpu/drm/sti/sti_hdmi.c:851:13: warning: this statement may fall through [-Wimplicit-fallthrough=] audio_cfg |= HDMI_AUD_CFG_CH78_VALID; drivers/gpu/drm/sti/sti_hdmi.c:852:2: note: here case 6: ^~~~ drivers/gpu/drm/sti/sti_hdmi.c:853:13: warning: this statement may fall through [-Wimplicit-fallthrough=] audio_cfg |= HDMI_AUD_CFG_CH56_VALID; drivers/gpu/drm/sti/sti_hdmi.c:854:2: note: here case 4: ^~~~ drivers/gpu/drm/sti/sti_hdmi.c:855:13: warning: this statement may fall through [-Wimplicit-fallthrough=] audio_cfg |= HDMI_AUD_CFG_CH34_VALID | HDMI_AUD_CFG_8CH; drivers/gpu/drm/sti/sti_hdmi.c:856:2: note: here case 2: ^~~~ Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190729222752.GA20277@embeddedor
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