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2019-05-24drm/amd/display: move back vbios cmd table for set dprefclkEric Yang2-0/+72
[Why] Upon closer inspection, our previous implementation is missing code for programming de-spread and DP DTO. Porting this logic into driver is rather involved, as there are a lot of table look ups. So for now move back to calling vbios cmd table [How] Go back to calling vbios cmd table for set dp_refclk Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: fix acquire_first_split_pipe functionDmytro Laktyushkin1-15/+18
This function needs to re-calculate the scaling on the pipe that loses it's half. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: stop external access to internal optc sync paramsDmytro Laktyushkin11-40/+111
These are internal otg params and should be handled as such. Thich change passes the params as function arguments. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: move signal type out of otg dlg paramsDmytro Laktyushkin3-6/+5
It makes no logical sense being there Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: reset retimer/redriver below 340MhzCharlene Liu1-4/+24
[Description] This is for HDMI 6Ghz mode before we load the driver, because VBIOS not support HDMI (6Ghz mode) Reset to redriver/retimer setting for the setting for below 340Mhz. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: color space ycbcr709 supportCharlene Liu5-5/+31
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Duke Du <Duke.Du@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: Define Byte 14 on AVI InfoFrameChris Park2-1/+11
[Why] Part of HDMI 2.1 requires AVI InfoFrame version update from current V2 to V4 for new colorimetry. [How] Define V4 AVI InfoFrame ACE0-ACE3 bit. Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: 3.2.29Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: Disable cursor when offscreen in negative directionNicholas Kazlauskas1-5/+9
[Why] When x or y is negative we set the x and y values to 0 and compensate with a positive cursor hotspot in DM since DC expects positive cursor values. When x or y is less than or equal to the maximum cursor width or height the cursor hotspot is clamped so the hotspot doesn't exceed the cursor size: if (x < 0) { xorigin = min(-x, amdgpu_crtc->max_cursor_width - 1); x = 0; } if (y < 0) { yorigin = min(-y, amdgpu_crtc->max_cursor_height - 1); y = 0; } This incorrectly forces the cursor to be at least 1 pixel on the screen in either direction when x or y is sufficiently negative. [How] Just disable the cursor when it goes far enough off the screen in one of these directions. This fixes kms_cursor_crc@cursor-256x256-offscreen. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: Fill prescale_params->scale for RGB565Nicholas Kazlauskas1-0/+3
[Why] An assertion is thrown when using SURFACE_PIXEL_FORMAT_GRPH_RGB565 formats on DCE since the prescale_params->scale wasn't being filled. Found by a dmesg-fail when running the igt@kms_plane@pixel-format-pipe-a-planes test on Baffin. [How] Fill in the scale parameter. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: Support AVI InfoFrame V3 and V4Chris Park1-2/+13
[Why] Part of HDMI 2.1 requires AVI InfoFrame version update from current V2 to V3 for new VICs, and V4 for new colorimetry. [How] Implement V3 and V4 AVI InfoFrame. If (C1, C0)=(1, 1) and (EC2, EC1, EC0)=(1, 1, 1), the Source shall use 20 AVI InfoFrame Version 4. If VIC >= 128, the Source shall use AVI InfoFrame Version 3 Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: block passive dongle EDID Emulation for USB-C portsSamson Tam4-1/+7
[Why] Emulating passive dongle on USB-C port causes issue on some asics. [How] Check for DP_IS_USB_C flag in bios parser and propagate it to encoder features flags. If DP_IS_USB_C flag is set and it is trying to emulate passive dongle, then return fail. Signed-off-by: Samson Tam <Samson.Tam@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: add SW_USE_I2C_REG request.Charlene Liu2-2/+8
[Description] This is for DC_I2c arbitration use between HW use/SW use and DMCU use. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: add support for disconnected eDP panelsJun Lei2-3/+9
[why] On some configurations, eDP from GPU is muxed with another GPU. DC does not know state of mux, but DM has this knowledge. This flag allows DC to ignore creating EDP link when DM informs DC that EDP mux is not connected. [how] Add flag to dc, populate flag in DM Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: Set dispclk and dprefclock directlyEric Yang8-23/+136
[Why] To simply logic for setting DCN specific clocks, we will send SMU message directly through the VBIOS message box. [How] Add new structure in pp_smu to hold functions to set clocks through vbios message box Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: fix multi display seamless boot caseAnthony Koo1-6/+8
[Why] There is a scenario that causes eDP to become blank if there are multiple displays connected, and the external display is set as the primary display such that the first flip comes to the external display. In this scenario, we call our optimize function before the eDP even has a chance to flip. [How] There is a check that prevents bandwidth optimize from occurring before first flip is complete on the seamless boot display. But actually it assumed the seamless boot display is the first one to flip. But in this scenario it is not. Modify the check to ensure the steam with the seamless boot flag set is the one that has completed the first flip. Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: Refactor program watermark.Yongqiang Sun2-202/+242
Refactor programming watermark function: Divided into urgent watermark, stutter watermark and pstate watermark. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/display: 3.2.28Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: rename amdgpu_prime.[ch] into amdgpu_dma_buf.[ch]Christian König7-83/+116
We are getting a dma-buf implementation completely separate from drm prime, so rename the files now and cleanup the code a bit. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/amdgpu: Add MEM_LOAD to amdgpu_pm_info debugfs fileTom St Denis1-0/+4
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdkfd: Cosmetic cleanupKent Russell9-11/+11
Fix some spacing issues, log output, uses of !=NULL/==NULL, unneeded extra lines and clean up a declaration from =1 to =true for clarity Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Fix CIK references in gmc_v8Kent Russell1-7/+7
gmc_v8 is for VI, not CIK, so fix those references Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Add PCIe replay count sysfs fileKent Russell6-0/+85
Add a sysfs file for reporting the number of PCIe replays (NAKs). This returns the sum of NAKs received and NAKs generated Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Add replay counter defines to NBIO headersKent Russell3-0/+9
Add the PCIE_RX_NUM_NACK and PCIE_RX_NUM_NACK_GENERATED values to the NBIO SMN headers in preparation for exposing the number of PCIe replays via sysfs Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Update latest xgmi topology info after each device is enumulatedshaoyunl1-12/+20
Adjust the sequence of set/get xgmi topology, so driver can have the latest XGMI topology info for future usage Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: enable separate timeout setting for every ring type V4Evan Quan5-19/+121
Every ring type can have its own timeout setting. - V2: update lockup_timeout parameter format and cosmetic fixes - V3: invalidate 0 and negative values - V4: update lockup_timeout parameter format Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: add new sysfs interface for memory realtime utilizationEvan Quan1-0/+40
A new sysfs interface mem_busy_percent is added for telling how busy the VRAM is(in percentage). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: expose SMU7 asics realtime memory utilizationEvan Quan8-1/+17
Enable realtime memory utilization report on SMU7 asics. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: expose Vega12 realtime memory utilizationEvan Quan1-2/+14
Enable realtime memory utilization report on Vega12. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: expose Vega20 realtime memory utilizationEvan Quan2-2/+15
Enable realtime memory utilization report on Vega20. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdkfd: Adjust weight to represent num_hops info when report xgmi iolinkshaoyunl2-3/+7
Upper level runtime need the xgmi hops info to determine the data path Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Implement get num of hops between two xgmi deviceshaoyunl5-18/+50
KFD need to provide the info for upper level to determine the data path Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdkfd: Expose HDP registers to user spaceOak Zeng5-3/+19
Introduce a new memory type (KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) and expose mmio page of HDP registers to user space through this new memory type. v2: moved remapped hdp regs to adev struct v3: rename the new memory type to ALLOC_MEM_FLAGS_MMIO_REMAP v4: use more generic function name v5: Fail remapped mmio allocation for asics before gfx9 Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amdgpu: Remap hdp coherency registersOak Zeng4-6/+42
Remap HDP_MEM_COHERENCY_FLUSH_CNTL and HDP_REG_COHERENCY_FLUSH_CNTL to an empty page in mmio space. We will later map this page to process space so application can flush hdp. This can't be done properly at those registers' original location because it will expose more than desired registers to process space. v2: Use explicit register hole location v3: Moved remapped hdp registers into adev struct v4: Use more generic name for remapped page Expose register offset in kfd_ioctl.h v5: Move hdp register remap function to nbio ip function v6: Fixed operator precedence issue and other bugs Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: add helper function to get smu firmware & if versionKevin Wang3-8/+46
add this helper function to get smc version. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: expose Vega12 current gpu activityEvan Quan1-15/+6
Provide the real sensor information for current gpu activity. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: expose Vega12 current powerEvan Quan1-11/+10
Provide the real sensor information for current power. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: support hwmon temperature channel labels V2Evan Quan2-1/+40
Expose temp[1-3]_label hwmon interfaces. While temp2_label and temp3_label are visible for SOC15 dGPUs only. - V2: correct temp1_label as "edge" Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: expose current hotspot and memory temperatures V2Evan Quan5-9/+90
Two new hwmon interfaces(temp2_input and temp3_input) are added. They are supported on SOC15 dGPUs only. - V2: correct thermal sensor output Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: support SMU metrics table on Vega12Evan Quan3-0/+45
That should provide some necessary sensor information. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: support temperature emergency max valuesEvan Quan8-5/+80
These new interfaces(temp1_emergency, temp2_emergency, temp3_emergency) are supported on SOC15 dGPUs only. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24drm/amd/powerplay: support hotspot/memory critical limit valuesEvan Quan8-16/+103
These new interfaces(temp2_crit, temp2_crit_hyst, temp3_crit, temp3_crit_hyst) are supported on SOC15 dGPUs only. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24Merge tag 'drm-fixes-2019-05-24-1' of git://anongit.freedesktop.org/drm/drmLinus Torvalds31-263/+326
Pull drm fixes from Dave Airlie: "Nothing too unusual here for rc2. Except the amdgpu DMCU firmware loading fix caused build breakage with a different set of Kconfig options. I've just reverted it for now until the AMD folks can rewrite it to avoid that problem. i915: - boosting fix - bump ready task fixes - GVT - reset fix, error return, TRTT handling fix amdgpu: - DMCU firmware loading fix - Polaris 10 pci id for kfd - picasso screen corruption fix - SR-IOV fixes - vega driver reload fixes - SMU locking fix - compute profile fix for kfd vmwgfx: - integer overflow fixes - dma sg fix sun4i: - HDMI phy fixes gma500: - LVDS detection fix panfrost: - devfreq selection fix" * tag 'drm-fixes-2019-05-24-1' of git://anongit.freedesktop.org/drm/drm: (32 commits) Revert "drm/amd/display: Don't load DMCU for Raven 1" drm/panfrost: Select devfreq drm/gma500/cdv: Check vbt config bits when detecting lvds panels drm/vmwgfx: integer underflow in vmw_cmd_dx_set_shader() leading to an invalid read drm/vmwgfx: NULL pointer dereference from vmw_cmd_dx_view_define() drm/vmwgfx: Use the dma scatter-gather iterator to get dma addresses drm/vmwgfx: Fix compat mode shader operation drm/vmwgfx: Fix user space handle equal to zero drm/vmwgfx: Don't send drm sysfs hotplug events on initial master set drm/i915/gvt: Fix an error code in ppgtt_populate_spt_by_guest_entry() drm/i915/gvt: do not let TRTTE and 0x4dfc write passthrough to hardware drm/i915/gvt: add 0x4dfc to gen9 save-restore list drm/i915/gvt: Tiled Resources mmios are in-context mmios for gen9+ drm/i915/gvt: use cmd to restore in-context mmios to hw for gen9 platform drm/i915/gvt: emit init breadcrumb for gvt request drm/amdkfd: Fix compute profile switching drm/amdgpu: skip fw pri bo alloc for SRIOV drm/amd/powerplay: fix locking in smu_feature_set_supported() drm/amdgpu/gmc9: set vram_width properly for SR-IOV drm/amdgpu/soc15: skip reset on init ...
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 114Thomas Gleixner1-14/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 8 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190523091650.663497195@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 102Thomas Gleixner1-13/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin st fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 50 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190523091649.499889647@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-24drm/amd/display: Don't load DMCU for Raven 1 (v2)Harry Wentland1-2/+10
[WHY] Some early Raven boards had a bad SBIOS that doesn't play nicely with the DMCU FW. We thought the issues were fixed by ignoring errors on DMCU load but that doesn't seem to be the case. We've still seen reports of users unable to boot their systems at all. [HOW] Disable DMCU load on Raven 1. Only load it for Raven 2 and Picasso. v2: Fix ifdef (Alex) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2019-05-24drm/i915: Maintain consistent documentation subsection orderingJonathan Corbet2-4/+4
With Sphinx 2.0 (or prior versions with the deprecation warnings fixed) the docs build fails with: Documentation/gpu/i915.rst:403: WARNING: Title level inconsistent: Global GTT Fence Handling ~~~~~~~~~~~~~~~~~~~~~~~~~ reST markup error: Documentation/gpu/i915.rst:403: (SEVERE/4) Title level inconsistent: I "fixed" it by changing the subsections in i915.rst, but that didn't seem like the correct change. It turns out that a couple of i915 files create their own subsections in kerneldoc comments using apostrophes as the heading marker: Layout '''''' That breaks the normal subsection marker ordering, and newer Sphinx is rather more strict about enforcing that ordering. So fix the offending comments to make Sphinx happy. (This is unfortunate, in that kerneldoc comments shouldn't need to be aware of where they might be included in the heading hierarchy, but I don't see a better way around it). Cc: stable@vger.kernel.org # v4.14+ Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-05-24drm/mcde: Add new driver for ST-Ericsson MCDELinus Walleij10-0/+3729
This adds a new DRM driver for the ST-Ericsson Multi Channel Display Engine, MCDE display controller. This hardware has three independent DSI hosts and can composit and display several memory buffers onto an LCD display. It was developed for several years inside of ST-Ericsson and shipped with a few million mobile phones from Sony and Samsung, as well as with the Snowball community development board. The driver is currently pretty rudimentary but supports a simple framebuffer so we can get penguins and graphics when using these SoCs. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190524092019.19355-1-linus.walleij@linaro.org
2019-05-24drm/msm/a6xx: Rename a6xx_gmu_probe to a6xx_gmu_initSean Paul3-3/+3
This rename makes it more clear that everything initialized in the _init function must be cleaned up in a6xx_gmu_remove. This will hopefully dissuade people from using device managed resources (for reasons laid out in the previous patch). Changes in v2: - None Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-6-sean@poorly.run
2019-05-24drm/msm/a6xx: Drop the device reference in gmuSean Paul1-3/+11
of_find_device_by_node() grabs a dev reference, so make sure we clear it on error and remove. Changes in v2: - Added to the set (Jordan) Cc: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190523171653.138678-5-sean@poorly.run
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