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2019-02-04drm: Trivial comment grammar cleanupsMatt Roper14-33/+33
Most of these are just cases where code comments used contractions (it's, who's) where they actually mean to use a possessive pronoun (its, whose) or vice-versa. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190202012326.20096-1-matthew.d.roper@intel.com
2019-02-04gpu: host1x: Set up stream ID tableThierry Reding2-0/+46
In order to enable the MMIO path stream ID protection provided by the incarnation of host1x found in Tegra186 and later, the host1x must be provided with the list of stream ID register offsets for each of its clients. Some clients (such as VIC) have multiple stream ID registers that are assumed to be contiguous. The host1x is programmed with the base offset and a limit which provide the range of registers that the host1x needs to monitor for writes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-04gpu: host1x: Represent host1x bus devices in debugfsThierry Reding1-0/+35
This new debugfs file represents the state of host1x bus devices, specifying the list of subdevices and marking which ones have successfully registered. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-04gpu: host1x: Use completion instead of semaphoreArnd Bergmann2-6/+6
In this usage, the two are completely equivalent, but the completion documents better what is going on, and we generally try to avoid semaphores these days. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-04drm/xen-front: Fix mmap attributes for display buffersOleksandr Andrushchenko1-3/+10
When GEM backing storage is allocated those are normal pages, so there is no point using pgprot_writecombine while mmaping. This fixes mismatch of buffer pages' memory attributes between the frontend and backend which may cause screen artifacts. Fixes: c575b7eeb89f ("drm/xen-front: Add support for Xen PV display frontend") Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Suggested-by: Julien Grall <julien.grall@arm.com> Acked-by: Julien Grall <julien.grall@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190129150422.19867-1-andr2000@gmail.com
2019-02-04drm/xen-front: Drop pointless static qualifier in fb_destroy()YueHaibing1-1/+1
There is no need to have the 'struct drm_framebuffer *fb' variable static since new value always be assigned before use it. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Link: https://patchwork.freedesktop.org/patch/msgid/1548504338-114487-1-git-send-email-yuehaibing@huawei.com
2019-02-04Merge tag 'drm-intel-next-2019-02-02' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie86-3417/+4753
- Make background color and LUT more robust (Matt) - Icelake display fixes (Ville, Imre) - Workarounds fixes and reorg (Tvrtko, Talha) - Enable fastboot by default on VLV and CHV (Hans) - Add another PCI ID for Coffee Lake (Rodrigo) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190202082911.GA6615@intel.com
2019-02-04Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-nextDave Airlie27-154/+239
ttm: - Replace ref/unref naming with get/put amdgpu: - Revert DC clang fix, causes a segfault with some compiler versions - SR-IOV fix - PCIE fix for vega20 - Misc DC fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201062345.7304-1-alexander.deucher@amd.com
2019-02-04Merge tag 'drm-misc-next-2019-02-01' of git://anongit.freedesktop.org/drm/drm-misc into drm-nextDave Airlie259-1225/+1963
drm-misc-next for 5.1: UAPI Changes: Cross-subsystem Changes: Core Changes: - Split out some part of drm_crtc_helper.h into drm_probe_helper.h - DRIVER_* flags improvements - New tasks on the TODO-list - Improvements to the documentation Driver Changes: - Continual of drmP.h removal in multiple drivers - Removal of FBINFO_(FLAG_)DEFAULT in multiple drivers - sun4i: Addition of the A23 support, multiple fixes for the tiled formats - atmel-hlcdc: Fix of clipping and rotation properties - qxl: various BO-related improvements, prime and generic fbdev emulation support - dw-hdmi: Support for HDMI2.0 2160p modes and YUV420 output - New Sitronix ST7701 panel driver - New Kingdisplay KD097D04 panel driver - New LeMaker BL035-RGB-002 panel driver - New PDA 91-00156-A0 panel driver Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201144749.t3abxvguhstu6bcl@flea
2019-02-03drm/vkms: Bugfix racing hrtimer vblank handleShayenne Moura1-12/+6
When the vblank irq happens, kernel time subsystem executes `vkms_vblank_simulate`. In parallel or not, it prepares all stuff necessary to the next vblank with arm, and it must flush these stuff before the next vblank irq. However, vblank counter is ahead when arm is executed in parallel with handle vblank. CPU 0: CPU 1: | | atomic_commit_tail is ongoing | | | | hrtimer: vkms_vblank_simulate() | | | drm_crtc_handle_vblank() | | drm_crtc_arm_vblank() | | | ->get_vblank_timestamp() | | | | hrtimer_forward_now() Then, we should guarantee that the vblank interval time is correct (not changed) before finish the vblank handle. Fix the bug including the call to `hrtimer_forward_now()` in the same lock of `drm_crtc_handle_vblank()` to ensure that the timestamp update is correct when finish the vblank handle. Signed-off-by: Shayenne Moura <shayenneluzmoura@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/e2e4b8f3a5cab7b2dba75bf1930f86b0a4ee08c9.1548856186.git.shayenneluzmoura@gmail.com
2019-02-03drm/vkms: Bugfix extra vblank frameShayenne Moura1-0/+3
kms_flip tests are breaking on vkms when simulate vblank because vblank event sequence count returns one extra frame after arm vblank event to make a page flip. When vblank interrupt happens, userspace processes the vblank event and issues the next page flip command. Kernel calls queue_work to call commit_planes and arm the new page flip. The next vblank picks up the newly armed vblank event and vblank interrupt happens again. The arm and vblank event are asynchronous, then, on the next vblank, we receive x+2 from `get_vblank_timestamp`, instead x+1, although timestamp and vblank seqno matches. Function `get_vblank_timestamp` is reached by 2 ways: - from `drm_mode_page_flip_ioctl`: driver is doing one atomic operation to synchronize planes in the same output. There is no vblank simulation, the `drm_crtc_arm_vblank_event` function adds 1 on vblank count, and the variable in_vblank_irq is false - from `vkms_vblank_simulate`: since the driver is doing a vblank simulation, the variable in_vblank_irq is true. Fix this problem subtracting one vblank period from vblank_time when `get_vblank_timestamp` is called from trace `drm_mode_page_flip_ioctl`, i.e., is not a real vblank interrupt, and getting the timestamp and vblank seqno when it is a real vblank interrupt. The reason for all this is that get_vblank_timestamp always supplies the timestamp for the next vblank event. The hrtimer is the vblank simulator, and it needs the correct previous value to present the next vblank. Since this is how hw timestamp registers work and what the vblank core expects. Signed-off-by: Shayenne Moura <shayenneluzmoura@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/171e6e1c239cbca0c3df7183ed8acdfeeace9cf4.1548856186.git.shayenneluzmoura@gmail.com
2019-02-02drm/i915: Update DRIVER_DATE to 20190202Rodrigo Vivi1-2/+2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2019-02-01drm/msm: subclass work object for vblank eventsJeykumar Sankaran2-56/+22
msm maintains a separate structure to define vblank work definitions and a list to track events submitted to the workqueue. We can avoid this redundant list and its protection mechanism, if we subclass the work object to encapsulate vblank event parameters. changes in v2: - subclass optimization on system wq (Sean Paul) changes in v3: - none changes in v4: - move flush_workqueue before irq uninstall changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm: clean up display threadJeykumar Sankaran2-35/+1
Since there are no clients using these threads, cleaning it up. changes in v2: - switch all the dependent clients to use system wq before removing the disp_threads (Sean Paul) changes in v3: - none changes in v4: - none changes in v5: - Rebase on latest tip with [1] (Sean Paul) [1] https://patchwork.freedesktop.org/patch/255105/ Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: use msm wq for idle power collapseJeykumar Sankaran1-18/+7
msm is using msm wq for dispatching commit and vblank events. Switch idle power collapse feature also to use msm wq to handle delayed work handlers so that msm can get rid of redundant display threads. changes in v2: - patch introduced in v2 changes in v3: - none changes in v4: - use msm wq for delayed works changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: use msm wq for vblank eventsJeykumar Sankaran2-6/+5
DPU was using one thread per display to dispatch async commits and vblank requests. Since clean up already happened in msm to use the common thread for all the display commits, display threads are only used to cater vblank requests. Since a single thread is sufficient to do the job without any performance hits, use msm workqueue to queue requests. A separate patch is submitted later in this series to remove the display threads altogether. changes in v2: - switch to system wq before removing disp threads (Sean Paul) changes in v3: - none changes in v4: - use msm wq for vblank events changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: use kthread_destroy_worker to release msm workersJeykumar Sankaran1-4/+2
use kthread_destroy_worker to destroy workers and release their associated kthreads. changes in v3: - introduced in the series changes in v4: - none changes in v5: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Change definition of RGB565 and BGR565Tanmay Shah1-2/+2
Correct definition of both formats by swapping red and blue channels v3: update commit message Signed-off-by: Tanmay Shah <tanmay@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Clean up dpu hw interruptsJayant Shekhar2-88/+0
Remove unused functions and macros from files handling dpu hardware interrupts. changes in v2: Removed clear_interrupt_status (Jordan Crouse) changes in v3: Changed commit text Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Cleanup dpu plane interfaceJayant Shekhar1-27/+0
Remove unused functions from dpu plane interface and unused variables from dpu plane state structure. Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Remove unused enum and comment from dpu mdssJayant Shekhar1-7/+0
Remove enum dpu_iommu_domain from dpu mdss as its unused. Remove unnecessary comment for variable which is already removed. Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: handle failures while initializing displaysJeykumar Sankaran1-13/+18
Bail out KMS hw init on display initialization failures with proper error logging. changes in v3: - introduced in the series changes in v4: - avoid duplicate return on errors (Sean Paul) - avoid spamming errors on failures (Jordon Crouse) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: fix documentation for intf_typeJeykumar Sankaran1-1/+1
Fix intf_type description in msm_disp_info to show that it represents drm encoder mode of the display. changes in v3: - introduced in the series changes in v4: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Convert to a chained irq chipStephen Boyd1-15/+21
Devices that make up DPU, i.e. graphics card, request their interrupts from this "virtual" interrupt chip. The interrupt chip builds upon a GIC SPI interrupt that raises high when any of the interrupts in the DPU's irq status register are triggered. From the kernel's perspective this is a chained irq chip, so requesting a flow handler for the GIC SPI and then calling generic IRQ handling code from that irq handler is not completely proper. It's better to convert this to a chained irq so that the GIC SPI irq doesn't appear in /proc/interrupts, can't have CPU affinity changed, and won't be accounted for with irq stats. Doing this also silences a recursive lockdep warning because we can specify a different lock class for the chained interrupts, silencing a warning that is easy to see with 'threadirqs' on the kernel commandline. WARNING: inconsistent lock state 4.19.10 #76 Tainted: G W -------------------------------- inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage. irq/40-dpu_mdss/203 [HC0[0]:SC0[2]:HE1:SE0] takes: 0000000053ea9021 (&irq_desc_lock_class){?.-.}, at: handle_level_irq+0x34/0x26c {IN-HARDIRQ-W} state was registered at: lock_acquire+0x244/0x360 _raw_spin_lock+0x64/0xa0 handle_fasteoi_irq+0x54/0x2ec generic_handle_irq+0x44/0x5c __handle_domain_irq+0x9c/0x11c gic_handle_irq+0x208/0x260 el1_irq+0xb4/0x130 arch_cpu_idle+0x178/0x3cc default_idle_call+0x3c/0x54 do_idle+0x1a8/0x3dc cpu_startup_entry+0x24/0x28 rest_init+0x240/0x270 start_kernel+0x5a8/0x6bc irq event stamp: 18 hardirqs last enabled at (17): [<ffffff9042385e80>] _raw_spin_unlock_irq+0x40/0xc0 hardirqs last disabled at (16): [<ffffff904237a1f4>] __schedule+0x20c/0x1bbc softirqs last enabled at (0): [<ffffff9040f318d0>] copy_process+0xb50/0x3964 softirqs last disabled at (18): [<ffffff9041036364>] local_bh_disable+0x8/0x20 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&irq_desc_lock_class); <Interrupt> lock(&irq_desc_lock_class); *** DEADLOCK *** no locks held by irq/40-dpu_mdss/203. stack backtrace: CPU: 0 PID: 203 Comm: irq/40-dpu_mdss Tainted: G W 4.19.10 #76 Call trace: dump_backtrace+0x0/0x2f8 show_stack+0x20/0x2c __dump_stack+0x20/0x28 dump_stack+0xcc/0x10c mark_lock+0xbe0/0xe24 __lock_acquire+0x4cc/0x2708 lock_acquire+0x244/0x360 _raw_spin_lock+0x64/0xa0 handle_level_irq+0x34/0x26c generic_handle_irq+0x44/0x5c dpu_mdss_irq+0x64/0xec irq_forced_thread_fn+0x58/0x9c irq_thread+0x120/0x1dc kthread+0x248/0x260 ret_from_fork+0x10/0x18 ------------[ cut here ]------------ irq 169 handler irq_default_primary_handler+0x0/0x18 enabled interrupts Cc: Sean Paul <seanpaul@chromium.org> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Jayant Shekhar <jshekhar@codeaurora.org> Cc: Rajesh Yadav <ryadav@codeaurora.org> Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: maintain hw_mdp in kmsJeykumar Sankaran3-34/+7
hw_mdp block is common for displays. No need to reserve per display. changes in v2: - use IS_ERR for error checking (Jordan Crouse) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: clean up redundant hw typeJeykumar Sankaran2-34/+16
struct dpu_hw_blk has hw block type info. Remove duplicate type tracking in struct dpu_rm_hw_blk. changes in v2: - remove redundant type in trace api's (Sean Paul) Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: remove encoder from crtc mixer structJeykumar Sankaran2-4/+0
Not actively used. Clean up the crtc mixer struct. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: clean up dpu_rm_check_property_topctl declarationJeykumar Sankaran1-8/+0
Definition was removed already. Clean up header declaration. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: remove dev from RMJeykumar Sankaran3-12/+4
Not used. Remove from RM. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: avoid tracking reservations in RMJeykumar Sankaran2-245/+43
RM was equipped with reservation tracking structure RSVP to cache HW reservation of displays for certain clients where atomic_checks (atomic commit with TEST_ONLY) for all the displays are called before their respective atomic_commits. Since DPU doesn't support the sequence anymore, clean up the support from RM. Replace rsvp with the corresponding encoder id to tag the HW blocks reserved. It prepares DPU to get rid of RM altogether and track reservations using private states. changes in v2: - none Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Correct initialization of modifiersFritz Koenig1-10/+10
allow_fb_modifiers needs to be set before drm_universal_plane_init is called. Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Initialize supported modifiersFritz Koenig1-1/+7
Pass list of supported modifiers to plane init. Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Plane helper for modifiersFritz Koenig1-0/+18
Filter planes based on the supported modifiers Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Use simple list for plane format initFritz Koenig7-154/+93
Simplify the initilization of a list of formats by passing the list in directly instead of copying it from one structure to another. Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/msm/dpu: Remove unused format tables.Fritz Koenig1-73/+0
Signed-off-by: Fritz Koenig <frkoenig@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2019-02-01drm/sun4i: tcon: Prepare and enable TCON channel 0 clock at initPaul Kocialkowski1-0/+2
When initializing clocks, a reference to the TCON channel 0 clock is obtained. However, the clock is never prepared and enabled later. Switching from simplefb to DRM actually disables the clock (that was usually configured by U-Boot) because of that. On the V3s, this results in a hang when writing to some mixer registers when switching over to DRM from simplefb. Fix this by preparing and enabling the clock when initializing other clocks. Waiting for sun4i_tcon_channel_enable to enable the clock is apparently too late and results in the same mixer register access hang. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190131132550.26355-1-paul.kocialkowski@bootlin.com
2019-02-01drm/bridge: dw-hdmi: add support for YUV420 outputNeil Armstrong1-14/+51
In order to support the HDMI2.0 YUV420 display modes, this patch adds support for the YUV420 TMDS Clock divided by 2 and the controller passthrough mode. YUV420 Synopsys PHY support will need some specific configuration table to support theses modes. This patch is based on work from Zheng Yang <zhengyang@rock-chips.com> in the Rockchip Linux 4.4 BSP at [1] [1] https://github.com/rockchip-linux/kernel/tree/release-4.4 Cc: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1549022873-40549-5-git-send-email-narmstrong@baylibre.com
2019-02-01drm/meson: add support for HDMI2.0 2160p modesNeil Armstrong1-0/+2
Now we support the TMDS Clock > 3.4GHz and support the SCDC Control operation in the DW-HDMI Controller, we can enable support for the HDMI2.0 3840x2160@60/50 RGB444 display modes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1549022873-40549-4-git-send-email-narmstrong@baylibre.com
2019-02-01drm/meson: add HDMI div40 TMDS modeNeil Armstrong1-4/+19
Add support for TMDS Clock > 3.4GHz for HDMI2.0 display modes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1549022873-40549-3-git-send-email-narmstrong@baylibre.com
2019-02-01drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling supportNeil Armstrong2-2/+84
Add support for SCDC Setup for TMDS Clock > 3.4GHz and enable TMDS Scrambling when supported or mandatory. This patch also adds an helper to setup the control bit to support the high TMDS Bit Period/TMDS Clock-Period Ratio as required with TMDS Clock > 3.4GHz for HDMI2.0 3840x2160@60/50 modes. These changes were based on work done by Huicong Xu <xhc@rock-chips.com> and Nickey Yang <nickey.yang@rock-chips.com> to support HDMI2.0 modes on the Rockchip 4.4 BSP kernel at [1] [1] https://github.com/rockchip-linux/kernel/tree/release-4.4 Cc: Nickey Yang <nickey.yang@rock-chips.com> Cc: Huicong Xu <xhc@rock-chips.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/1549022873-40549-2-git-send-email-narmstrong@baylibre.com
2019-02-01Merge back earlier PM core material for v5.1.Rafael J. Wysocki2-12/+8
2019-02-01drm/amdgpu: clean up memory/GDS/GWS/OA alignment codeMarek Olšák3-14/+15
- move all adjustments into one place - specify GDS/GWS/OA alignment in basic units of the heaps - it looks like GDS alignment was 1 instead of 4 Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-01drm/amdgpu: fix the incorrect external id for raven seriesHuang Rui1-2/+4
This patch fixes the incorrect external id that kernel reports to user mode driver. Raven2's rev_id is starts from 0x8, so its external id (0x81) should start from rev_id + 0x79 (0x81 - 0x8). And Raven's rev_id should be 0x21 while rev_id == 1. Reported-by: Crystal Jin <Crystal.Jin@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-01drm/amdgpu: Implement doorbell self-ring for NBIO 7.4Jay Cornwall1-0/+13
Fixes doorbell reflection on Vega20. Change-Id: I0495139d160a9032dff5977289b1eec11c16f781 Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-01drm/amd/display: Fix fclk idle stateRoman Li1-1/+9
[Why] The earlier change 'Fix 6x4K displays' led to fclk value idling at higher DPM level. [How] Apply the fix only to respective multi-display configuration. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-01Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-nextDave Airlie24-7/+2183
This pull includes the new Arm "komeda" DRM driver. It is currently hosted in the same repo as the other "mali-dp" driver because it is the next iteration of the IP. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Liviu Dudau <Liviu.Dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190131173600.GN25147@e110455-lin.cambridge.arm.com
2019-02-01Merge tag 'drm-intel-next-2019-01-24' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie119-4088/+4993
- Track all runtime-PM wakerefs and other rpm improvements (Chris) - Fix ILK-IVB primary plane enable delays (Juha-Pekka) - Differentiate between gtt->mutex and ppgtt->mutex (Chris) - Prevent concurrent GGTT update and use on Braswell (Chris) - Fix CNL macros for DDI vswing (Aditya) - Fix static code analysis warning (RK) - Only dump GPU state on set-wedged if interesting (Chris) - Port F detection improvements (Imre) - userptr mutex lock fixes (Chris) - Fix on MST allocation by propagating error value at compute_config (Lyude) - Serialise concurrent calls to set_wedge (Chris) - Unify reset functionality into i915_reset.c (Chris) - Switch to kernel fixed size types (Jani) - Limit the for_each_set_bit to the valid range (Chris) - Fix wakeref cooie handling (Tvrtko) - IRQs handling improvements (Chris) - Selftests improvements (Chris) - Remove superfluous PANEL_POWER_OFF macro (Jani) - Global seqno fix (Chris) - DSI fixes (Hans) - Refactor out intel_context_init() (Chris) - Show all active engines on hangcheck (Chris) - PSR2 fixes and improvements (Jose) - Do a posting read after irq install on Ice Lake (Daniele) - Add few more device IDs for Ice Lake (Rodrigo) - Mark up priority boost on preemption (Chris) - Add color management LUT validation helper (Matt) - Split out intel_crt_present to platform specific setup (Jani) - LVDS and TV clean up and improvements (Jani) - Simplify CRT VBT check for per-VLV/DDI (Jani) - De-inline intel_context_init() (Chris) - Backlight fixes (Maarten) - Enable fastset for non-boot modesets (Maarten) - Make HW readout mark CRTC scaler as in use (Maarten) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190128181000.GA5284@intel.com
2019-02-01Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux into drm-nextDave Airlie251-18699/+6533
New stuff for 5.1. amdgpu: - DC bandwidth formula updates - Support for DCC on scanout surfaces - Support for multiple IH rings on soc15 asics - Fix xgmi locking - Add sysfs interface to get pcie usage stats - Simplify DC i2c/aux code - Initial support for BACO on vega10/20 - New runtime SMU feature debug interface - Expand existing sysfs power interfaces to new clock domains - Handle kexec properly - Simplify IH programming - Rework doorbell handling across asics - Drop old CI DPM implementation - DC page flipping fixes - Misc SR-IOV fixes amdkfd: - Simplify the interfaces between amdkfd and amdgpu ttm: - Add a callback to notify the driver when the lru changes sched: - Refactor mirror list handling - Rework hw fence processing Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190125231517.26268-1-alexander.deucher@amd.com
2019-01-31drm/i915/cfl: Adding another PCI Device ID.Rodrigo Vivi1-0/+1
While cross checking PCI IDs from Intel Media SDK and kernel Dmitry noticed this gap. So we checked the spec and this new ID had been recently added. v2: Adding new H_GT1 entry to i915_pci.c (Jose) Reported-by: Dmitry Rogozhkin<dmitry.v.rogozhkin@intel.com> Cc: Dmitry Rogozhkin<dmitry.v.rogozhkin@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201235049.27206-1-rodrigo.vivi@intel.com
2019-02-01Merge tag 'gvt-next-2019-02-01' of https://github.com/intel/gvt-linux into drm-intel-next-queuedRodrigo Vivi8-6/+233
gvt-next-2019-02-01 - new VFIO EDID region support (Henry) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> From: Zhenyu Wang <zhenyuw@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201061523.GE5588@zhen-hp.sh.intel.com
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