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2018-08-07drm/i2c: tda998x: correct PLL divider calculationRussell King1-6/+14
The serializer PLL divider is a power-of-two divider, so our calculation which assumes that it's a numerical divider is incorrect. Replace it with one that results in a power-of-two divider value instead. Tested with all supported modes with a Samsung S24C750. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i2c: tda998x: get rid of private fill_modes functionRussell King1-24/+6
We can achieve the same effect via the get_modes() method, rather than wrapping the fill_modes helper. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i2c: tda998x: move mode_valid() to bridgeRussell King1-16/+16
Move the mode_valid() implementation to the bridge instead of the connector, as we're checking the bridge's capabilities. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i2c: tda998x: register bridge outside of component helperRussell King1-13/+13
Register the bridge outside of the component helper as we have drivers that wish to use the tda998x without its encoder. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i2c: tda998x: cleanup from previous changesRussell King1-39/+37
Cleanup the code a little from the effects of the previous changes: - Move tda998x_destroy() to be above tda998x_create() - Use 'dev' directly in tda998x_create() where appropriate. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i2c: tda998x: allocate tda998x_priv inside tda998x_create()Russell King1-14/+16
Move the tda998x_priv allocation inside tda998x_create() and simplify the tda998x_create()'s arguments. Pass the same to tda998x_destroy(). Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i2c: tda998x: convert to bridge driverRussell King1-75/+81
Convert tda998x to a bridge driver with built-in encoder support for compatibility with existing component drivers. Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-08-07drm/i915/skl: distribute DDB based on panel resolutionMahesh Kumar1-15/+40
We distribute DDB equally among all pipes irrespective of display buffer requirement of each pipe. This leads to a situation where high resolution y-tiled display can not be enabled with 2 low resolution displays. Main contributing factor for DDB requirement is width of the display. This patch make changes to distribute ddb based on display width. So display with higher width will get bigger chunk of DDB. Changes Since V1: - pipe_size/ddb_size will not overflow u16 so use appropriate data-types during computation (Chris) Changes Since V2: - avoid redundancy and possible truncation errors (Chris) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107113 Cc: raviraj.p.sitaram@intel.com Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180801151113.5337-1-mahesh1.kumar@intel.com
2018-08-07drm/i915: ddb_size is of u16 typeMahesh Kumar1-6/+6
ddb_size is u16 so use same return type for intel_get_ddb_size wrapper. Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180731142445.30723-2-mahesh1.kumar@intel.com
2018-08-07drm/i915/kvmgt: fix an error code in gvt_dma_map_page()Dan Carpenter1-3/+3
The dma_mapping_error() returns true on error but we want to return -ENOMEM here. Fixes: 79e542f5af79 ("drm/i915/kvmgt: Support setting dma map for huge pages") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-08-07drm/i915/gvt: Move some MMIO definitions to reg.hZhenyu Wang2-13/+9
To consolidate all gvt private MMIO definition in one place, this moves some not yet used in i915 to reg.h. Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-08-07drm/i915/gvt: Fix function comment doc errorsZhenyu Wang10-8/+37
Caught by W=1 to fix left wrong function comment doc. Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-08-07drm/i915/gvt: make dma map/unmap kvmgt functions as staticZhenyu Wang1-2/+2
Make kvmgt_dma_map/unmap_guest_page as static function. Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2018-08-06drm/scheduler: fix timeout worker setup for out of order job completionsLucas Stach1-13/+17
drm_sched_job_finish() is a work item scheduled for each finished job on a unbound system workqueue. This means the workers can execute out of order with regard to the real hardware job completions. If this happens queueing a timeout worker for the first job on the ring mirror list is wrong, as this may be a job which has already finished executing. Fix this by reorganizing the code to always queue the worker for the next job on the list, if this job hasn't finished yet. This is robust against a potential reordering of the finish workers. Also move out the timeout worker cancelling, so that we don't need to take the job list lock twice. As a small optimization list_del is used to remove the job from the ring mirror list, as there is no need to reinit the list head in the job we are about to free. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: display connected to dp-1 does not light upHersen Wu3-0/+7
[why] for vega, dp set_panel_mode is handled by psp firmware. dal should not program the register again. [how] dal does not program panel mode. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: update clk for various HDMI color depthsMikita Lipski1-0/+18
[why] When programming tonga's connector's backend we didn't take in account that HDMI's colour depth might be more than 8bpc therefore we need to add a switch statement that would adjust the pixel clock accordingly. [how] Add a switch statement updating clock by its appropriate coefficient. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-08-06drm/amd/display: program display clock on cache matchDmytro Laktyushkin2-1/+5
[Why] We seem to have an issue where high enough display clock will not get set properly during S3 resume if we only call vbios once [How] Expand condition of display clock programming to happen even when cached display clock matches requested display clock Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Add NULL check for enabling dp ssNicholas Kazlauskas1-1/+3
[Why] The pointer for integrated_info can be NULL which causes the system to do a null pointer deference and hang on boot. [How] Add a check to ensure that integrated_info is not null before enabling DP ss. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: add vbios table check for enabling dp ssDmytro Laktyushkin4-1/+8
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Don't share clk source between DP and HDMIMikita Lipski4-2/+26
[why] Prevent clock source sharing between HDMI and DP connectors. DP shouldn't be sharing its ref clock with phy clock, which caused an issue of older ASICS booting up with multiple diplays plugged in. [how] Add an extra check that would prevent HDMI and DP sharing clk. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-08-06drm/amd/display: Fix DP HBR2 Eye Diagram Pattern on CarrizoHersen Wu3-5/+6
[why] dp hbr2 eye diagram pattern for raven asic is not stabled. workaround is to use tp4 pattern. But this should not be applied to asic before raven. [how] add new bool varilable in asic caps. for raven asic, use the workaround. for carrizo, vega, do not use workaround. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Use calculated disp_clk_khz value for dce110Nicholas Kazlauskas2-4/+4
[Why] The calculated values for actual disp_clk_khz were ignored when notifying pplib of the new display requirements. In order to honor DFS bypass clocks from the hardware, the calculated value should be used. [How] The return value for set_dispclk is now assigned back into new_clocks and correctly carried through into dccg->clks.phyclk_khz. When notifying pplib of new display requirements dccg->clks.phyclk_khz is used instead of dce.dispclk_khz. The value of dce.dispclk_khz was never explicitly set to anything before. A 15% higher display clock value than calculated is no longer requested for dce110 since it now makes use of the calculated value. Since dce112 makes use of dce110's set_bandwidth but not its update_clocks it needs to have the value correctly carried through. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Implement custom degamma lut on dcnDavid Francis4-15/+46
[Why] Custom degamma lut functions are a feature we would like to support on compatible hardware [How] In atomic check, convert from array of drm_color_lut to dc_transfer_func. On hardware commit, allow for possibility of custom degamma. Both are based on the equivalent regamma pipeline. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Destroy aux_engines only onceDavid Francis1-3/+0
[Why] In the dce112 function to destroy the resource pool, engines (the aux engines) is destroyed twice. This has no ill effects but is a tad redundant. [How] Remove the redundant call Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Read back max backlight value at bootDavid Francis1-0/+1
[Why] If there is no program explicitly setting the backlight brightness (for example, during a minimal install of linux), the hardware defaults to maximum brightness but the backlight_device defaults to 0 value. Thus, settings displays the wrong brightness value. [How] When creating the backlight device, set brightness to max Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: Implement backlight_ops.get_brightnessDavid Francis3-1/+17
[Why] This hook that is supposed to read the actual backlight value is used in a few places throughout the kernel to setup or force update on backlight [How] Create a dc function that calls the existing abm function, and call that function from amdgpu Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/amd/display: DP Compliance 400.1.1 failureabdoulaye berthe1-26/+28
[Why] 400.1.1 is failing because we are not performing link training when we get an HPD pulse for the same display. This is breaking DP compliance [How] Always perform link training after HPD pulse if the detection reason is not DETECT_REASON_HPDRX. Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_startChris Wilson1-5/+6
Experience teaches us over and over again that coherency on Baytrail requires the odd heavy hammer, and in particular clflush alone is not enough to guarrantee that writes from the CPU are picked up by the CS. Do as we do elsewhere and ensure we have an unconditional i915_gem_chipset_flush() after writing to memory and submitting a batch to HW. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180806144604.8346-1-chris@chris-wilson.co.uk
2018-08-06drm/amd/display: Use requested HDMI aspect ratioLeo (Sunpeng) Li1-7/+2
[Why] The DRM mode's HDMI picture aspect ratio field was never saved in dc_stream's timing struct. This causes us to mistake a new stream to have the same timings as the old, even though the user has requested a different aspect ratio. [How] Save DRM's aspect ratio field within dc_stream's timing struct. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=107153 Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-08-06drm/i915/kvmgt: Fix compilation errorMichał Winiarski1-6/+0
gvt_pin_guest_page extracted some of the gvt_dma_map_page functionality: commit 79e542f5af79 ("drm/i915/kvmgt: Support setting dma map for huge pages") And yet, part of it was reintroduced in: commit 39b4cbadb9a9 ("drm/i915/kvmgt: Check the pfn got from vfio_pin_pages") Causing kvmgt part to no longer build. Let's remove it. Reported-by: Tomasz Lis <tomasz.lis@intel.com> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Changbin Du <changbin.du@intel.com> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180712155330.32055-1-michal.winiarski@intel.com (cherry picked from commit 4eaf317a60fbea0555b936035002ca9bd9b9105d) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-08-06drm/i915/lpe: Mark LPE audio runtime pm as "no callbacks"Chris Wilson1-3/+1
The LPE audio is a child device of i915, it is powered up and down alongside the igfx and presents no independent runtime interface. This aptly fulfils the description of a "No-Callback" Device, so mark it thus. Fixes: 183c00350ccd ("drm/i915: Fix runtime PM for LPE audio") Testcase: igt/pm_rpm/basic-pci-d3-state Testcase: igt/pm_rpm/basic-rte Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Takashi Iwai <tiwai@suse.de> Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: stable@vger.kernel.org Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180802140416.6062-1-chris@chris-wilson.co.uk (cherry picked from commit 46e831abe864a6b59fa3de253a681c0f2ee1bf2f) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-08-06Revert "drm/i915/icl: WaEnableFloatBlendOptimization"Mika Kuoppala2-6/+0
The register for 0xe420 is unable to hold any value, including this bit. The documentation is also mixed between having a register bit for toggle and having a state command setup for it. Apparently the register toggle is deprecated. Remove the register toggle as evidence shows it's futile. The thing remaining is an apology and humble request for Mesa folks to resurrect their state setup for this as they were on right track from start. This reverts commit 0bf059f3532bb39c52d917142206a8554fc2f1c5. Fixes: 0bf059f3532b ("drm/i915/icl: WaEnableFloatBlendOptimization") References: HSDES#1406393558 Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Anuj Phogat <anuj.phogat@gmail.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180730120636.26958-1-mika.kuoppala@linux.intel.com (cherry picked from commit c358514ba8da9e235876db1628cedd19a35803c6) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-08-06drm/i915: Interactive RPS modeChris Wilson6-45/+111
RPS provides a feedback loop where we use the load during the previous evaluation interval to decide whether to up or down clock the GPU frequency. Our responsiveness is split into 3 regimes, a high and low plateau with the intent to keep the gpu clocked high to cover occasional stalls under high load, and low despite occasional glitches under steady low load, and inbetween. However, we run into situations like kodi where we want to stay at low power (video decoding is done efficiently inside the fixed function HW and doesn't need high clocks even for high bitrate streams), but just occasionally the pipeline is more complex than a video decode and we need a smidgen of extra GPU power to present on time. In the high power regime, we sample at sub frame intervals with a bias to upclocking, and conversely at low power we sample over a few frames worth to provide what we consider to be the right levels of responsiveness respectively. At low power, we more or less expect to be kicked out to high power at the start of a busy sequence by waitboosting. Prior to commit e9af4ea2b9e7 ("drm/i915: Avoid waitboosting on the active request") whenever we missed the frame or stalled, we would immediate go full throttle and upclock the GPU to max. But in commit e9af4ea2b9e7, we relaxed the waitboosting to only apply if the pipeline was deep to avoid over-committing resources for a near miss. Sadly though, a near miss is still a miss, and perceptible as jitter in the frame delivery. To try and prevent the near miss before having to resort to boosting after the fact, we use the pageflip queue as an indication that we are in an "interactive" regime and so should sample the load more frequently to provide power before the frame misses it vblank. This will make us more favorable to providing a small power increase (one or two bins) as required rather than going all the way to maximum and then having to work back down again. (We still keep the waitboosting mechanism around just in case a dramatic change in system load requires urgent uplocking, faster than we can provide in a few evaluation intervals.) v2: Reduce rps_set_interactive to a boolean parameter to avoid the confusion of what if they wanted a new power mode after pinning to a different mode (which to choose?) v3: Only reprogram RPS while the GT is awake, it will be set when we wake the GT, and while off warns about being used outside of rpm. v4: Fix deferred application of interactive mode v5: s/state/interactive/ v6: Group the mutex with its principle in a substruct Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107111 Fixes: e9af4ea2b9e7 ("drm/i915: Avoid waitboosting on the active request") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180731132629.3381-1-chris@chris-wilson.co.uk (cherry picked from commit 60548c554be2830d29d2533dad0ac8133347ee51) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-08-06drm/i915: Fix psr sink status report.Rodrigo Vivi1-2/+11
First of all don't try to read dpcd if PSR is not even supported. But also, if read failed return -EIO instead of reporting via a backchannel. v2: fix dev_priv: At this level m->private is the connector. (CI/DK) don't convert dpcd read errors to EIO. (DK) Fixes: 5b7b30864d1d ("drm/i915/psr: Split sink status into a separate debugfs node") Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180720003155.16290-1-rodrigo.vivi@intel.com (cherry picked from commit 7a72c78bdd0a1ea1d879610542679cc680398220) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-08-06drm/i915: Stop dropping irq around resetsChris Wilson1-3/+0
A long time ago, we were afraid of handling interrupts and signaling waiters during a reset, worrying that the confusion in request handling would interfere with our attempts to process the reset in an orderly fashion. Since then, we have isolated our irq-driven request handling by virtue of the engine->timeline.lock and control of kthreads where required, eliminating the danger of concurrently processing interrupts. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180806145647.13131-1-chris@chris-wilson.co.uk
2018-08-06drm/i915: kill resource streamer supportLucas De Marchi8-33/+9
After disabling resource streamer on ICL (due to it actually not existing there), I got feedback that there have been some experimental patches for mesa to use RS years ago, but nothing ever landed or shipped because there was no performance improvement. This removes it from kernel keeping the uapi defines around for compatibility. v2: - re-add the inadvertent removal of CTX_CTRL_INHIBIT_SYN_CTX_SWITCH - don't bother trying to document removed params on uapi header: applications should know that from the query. (from Chris) v3: - disable CTX_CTRL_RS_CTX_ENABLE istead of removing it - reword commit message after Daniele confirmed no performance regression on his machine - reword commit message to make clear RS is being removed due to never been used v4: - move I915_EXEC_RESOURCE_STREAMER to __I915_EXEC_ILLEGAL_FLAGS so the check on ioctl() is made much earlier by i915_gem_check_execbuffer() (suggested by Tvrtko) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180803232443.17193-1-lucas.demarchi@intel.com
2018-08-06drm/i915/icl: move has_resource_streamer to GEN11_FEATURESLucas De Marchi2-2/+2
Resource streamer has been removed on GEN11 so move it to the FEATURES macro. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180719170557.10729-1-lucas.demarchi@intel.com
2018-08-06drm/etnaviv: fix crash in GPU suspend when init failed due to buffer placementLucas Stach1-0/+1
When the suballocator was unable to provide a suitable buffer for the MMUv1 linear window, we roll back the GPU initialization. As the GPU is runtime resumed at that point we need to clear the kernel cmdbuf suballoc entry to properly skip any attempt to manipulate the cmdbuf when the GPU gets shut down in the runtime suspend later on. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2018-08-06drm/etnaviv: change return type to vm_fault_tSouptick Joarder2-29/+11
Use new return type vm_fault_t for fault handler. For now, this is just documenting that the function returns a VM_FAULT value rather than an errno. Once all instances are converted, vm_fault_t will become a distinct type. Ref- commit 1c8f422059ae ("mm: change return type to vm_fault_t") Previously vm_insert_page() returns err which driver mapped into VM_FAULT_* type. The new function vmf_insert_page() will replace this inefficiency by returning VM_FAULT_* type. vmf_error() is the newly introduce inline function in 4.17-rc6. Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Reviewed-by: Matthew Wilcox <mawilcox@microsoft.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2018-08-06drm/etnaviv: protect sched job submission with fence mutexLucas Stach4-11/+21
The documentation of drm_sched_job_init and drm_sched_entity_push_job has been clarified. Both functions should be called under a shared lock, to avoid jobs getting pushed into the scheduler queue in a different order than their sched_fence seqnos, which will confuse checks that are looking at the seqnos to infer information about completion order. Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2018-08-06drm/etnaviv: mmuv2: use memset32 to init scratch pagePhilipp Zabel1-5/+4
Replace the open-coded scratch page initialization loop with memset32 Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2018-08-06drm: rcar-du: Use __drm_atomic_helper_plane_reset instead of copying the logicAlexandru Gheorghe2-8/+3
A new helper function(__drm_atomic_helper_plane_reset) has been added for linking a plane with its state and resetting the core properties(alpha, rotation, etc.) to their default values. Use that instead of duplicating the logic. __drm_atomic_helper_plane_reset initializes the alpha property to its max value, which is defined by the drm core as DRM_BLEND_ALPHA_OPAQUE, so nothing changes regarding the alpha value. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-8-alexandru-cosmin.gheorghe@arm.com
2018-08-06drm/sun4i: Use __drm_atomic_helper_plane_reset instead of copying the logicAlexandru Gheorghe1-3/+1
A new helper function(__drm_atomic_helper_plane_reset) has been added for linking a plane with its state and resetting the core properties(alpha, rotation, etc.) to their default values. Use that instead of duplicating the logic. __drm_atomic_helper_plane_reset initializes the alpha property to its max value, which is defined by the drm core as DRM_BLEND_ALPHA_OPAQUE, so nothing changes regarding the alpha value. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-9-alexandru-cosmin.gheorghe@arm.com
2018-08-06drm/imx: Use __drm_atomic_helper_plane_reset instead of copying the logicAlexandru Gheorghe1-6/+3
A new helper function(__drm_atomic_helper_plane_reset) has been added for linking a plane with its state and resetting the core properties(alpha, rotation, etc.) to their default values. Use that instead of duplicating the logic. Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-7-alexandru-cosmin.gheorghe@arm.com
2018-08-06drm: atmel-hlcdc: Use __drm_atomic_helper_plane_reset instead of copying the logicAlexandru Gheorghe1-4/+1
A new helper function(__drm_atomic_helper_plane_reset) has been added for linking a plane with its state and resetting the core properties(alpha, rotation, etc.) to their default values. Use that instead of duplicating the logic. __drm_atomic_helper_plane_reset initializes the alpha property to its max value, which is defined by the drm core as DRM_BLEND_ALPHA_OPAQUE, so nothing changes regarding the alpha value. Acked-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-5-alexandru-cosmin.gheorghe@arm.com
2018-08-06drm: mali-dp: Use __drm_atomic_helper_plane_reset instead of copying the logicAlexandru Gheorghe1-5/+2
A new helper function(__drm_atomic_helper_plane_reset) has been added for linking a plane with its state and resetting the core properties(alpha, rotation, etc.) to their default values. Use that instead of duplicating the logic. Reviewed-by: Ayan Kumar halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-4-alexandru-cosmin.gheorghe@arm.com
2018-08-06drm/atomic: Add __drm_atomic_helper_plane_resetAlexandru Gheorghe1-9/+24
There are a lot of drivers that subclass drm_plane_state, all of them duplicate the code that links together the plane with plane_state. On top of that, drivers that enable core properties also have to duplicate the code for initializing the properties to their default values, which in all cases are the same as the defaults from core. Change since v1: - Make it consistent with the other helpers and require that both plane and state not be NULL, suggested by Boris Brezillon and Philipp Zabel. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/20180804161530.12275-2-alexandru-cosmin.gheorghe@arm.com
2018-08-05Merge 4.18-rc7 into master to pick up the KVM dependcyThomas Gleixner114-742/+1505
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2018-08-05drm/msm/adreno: Remove VLA usageKees Cook2-11/+24
In the quest to remove all stack VLA usage from the kernel[1], this switches to using a kasprintf()ed buffer. Return paths are updated to free the allocation. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-05x86: Don't include linux/irq.h from asm/hardirq.hNicolai Stange2-0/+2
The next patch in this series will have to make the definition of irq_cpustat_t available to entering_irq(). Inclusion of asm/hardirq.h into asm/apic.h would cause circular header dependencies like asm/smp.h asm/apic.h asm/hardirq.h linux/irq.h linux/topology.h linux/smp.h asm/smp.h or linux/gfp.h linux/mmzone.h asm/mmzone.h asm/mmzone_64.h asm/smp.h asm/apic.h asm/hardirq.h linux/irq.h linux/irqdesc.h linux/kobject.h linux/sysfs.h linux/kernfs.h linux/idr.h linux/gfp.h and others. This causes compilation errors because of the header guards becoming effective in the second inclusion: symbols/macros that had been defined before wouldn't be available to intermediate headers in the #include chain anymore. A possible workaround would be to move the definition of irq_cpustat_t into its own header and include that from both, asm/hardirq.h and asm/apic.h. However, this wouldn't solve the real problem, namely asm/harirq.h unnecessarily pulling in all the linux/irq.h cruft: nothing in asm/hardirq.h itself requires it. Also, note that there are some other archs, like e.g. arm64, which don't have that #include in their asm/hardirq.h. Remove the linux/irq.h #include from x86' asm/hardirq.h. Fix resulting compilation errors by adding appropriate #includes to *.c files as needed. Note that some of these *.c files could be cleaned up a bit wrt. to their set of #includes, but that should better be done from separate patches, if at all. Signed-off-by: Nicolai Stange <nstange@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>