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2017-09-12drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_fan_speed_rpm()Tom St Denis1-5/+5
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Fix indentation in vega10_fan_ctrl_reset_fan_speed_to_default()Tom St Denis1-8/+4
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_fan_speed_percent()Tom St Denis1-6/+4
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_default_mode()Tom St Denis1-7/+6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_static_mode()Tom St Denis1-12/+9
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Tidy up vega10_fan_ctrl_get_fan_speed_rpm()Tom St Denis1-5/+6
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Port vega10_thermal.c over to PP_CAPTom St Denis1-11/+5
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Port vega10_powertune.c over to PP_CAPTom St Denis1-25/+22
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Port vega10_hwmgr.c over to PP_CAPTom St Denis1-59/+32
Replace and cleanup lengthy phm_cap_enabled() sequences with PP_CAP. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Add PP_CAP() macroTom St Denis1-0/+2
To replace common lengthy sequence that would create really long lines all over. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Port vega10_didt_set_mask() to new macrosTom St Denis1-40/+20
Start using new CGS bitmask macros. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Introduction of bitmask macros for registersTom St Denis1-0/+16
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Simplify vega10_acg_disable()Tom St Denis1-6/+4
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Simplify vega10_patch_voltage_dependency_tables_with_lookup_table()Tom St Denis1-52/+23
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: fix VM sync with always valid BOs v2Christian König3-10/+17
All users of a VM must always wait for updates with always valid BOs to be completed. v2: remove debugging leftovers, rename struct member Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: enable raven to load firmwares by psp at default (v2)Evan Quan2-7/+1
- v2: share code with CHIP_VEGA10 case Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: stop psp ring on suspendEvan Quan2-0/+11
Otherwise, the ring will fail to create on next resume. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: added api for stopping psp ring (v2)Evan Quan6-2/+36
- v2: reuse the ring stop api in ring destory Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: fixed raven psp cmd prepare and submitEvan Quan1-7/+9
- fw_size in psp_v10_0_prep_cmd_buf is wrongly set as 0 - fixed the wrong calculation of psp_write_ptr_reg in psp_v10_0_cmd_submit Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: move MMU notifier related defines to amdgpu_mn.hChristian König2-24/+53
Just some cleanup. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: move amdgpu_ttm_tt_* declarations into amdgpu_ttm.hChristian König2-15/+16
Just some cleanup. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: keep the MMU lock until the update ends v4Christian König2-6/+57
This is quite controversial because it adds another lock which is held during page table updates, but I don't see much other option. v2: allow multiple updates to be in flight at the same time v3: simplify the patch, take the read side only once v4: correctly fix rebase conflict Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: rework amdgpu_cs_find_mappingChristian König4-32/+30
Use the VM instead of the BO list to find the BO for a virtual address. This fixes UVD/VCE in physical mode with VM local BOs. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: move amdgpu_cs_sysvm_access_required into find_mappingChristian König4-63/+36
When we need to find the mapping we need sysvm access anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/ttm: allow mapping BOs while they are still on the swap listChristian König1-1/+0
With shared reservation objects it is possible that we want to temporary kmap an BO while it is still on the swap list. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: stop reserving the BO in the MMU callback v3Christian König3-15/+56
Instead take the callback lock during the final parts of CS. This should solve the last remaining locking order problems with BO reservations. v2: rebase, make dummy functions static inline v3: add one more missing inline and comments Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: use a rw_semaphore for MMU notifiersChristian König1-13/+13
Allow at least some parallel processing. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: move userptr BOs to CPU domain during CS v2Christian König4-12/+27
Instead of moving them in the MMU notifier move them during CS. v2: still mark pages as accessed/dirty Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: stop using BO status for user pagesChristian König3-4/+22
Instead use a counter to figure out if we need to set new pages or not. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: move taking mmap_sem into get_user_pages v2Christian König3-16/+8
This didn't helped as intended, just simplify the code. v2: unlock mmap_sem in the error path as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: Account for shadow PTs in mapping update IB size.Bas Nieuwenhuizen1-2/+4
When amdgpu_vm_frag_ptes calls amdgpu_vm_update_ptes and the pt has a shadow PT we mirror all the write to the shadow PT too, which results in twice the commands. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/ttm: fix ttm_bo_cleanup_refs_or_queue once moreChristian König1-15/+17
With shared reservation objects __ttm_bo_reserve() can easily fail even on destroyed BOs. This prevents correct handling when we need to individualize the reservation object. Fix this by individualizing the object before even trying to reserve it. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: revert "fix deadlock of reservation between cs and gpu reset v2"Christian König1-4/+0
This reverts commit 10e709cb296c98424c03408d23e3addeddcd4088. The patch doesn't work at all: 1. The CS can still be blocked because of amdgpu_ctx_add_fence(). 2. The order of submission isn't correct any more. 3. We could end up using freed up memory because we now drop the ctx reference to early. This needs to be fixed cleanly by doing the context handling after the BO handling, but this is a larger task just avoid the obvious crashes for now. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu monk.liu@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: Fix psm_set_user_performance_state()Tom St Denis3-7/+7
We now pass a pointer to a pointer which seems to be what they meant in the first place. The previous version was modifying a pointer passed by value. Fixes bug that was introduced by commit 332798d40c2e91:drm/amd/powerplay: delete eventmgr layer in poweprlay Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-By: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: fix userptr put_page handlingChristian König3-5/+16
Move calling put_page into the unpopulate callback. Otherwise we mess up the pages reference count when it is unbound multiple times. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/ttm: Fix configuration error around populate_and_map() functionsTom St Denis1-0/+2
Fixed kbuild errors when IOMMU/SWIOTLB are disabled. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amdgpu: fix wait_any_fenceMonk Liu1-0/+1
first is incorrect if hit NULL/signaled fence Signed-off-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: set uvd/vce/nb/mclk level as UMD P-state requiredRex Zhu1-3/+9
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: add UMD P-state in powerplay.Rex Zhu5-132/+66
This feature is for UMD to run benchmark in a power state that is as steady as possible. kmd need to fix the power state as stable as possible. now, kmd support four level: profile_standard,peak,min_sclk,min_mclk move common related code to amd_powerplay.c Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: delete eventmgr related files.Rex Zhu16-2405/+0
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/amd/powerplay: delete eventmgr layer in poweprlayRex Zhu13-282/+475
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12drm/i915/spt+: Don't reset invalid AUX channel interrupt bits in SDEIMRDhinakaran Pandiyan1-1/+3
The SDE interrupt bits 25, 26 and 27 are either reserved or meant for DDI E hotplug in SPT+. These bits are meant for AUX channels only in LPT and CPT, so add the appropriate checks. Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170909004255.14827-1-dhinakaran.pandiyan@intel.com
2017-09-12drm/i915: Name the IPS_PCODE_CONTROL bitVille Syrjälä2-1/+4
Give a name to the bit which tells pcode to control IPS. v2: Note that IPS_CTL bits apply to DISPLAY_IPS_CONTROL as well (Chris) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170912153411.20171-2-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-09-12drm/i915: Nuke some bogus tabs from the pcode definesVille Syrjälä1-3/+3
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170912153411.20171-1-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-09-12drm/i915: Factor out setup_private_pat()Zhi Wang1-8/+12
Factor out setup_private_pat() for introducing the following patches. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Cc: Ben Widawsky <benjamin.widawsky@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1505202148-22959-1-git-send-email-zhi.a.wang@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-09-12drm/i915/bxt: set min brightness from VBTLee, Shawn C1-0/+2
Min brightness value from vbt was missing for BXT platform. This setting have to refer backlight ic spec to restrict min backlight output. Without this restriction, driver would allow to configure lower brightness value and violate backlight ic requirement. Fixes: 0fb890c01349 ("drm/i915/bxt: BLC implementation") Cc: Jani Nikula <jani.nikula@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Cc: Gary C Wang <gary.c.wang@intel.com> Signed-off-by: Shawn Lee <shawn.c.lee@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1505187390-7039-1-git-send-email-shawn.c.lee@intel.com
2017-09-12drm/i915: Increase poll time for BDW FCLK_DONEMarta Lofstedt1-1/+5
During IGT testing it has been shown that the specification defined polling time of 1 us for FCLK_DONE, is sometimes not enough. The issue is still reproducible while disabling C-states through the PM QoS framework and also while disabling preemtion. From this the most plausible explanation is that the issue is due to a firmware flaw. As a workaround, it is better to wait a little bit longer for the FCLK_DONE to come around, than to leave with an DRM_ERROR and having FCLK_DONE at a randome time after. While spinning a list of igt tests prone to reproduce the issue the FCLK_DONE poll failed at approximately 2% of the invocations of the bdw_set_cdclk function. The longest poll time during this testing was measured to ~7us. So, the suggested new poll time of 100us is on the safe side. v2: Added more documentation about investigations done. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102243 Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170908132829.6312-1-marta.lofstedt@intel.com
2017-09-12qxl: fix primary surface handlingGerd Hoffmann1-15/+19
The atomic conversion of the qxl driver didn't got the primary surface handling completely right. It works in the common simple cases, but fails for example when changing the display resolution using xrandr or in multihead setups. The rules are simple: There is one primary surface. Before defining a new one you have to destroy the old one. This patch makes qxl_primary_atomic_update() destroy the primary surface before defining a new one. It fixes is_primary flag updates. It adds is_primary checks so we don't try to update the primary surface in case it already has the state we want it being in. Fixes: 3538e80a869b ("drm: qxl: Atomic phase 1: Implement mode_set_nofb") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102338 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=196777 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/20170911093950.22401-1-kraxel@redhat.com
2017-09-11drm/i915/psr: Add enable_source vfunc.Rodrigo Vivi2-10/+6
Continue on VLV PSR split with vfunc, let's also create one for enabling source. Also since we are touching *_enable_source functions let's fix a comment with wrong name for vlv's one. v2: Fix typo on commit message (DK). Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-12-rodrigo.vivi@intel.com
2017-09-11drm/i915/psr: Add enable_sink vfunc.Rodrigo Vivi2-6/+4
Continue on VLV PSR split with vfunc, let's also create one for enabling sink. v2: Fix typo on commit message (DK). Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-11-rodrigo.vivi@intel.com
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