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2017-02-07drm: atmel: use vblank hooks in struct drm_crtc_funcsShawn Guo2-21/+21
The vblank hooks in struct drm_driver are deprecated and only meant for legacy drivers. For modern drivers with DRIVER_MODESET flag, the hooks in struct drm_crtc_funcs should be used instead. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-8-git-send-email-shawnguo@kernel.org
2017-02-07drm: armada: use vblank hooks in struct drm_crtc_funcsShawn Guo3-37/+37
The vblank hooks in struct drm_driver are deprecated and only meant for legacy drivers. For modern drivers with DRIVER_MODESET flag, the hooks in struct drm_crtc_funcs should be used instead. As the result, functions armada_drm_crtc_enable[disable]_irq() can be static, although they are moved around a bit to save forward declaration. The armada_crtc pointer array in struct armada_private is still kept in there, because armada_debugfs.c still have reference to it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Russell King <linux@armlinux.org.uk> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-7-git-send-email-shawnguo@kernel.org
2017-02-07drm: malidp: use vblank hooks in struct drm_crtc_funcsShawn Guo2-21/+21
The vblank hooks in struct drm_driver are deprecated and only meant for legacy drivers. For modern drivers with DRIVER_MODESET flag, the hooks in struct drm_crtc_funcs should be used instead. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Mali DP Maintainers <malidp@foss.arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-6-git-send-email-shawnguo@kernel.org
2017-02-07drm: hdlcd: use vblank hooks in struct drm_crtc_funcsShawn Guo2-20/+20
The vblank hooks in struct drm_driver are deprecated and only meant for legacy drivers. For modern drivers with DRIVER_MODESET flag, the hooks in struct drm_crtc_funcs should be used instead. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-5-git-send-email-shawnguo@kernel.org
2017-02-07drm: unexport function drm_vblank_no_hw_counter()Shawn Guo1-18/+10
The function drm_vblank_no_hw_counter() is now only used in core vblank wrapper code. Let's unexport it by making it a static function. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-4-git-send-email-shawnguo@kernel.org
2017-02-07drm: remove drm_vblank_no_hw_counter assignment from driver codeShawn Guo25-25/+0
Core code already makes drm_driver.get_vblank_counter hook optional by letting drm_vblank_no_hw_counter be the default implementation for the function hook. So the drm_vblank_no_hw_counter assignment in the driver code becomes redundant and can be removed now. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Xinliang Liu <z.liuxinliang@hisilicon.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: CK Hu <ck.hu@mediatek.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Rob Clark <robdclark@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Eric Anholt <eric@anholt.net> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-3-git-send-email-shawnguo@kernel.org
2017-02-07drm: add vblank hooks to struct drm_crtc_funcsShawn Guo1-6/+47
The vblank is mostly CRTC specific and implemented as part of CRTC driver. Let's keep the vblank hooks struct drm_driver for legacy drivers, and add corresponding hooks in struct drm_crtc_funcs. These hooks take struct drm_crtc pointer as argument, and will be called by core vblank handling code for DRIVER_MODESET drivers. The new hooks get plugged into core by adding wrapper functions for vblank handling code. The .get_vblank_counter hook is effectively optional, as we provide drm_vblank_no_hw_counter() as the default fallback in the wrapper function. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1486458995-31018-2-git-send-email-shawnguo@kernel.org
2017-02-07drm/fb-helper: Automatically clean up fb_infoDaniel Vetter21-100/+39
Noticed that everyone duplicates the same logic here and we could safe a few lines per driver. Yay for lots of drivers to make such tiny refactors worth-while! v2: Forgot to git add everything :( v3: Actually remove release_fbi (Sean, Emil, Chris) ... Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Sean Paul <seanpaul@chromium.org> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170207161603.17611-1-daniel.vetter@ffwll.ch
2017-02-07drm/fb-helper: Explain unload sequence a bit betterDaniel Vetter1-3/+12
While reviewing Chris' patches to properly cancel our async workers I checked that this happens after the fbdev is already unregistered. That's the case, but I found a small gap in our docs, fill that in. Note that I don't explain what release_fbi does, because that function will disappear in the next patch ... Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170207141050.1129-1-daniel.vetter@ffwll.ch
2017-02-07drm/i915: Get correct display clock on 945gmArthur Heymans2-3/+26
This is according to Mobile Intel® 945 Express Chipset Family datasheet. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Link: http://patchwork.freedesktop.org/patch/msgid/20170131235026.26003-1-arthur@aheymans.xyz Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2017-02-07drm/i915: Remove overzealous fence warn on runtime suspendChris Wilson2-2/+11
The goal of the WARN was to catch when we are still actively using the fence as we go into the runtime suspend. However, the reg->pin_count is too coarse as it does not distinguish between exclusive ownership of the fence register from activity. I've not improved on the WARN, nor have we captured this WARN in an exact igt, but it is showing up regularly in the wild: [ 1915.935332] WARNING: CPU: 1 PID: 10861 at drivers/gpu/drm/i915/i915_gem.c:2022 i915_gem_runtime_suspend+0x116/0x130 [i915] [ 1915.935383] WARN_ON(reg->pin_count)[ 1915.935399] Modules linked in: snd_hda_intel i915 drm_kms_helper vgem netconsole scsi_transport_iscsi fuse vfat fat x86_pkg_temp_thermal coretemp intel_cstate intel_uncore snd_hda_codec_hdmi snd_hda_codec_generic snd_hda_codec snd_hwdep snd_hda_core snd_pcm snd_timer snd mei_me mei serio_raw intel_rapl_perf intel_pch_thermal soundcore wmi acpi_pad i2c_algo_bit syscopyarea sysfillrect sysimgblt fb_sys_fops drm r8169 mii video [last unloaded: drm_kms_helper] [ 1915.935785] CPU: 1 PID: 10861 Comm: kworker/1:0 Tainted: G U W 4.9.0-rc5+ #170 [ 1915.935799] Hardware name: LENOVO 80MX/Lenovo E31-80, BIOS DCCN34WW(V2.03) 12/01/2015 [ 1915.935822] Workqueue: pm pm_runtime_work [ 1915.935845] ffffc900044fbbf0 ffffffffac3220bc ffffc900044fbc40 0000000000000000 [ 1915.935890] ffffc900044fbc30 ffffffffac059bcb 000007e6044fbc60 ffff8801626e3198 [ 1915.935937] ffff8801626e0000 0000000000000002 ffffffffc05e5d4e 0000000000000000 [ 1915.935985] Call Trace: [ 1915.936013] [<ffffffffac3220bc>] dump_stack+0x4f/0x73 [ 1915.936038] [<ffffffffac059bcb>] __warn+0xcb/0xf0 [ 1915.936060] [<ffffffffac059c4f>] warn_slowpath_fmt+0x5f/0x80 [ 1915.936158] [<ffffffffc052d916>] i915_gem_runtime_suspend+0x116/0x130 [i915] [ 1915.936251] [<ffffffffc04f1c74>] intel_runtime_suspend+0x64/0x280 [i915] [ 1915.936277] [<ffffffffac0926f1>] ? dequeue_entity+0x241/0xbc0 [ 1915.936298] [<ffffffffac36bb85>] pci_pm_runtime_suspend+0x55/0x180 [ 1915.936317] [<ffffffffac36bb30>] ? pci_pm_runtime_resume+0xa0/0xa0 [ 1915.936339] [<ffffffffac4514e2>] __rpm_callback+0x32/0x70 [ 1915.936356] [<ffffffffac451544>] rpm_callback+0x24/0x80 [ 1915.936375] [<ffffffffac36bb30>] ? pci_pm_runtime_resume+0xa0/0xa0 [ 1915.936392] [<ffffffffac45222d>] rpm_suspend+0x12d/0x680 [ 1915.936415] [<ffffffffac69f6d7>] ? _raw_spin_unlock_irq+0x17/0x30 [ 1915.936435] [<ffffffffac0810b8>] ? finish_task_switch+0x88/0x220 [ 1915.936455] [<ffffffffac4534bf>] pm_runtime_work+0x6f/0xb0 [ 1915.936477] [<ffffffffac074353>] process_one_work+0x1f3/0x4d0 [ 1915.936501] [<ffffffffac074678>] worker_thread+0x48/0x4e0 [ 1915.936523] [<ffffffffac074630>] ? process_one_work+0x4d0/0x4d0 [ 1915.936542] [<ffffffffac074630>] ? process_one_work+0x4d0/0x4d0 [ 1915.936559] [<ffffffffac07a2c9>] kthread+0xd9/0xf0 [ 1915.936580] [<ffffffffac07a1f0>] ? kthread_park+0x60/0x60 [ 1915.936600] [<ffffffffac69fe62>] ret_from_fork+0x22/0x30 In the case the register is pinned, it should be present and we will need to invalidate them to be restored upon resume as we cannot expect the owner of the pin to call get_fence prior to use after resume. Fixes: 7c108fd8feac ("drm/i915: Move fence cancellation to runtime suspend") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98804 Reported-by: Lionel Landwerlin <lionel.g.landwerlin@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Imre Deak <imre.deak@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+ Link: http://patchwork.freedesktop.org/patch/msgid/20170203125717.8431-1-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2017-02-07drm/i915/gvt: fix vgpu type size initZhenyu Wang1-6/+7
As now gvt init after knowing hw resource info, we can determine vGPU type from machine size instead of pre-defined value. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-07drm/i915/gvt: use normal mmio read function for firmware exposureZhenyu Wang1-43/+4
As now gvt init is late after MMIO initialization, use normal MMIO read function for initial firmware exposure if no available firmware loaded. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-07drm/i915/gvt: remove detect_host() MPT hookZhenyu Wang4-52/+0
We only depend on pvinfo register for GVT-g state detection, not require hypervisor host detect any more. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-07drm/i915/gvt: move intel iommu detection to intel_gvt_init()Zhenyu Wang2-6/+7
Prepare to remove detect_host() hook. Move intel iommu detection early in intel_gvt_init(). Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-07drm/i915: make intel_gvt_init() later instead of too earlyZhenyu Wang2-7/+12
Previously intel_gvt_init() was called very early even before MMIO initialization which had several drawbacks: - Have to handle MMIO access for initial MMIO state dump if golden state firmware is not available - Hypervisor detection should depend on pvinfo only instead of detecting hypervisor status. - Don't know hw resource size e.g aperture, ggtt size to determine for vGPU type, etc. This trys to move intel_gvt_init() call late after required info has already been initialized for GVT host. Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-07drm/i915/gvt: add more resolutions in virtual edidChuanxiao Dong1-7/+12
The current virtual edid can only support the resolution up to 1024x768. Update the virtual edid so that can support more resoltions. With this new virtual edid, resolution can be up to 1920x1200. V2: add detailed modeline description in edid code comments Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-02-07Merge branch 'for-linus' into for-nextTakashi Iwai81-817/+944
2017-02-07drm/exynos: fimd: Do not use HW trigger for exynos3250Hoegeun Kwon1-2/+0
Commit a6f75aa161c5 ("drm/exynos: fimd: add HW trigger support") added hardware trigger support to the FIMD controller driver. I have tested but this broke the display in at least the exynos3250 Gear 2. So until the issue is fixed, avoid using HW trigger for the exynos3250 based boards and use SW trigger as it was before the mentioned commit. Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/hdmi: add bridge supportAndrzej Hajda1-10/+46
On TM2/TM2e platforms HDMI output is connected to MHL bridge SiI8620. To allow configure UltraHD modes on the bridge and to eliminate unsupported modes this bridge should be attached to drm_encoder implemented in exynos_hdmi. Changelog v1: - fix drm_attach_bridge argument. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/decon5433: signal vblank only on odd fieldsAndrzej Hajda1-0/+7
In case of interlace mode irq is generated for odd and even fields, but vblank should be signaled only for the last emitted field. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/decon5433: add support for interlace modesAndrzej Hajda1-13/+32
Some registers should be programmed differently in interlace mode. Additionally IP does not signal stop state properly in interlaced mode, so warning has been removed. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/hdmi: fix PLL for 27MHz settingsAndrzej Hajda1-6/+6
Current settings for 27MHz and 27.027MHz do not work. Use the settings from vendor code instead. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/hdmi: fix VSI infoframe registersAndrzej Hajda1-1/+2
VSI infoframe registers address space is non-contiguous, so infoframe write should be split into two chunks. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/hdmi: add 297MHz pixel clock supportAndrzej Hajda1-0/+9
297MHz is used by Ultra HD modes. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos: g2d: change platform driver name to 'exynos-drm-g2d'Tobias Jakobi1-1/+1
The current name is 's5p-g2d', which is identical with the driver name of the old V4L2 driver in media/platform. This is probably due to the DRM driver being based on the V4L2 driver when it was initially created. Still the clashing of driver names is confusing, so rename it to something in line with the other DRM subdrivers. Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/exynos/decon5433: configure sysreg in case of hardware triggerAndrzej Hajda1-8/+32
In case of HW trigger mode, sysreg register should be configured to enable TE functionality. The patch refactors also trigger setup function. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2017-02-07drm/rockchip: cdn-dp: fix cdn-dp complie warningMark Yao1-1/+1
fix warning: drivers/gpu/drm/rockchip/cdn-dp-reg.c:632:24: warning: 'val[1]' may be used uninitialized in this function [-Wmaybe-uninitialized] msa_misc = 2 * val[0] + 32 * val[1] + Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2017-02-07Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-nextDave Airlie44-528/+2698
The big things this time around are: 1) support for hw cursor on newer mdp5 devices (snapdragon 820+, tested on db820c) 2) dsi encoder cleanup 3) gpu dt bindings cleanup so we can get the gpu nodes merged upstream * 'msm-next' of git://people.freedesktop.org/~robclark/linux: (32 commits) drm/msm: return -EFAULT if copy_from_user() fails drm/msm/dsi: Add PHY/PLL for 8x96 drm/msm/dsi: Add new method to calculate 14nm PHY timings drm/msm/dsi: Move PHY operations out of host drm/msm/dsi: Reset both PHYs before clock operation for dual DSI drm/msm/dsi: Pass down use case to PHY drm/msm/dsi: Return more timings from PHY to host drm/msm/dsi: Add a PHY op that initializes version specific stuff drm/msm/dsi: Add 8x96 info in dsi_cfg drm/msm/dsi: Don't error if a DSI host doesn't have a device connected drm/msm/mdp5: Add support for legacy cursor updates drm/msm/mdp5: Refactor mdp5_plane_atomic_check drm/msm/mdp5: Add cursor planes drm/msm/mdp5: Misc cursor plane bits drm/msm/mdp5: Configure COLOR3_OUT propagation drm/msm/mdp5: Use plane helpers to configure src/dst rectangles drm/msm/mdp5: Prepare CRTC/LM for empty stages drm/msm/mdp5: Create only as many CRTCs as we need drm/msm/mdp5: cfg: Change count to unsigned int drm/msm/mdp5: Create single encoder per interface (INTF) ...
2017-02-07Merge branch 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel-drm-rockchip into drm-nextDave Airlie10-4/+2872
rockchip CDN-DP support. * 'drm-rockchip-next-2017-02-05' of https://github.com/markyzq/kernel-drm-rockchip: drm/rockchip: cdn-dp: don't configure hardware in mode_set drm/rockchip: cdn-dp: retry to check sink count drm/rockchip: cdn-dp: Move mutex_init to probe drm/rockchip: cdn-dp: do not use drm_helper_hpd_irq_event drm/rockchip: cdn-dp: Do not run worker while suspended drm/rockchip: cdn-dp: Load firmware if no monitor connected drm/rockchip: cdn-dp: add cdn DP support for rk3399 drm/rockchip: return ERR_PTR instead of NULL drm/rockchip: vop: make vop register setting take effect
2017-02-06drm/i915: Show the current i915_params in debugfs/i915_capabilitesChris Wilson1-0/+22
Alongside the hw capabilities, it is useful to know which of those have been overridden by the user setting module parameters. v2: Use __always_inline and BUILD_BUG magic Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170206213608.31328-4-chris@chris-wilson.co.uk
2017-02-06drm/i915: Capture module parameters for the GPU error stateChris Wilson2-7/+36
They include useful material such as what mode the VM address space is running in, what submission mode, extra quirks, etc. v2: Undef the right macro, use type specific pretty printers v3: Use strcmp(TYPENAME) rather than creating per-type pretty printers v4: Use __always_inline to force GCC to eliminate the calls to strcmp and generate the right call to seq_printf for each parameter. v5: With the strcmp elimination, we can now use BUILD_BUG to ensure there are no unhandled types, also use __builtin_strcmp to make it look even more magic. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Mika Kuoppala <mika.kuoppala@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170206213608.31328-3-chris@chris-wilson.co.uk
2017-02-06drm/i915: Use bool i915_param.alpha_supportChris Wilson2-2/+2
The alpha_support module option can only take one of two values, so assign it to a boolean type. The only advantage is in pretty printing via /sys/module/i915/parameters/alpha_support and elsewhere. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170206213608.31328-2-chris@chris-wilson.co.uk
2017-02-06drm/i915: Generate i915_params {} using a macroChris Wilson1-38/+43
I want to print the struct from the error state and so would like to use the existing struct definition as the template ala DEV_INFO* v2: Use MEMBER() rather than p(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170206213608.31328-1-chris@chris-wilson.co.uk
2017-02-06drm/i915: Avoid unguarded reads from the request pointerChris Wilson2-3/+22
In commit 86aa7e760a67 ("drm/i915: Assert that the context-switch completion matches our context") I added a read to the irq tasklet handler that compared the on-chip status with that of our sw tracking, using an unguarded read of the request pointer to get the context and beyond. Whilst we hold a reference to the request, we do not hold anything on the context and if we are unlucky it may be reaped from a second thread retiring the request (since it may retire the request as soon as the breadcrumb is complete, even before we finish processing the context switch) as we try to read from the context pointer. Avoid the racy read from underneath the request by storing the expected result in the execlist_port[]. v2: Include commentary about port[].request being unprotected. Fixes: 86aa7e760a67 ("drm/i915: Assert that the context-switch completion matches our context") Reported-by: Mika Kuoppala <mika.kuoppala@intel.com> Testcase: igt/gem_ctx_create Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170206170502.30944-2-chris@chris-wilson.co.uk
2017-02-06drm/i915: Mark the end of intel_ring_begin() and check in intel_ring_advance()Chris Wilson3-0/+13
It is required that the caller declare the exact number of dwords they wish to write into the ring. This is required for two reasons, we need to allocate sufficient space for the entire command packet and we need to be sure that the contents are completely written to avoid executing stale data. The current interface requires for any bug to be caught in review, the reader has to carefully count the number of intel_ring_emit() between intel_ring_begin() and intel_ring_advance(). If we record the end of the packet of each intel_ring_begin() we can also have CI check for us. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170206170502.30944-1-chris@chris-wilson.co.uk
2017-02-06drm/msm: return -EFAULT if copy_from_user() failsDan Carpenter1-6/+7
copy_from_user_inatomic() is actually a local function that returns -EFAULT or positive values on error. Otherwise copy_from_user() returns the number of bytes remaining to be copied. We want to return -EFAULT here. I removed an unlikely() because we just did a copy_from_user() so I don't think it can possibly make a difference. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Add PHY/PLL for 8x96Archit Taneja9-0/+1319
Extend the DSI PHY/PLL drivers to support the DSI 14nm PHY/PLL found on 8x96. These are picked up from the downstream driver. The PHY part is similar to the other DSI PHYs. The PLL driver requires some trickery so that one DSI PLL can drive both the DSIs (i.e, dual DSI mode). In the case of dual DSI mode. One DSI instance becomes the clock master, and other the clock slave. The master PLL's output (Byte and Pixel clock) is fed to both the DSI hosts/PHYs. When the DSIs are configured in dual DSI mode, the PHY driver communicates to the PLL driver using msm_dsi_pll_set_usecase() which instance is the master and which one is the slave. When setting rate, the master PLL also configures some of the slave PLL/PHY registers which need to be identical to the master's for correct dual DSI behaviour. There are 2 PLL post dividers that should have ideally been modelled as generic clk_divider clocks, but require some customization for dual DSI. In particular, when the master PLL's post-diviers are set, the slave PLL's post-dividers need to be set too. The clk_ops for these use clk_divider's helper ops and flags internally to prevent redundant code. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Add new method to calculate 14nm PHY timingsHai Li2-1/+127
The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different set of calculations for computing D-PHY timing params. Create a timing_calc_v2 func for the newer v2 PHYs. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Move PHY operations out of hostHai Li8-125/+172
Since DSI PHY has been a separate platform device, it should not depend on the resources in host to be functional. This change is to trigger PHY operations in manager, instead of host, so that host and PHY can be completely separated. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Reset both PHYs before clock operation for dual DSIArchit Taneja3-15/+43
In case of dual DSI, some registers in PHY1 have been programmed during PLL0 clock's set_rate. The PHY1 reset called by host1 later will silently reset those PHY1 registers. This change is to reset and enable both PHYs before any PLL clock operation. [Originally worked on by Hai Li <hali@codeaurora.org>. Fixed up by Archit Taneja <architt@codeaurora.org>] Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Pass down use case to PHYHai Li4-30/+51
For some new types of DSI PHY, more settings depend on use cases controlled by DSI manager. This change allows DSI manager to setup PHY with a use case. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Return more timings from PHY to hostHai Li5-27/+41
The DSI host is required to configure more timings calculated in PHY. By introducing a shared structure, this change allows more timing information passed from PHY to host. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Add a PHY op that initializes version specific stuffArchit Taneja5-9/+30
Create an init() op for dsi_phy which sets up things specific to a given DSI PHY. The dsi_phy driver probe expects every DSI version to get a "dsi_phy_regulator" mmio base. This isn't the case for 8x96. Creating an init() op will allow us to accommodate such differences. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Add 8x96 info in dsi_cfgArchit Taneja2-0/+26
Add 8x96 DSI data in dsi_cfg. The downstream kernel's dsi_host driver enables core_mmss_clk. We're seeing some branch clock warnings on 8x96 when enabling this. There doesn't seem to be any negative effect with not enabling this clock, so use it once we figure out why we get the warnings. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/dsi: Don't error if a DSI host doesn't have a device connectedArchit Taneja1-5/+5
The driver returns an error if a DSI DT node is populated, but no device is connected to it or if the data-lane map isn't present. Ideally, such a DSI node shouldn't be probed at all (i.e, its status should be set to "disabled in DT"), but there isn't any harm in registering the DSI device even if it doesn't have a bridge/panel connected to it. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/mdp5: Add support for legacy cursor updatesArchit Taneja3-3/+115
This code has been more or less picked up from the vc4 and intel implementations of update_plane() funcs for cursor planes. The update_plane() func is usually the drm_atomic_helper_update_plane func that will issue an atomic commit with the plane updates. Such commits are not intended to be done faster than the vsync rate. The legacy cursor userspace API, on the other hand, expects the kernel to handle cursor updates immediately. Create a fast path in update_plane, which updates the cursor registers and flushes the configuration. The fast path is taken when there is only a change in the cursor's position in the crtc, or a change in the cursor's crop co-ordinates. For anything else, we go via the slow path. We take the slow path even when the fb changes, and when there is currently no fb tied to the plane. This should hopefully ensure that we always take a slow path for every new fb. This in turn should ensure that the fb is pinned/prepared. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/mdp5: Refactor mdp5_plane_atomic_checkArchit Taneja1-12/+20
In mdp5_plane_atomic_check, we get crtc_state from drm_plane_state. Later, for cursor planes, we'll populate the update_plane() func that takes a fast asynchronous path to implement cursor movements. There, we would need to call a similar atomic_check func to validate the plane state, but crtc_state would need to be derived differently. Refactor mdp5_plane_atomic_check to mdp5_plane_atomic_check_with_state such that the latter takes crtc_state as an argument. This is similar to what the intel driver has done for async cursor updates. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/mdp5: Add cursor planesArchit Taneja2-12/+26
Register cursor drm_planes. The loop in modeset_init that inits the planes and crtcs has to be refactored a bit. We first iterate all the hwpipes to find the cursor planes. Then, we loop again to create crtcs. In msm_atomic_wait_for_commit_done, remove the check which bypasses waiting for vsyncs if state->legacy_cursor_updates is true. We will later create a fast path for cursor position changes in the cursor plane's update_plane func that doesn't go via the regular atomic commit path. For rest of cursor related updates, we will have to wait for vsyncs, so ignore the legacy_cursor_updates flag. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06drm/msm/mdp5: Misc cursor plane bitsArchit Taneja8-13/+75
These are various changes added in preparation for cursor planes: - Add a pipe_cursor block for 8x96 in mdp5_cfg. - Add a new pipe CAP called MDP_PIPE_CAP_CURSOR. Use this to ensure we assign a cursor SSPP for a drm_plane with type DRM_PLANE_TYPE_CURSOR. - Update mdp5_ctl_blend_mask/ext_blend_mask funcs to incorporate cursor SSPPs. - In mdp5_ctl_blend, iterate through MAX_STAGES instead of stage_cnt, we need to do this because we can now have empty stages in between. - In mdp5_crtc_atomic_check, make sure that the cursor plane has the highest zorder, and stage the cursor plane to the maximum stage # present on the HW. - Create drm_crtc_funcs that doesn't try to implement cursors using the older LM cursor HW. - Pass drm_plane_type in mdp5_plane_init instead of a bool telling whether plane is primary or not. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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