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2016-05-20drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()Ben Skeggs2-5/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb/gf100-: allocate mmu debug buffersBen Skeggs13-36/+58
Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fb: allow chipset-specific actions for oneinit()Ben Skeggs2-0/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200-: fix bad hardcoding of a max-tpcs-per-gpc valueBen Skeggs2-2/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200-: rop count == ltc countBen Skeggs3-2/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: modify the mask when copying mmu settings from fbBen Skeggs2-4/+2
Appears to more closely match what RM does. For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming changes will require it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: move some code into init_gpc_mmu() hookBen Skeggs1-9/+19
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gm200: make generate_main() staticBen Skeggs2-2/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: abstract fetching rop countBen Skeggs15-2/+25
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: rename magic_not_rop_nr to screen_tile_row_offsetBen Skeggs8-26/+26
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/gr/gf100-: remove hardcoded idle_timeout valuesBen Skeggs7-19/+21
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gm107-: remove engines from mmu engine mapping arrayBen Skeggs4-3/+28
These are specified by PTOP on Maxwell GPUs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: identify mmu engine ids for host faultsBen Skeggs1-4/+14
It appears these don't map to PBDMAs (at least on Kepler, it may or may be valid for Fermi - this hasn't been checked), but to runlists. This drops the NVKM_ENGINE_FIFO data from the entries too, as resetting all of PFIFO is *not* the way to handle such faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: implement support for PTOP fault infoBen Skeggs1-2/+16
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: abstract mmu fault data structuresBen Skeggs8-111/+150
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: subclass funcBen Skeggs10-73/+65
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/fifo/gk104-: use device info from top subdevBen Skeggs1-73/+16
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/core: remove pmc_enable argument from subdev ctorBen Skeggs74-139/+62
These are now specified directly in the MC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv04: define reset masks + intr cleanupBen Skeggs2-10/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv11: define reset masks + intr cleanupBen Skeggs6-1/+61
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv17: define reset masks + intr cleanupBen Skeggs6-21/+52
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/nv50: define reset masks + intr cleanupBen Skeggs4-13/+43
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/g84: define reset masks + intr cleanupBen Skeggs4-6/+76
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/g98: define reset masks + intr cleanupBen Skeggs1-14/+22
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/gt215: define reset masks + intr cleanupBen Skeggs4-4/+76
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/gf100: define reset masks + intr cleanupBen Skeggs2-20/+30
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc/gk104: define reset masks + intr cleanupBen Skeggs6-6/+76
Engine fields have been removed, as they're specified by PTOP. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc: implement support for PTOP interrupt routingBen Skeggs1-2/+11
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc: implement support for PTOP reset infoBen Skeggs1-5/+8
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc: allow for local definition of reset bitsBen Skeggs2-2/+16
With the addition of PTOP-specified reset bits, it makes more sense to move the definitions here rather than in individual subdev implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc: add helper function to handle device resetBen Skeggs3-6/+23
This will be later extended to handle PTOP-specified reset masks as well as the hardcoded ones. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/mc: rename struct nvkm_mc_intr to nvkm_mc_mapBen Skeggs6-10/+10
This will also be used to define NV_PMC_ENABLE <-> subdev mappings in an upcoming commit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/top/gk104: initial implementationBen Skeggs4-0/+126
Ported from the code currently in engine/fifo/gk104.c. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/top: initial implementationBen Skeggs4-1/+176
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/core: add top plumbingBen Skeggs8-0/+22
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/iccsense: configure sensors like nvidia doesKarol Herbst1-0/+68
v2: rename ina209/ina219 read function Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/iccsense: split sensor into own structKarol Herbst3-45/+113
v2: add list_del call, reword error message Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/iccsense: convert to linked listKarol Herbst4-22/+19
v2: add list_del calls Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/iccsense: remove read functionKarol Herbst2-14/+10
Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/pmu: be more strict about lockingKarol Herbst1-3/+5
When we start communicating with the pmu a bit more, the current code is a real issue. I encountered a dead lock here, while testing my dynamic reclocking code Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau/devinit/gf100: make devinit on resume saferAlexandre Courbot3-4/+13
In case of successful suspend, devinit will have to be run and this is the behavior currently hardcoded. However, as FD bug 94725 suggests, there might be cases where runtime suspend leaves the GPU powered, and in such cases devinit should not be run on resume. On GF100+ we have a reliable way to know whether we need to run devinit. Use it instead of blindly trusting the flag set by nvkm_devinit_fini(). The code around the NvForcePost also needs to be slightly reworked in order to keep working. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Suggested-by: Dave Airlie <airlied@redhat.com> Suggested-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20drm/nouveau: rename nouveau_drm.h to nouveau_drv.hBen Skeggs48-49/+50
Fixes out-of-tree build issue where uapi/drm/nouveau_drm.h gets picked up instead. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-19drm/omap: DPI: rename "DSI" related namesTomi Valkeinen1-22/+22
Originally DSS only had DSI PLLs, and thus the DPI driver has functions and variables that refer to DSI or DSI PLL. Now we support DSI, VIDEO and HDMI PLLs, so it's time to remove the DSI references from the code. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: support type B PLL for DPITomi Valkeinen1-9/+22
Type A and B PLLs require a bit different calculations for the clock rates. DPI driver supports only type A PLLs. This patch adds support for the type B PLL. Type B PLLs are simpler than type A, as type B can produce a good clock for almost any rate. Thus we can just ask it to produce the pixel clock and use one as LCK and PCK dividers. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: add comments for PLL calculationsTomi Valkeinen1-0/+7
Add comments showing how the PLL clock rates are calculated. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: generalize dss_pll_calc_b()Tomi Valkeinen4-8/+17
dss_pll_calc_b() takes HDMI TMDS clock rate as a parameter. To make dss_pll_calc_b() usable for non-HDMI users, change the function to take clkout rate as parameter, and also change the current users of dss_pll_calc_b() to accommodate that. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: move HDMI PLL calc function to pll.cTomi Valkeinen6-64/+67
Move hdmi_pll_compute(), used to calculate the config for HDMI PLL, from hdmi_pll.c to pll.c, with the name of dss_pll_calc_b(), to make it available to non-HDMI users. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: rename PLL calc functionsTomi Valkeinen4-10/+10
Add a "_a" postfix to the type A PLL calc functions, to differentiate them from the type B PLL calculations which we will add shortly. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: HDMI PLL: use runtime pmTomi Valkeinen2-0/+10
To make it possible to use HDMI PLL for other video outputs than HDMI, the HDMI PLL code needs to do runtime_get/put for the HDMI IP, so that the IP (include the PLL) is enabled. To do that we also need to store the HDMI pdev in the hdmi_pll_data. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-05-19drm/omap: fix DPI clkout index handlingTomi Valkeinen1-6/+6
DPI driver uses a fixed clkout index, 0. This has worked fine as the first clkout is usually used. To generalize the code and to support additional clock sources, change the code to use dss_pll_get_clkout_idx_for_src() to get the clkout index. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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