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2016-05-03Revert "drm/i915: start adding dp mst audio"Lyude5-65/+8
Right now MST audio is causing too many kernel panics to really keep around in the kernel. On top of that, even after fixing said panics it's still basically non-functional (at least on all the setups I've tested it on). Revert until we have a proper solution for this. This reverts commit 3d52ccf52f2c51f613e42e65be0f06e4e6788093. Signed-off-by: Lyude <cpaul@redhat.com> Fixes: 3d52ccf52f2c ("drm/i915: start adding dp mst audio") Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1462287692-28570-1-git-send-email-cpaul@redhat.com
2016-05-03drm/amdgpu: make sure vertical front porch is at least 1Alex Deucher1-0/+4
hw doesn't like a 0 value. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-03drm/radeon: make sure vertical front porch is at least 1Alex Deucher1-0/+4
hw doesn't like a 0 value. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-03drm/amdgpu: set metadata pointer to NULL after freeing.Dave Airlie1-0/+1
Without this there was a double free of the metadata, which ended up freeing the fd table for me here, and taking out the machine more often than not. I reproduced with X.org + modesetting DDX + latest llvm/mesa, also required using dri3. Cc: stable@vger.kernel.org Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-03drm/i915/chv: Tune L3 SQC credits based on actual latenciesImre Deak2-16/+38
While browsing BSpec I bumped into a note saying we need to tune these values based on actual measurements done after initial enabling. I've checked that it indeed improves things on BXT. I haven't checked this on CHV, but here it is if someone wants to give it a go. v2: - Add note about the discrepancy wrt. to the spec in the formula calculating the credit encodings. (Mika, Ville) - Move the WA comment to the new function. (Ville) v3: - Keep the comment about the SQC WA in the caller. (Ville) CC: Ville Syrjälä <ville.syrjala@linux.intel.com> CC: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-4-git-send-email-imre.deak@intel.com
2016-05-03drm/i915: Clean up L3 SQC register field definitionsImre Deak3-4/+6
No need for hard-coding the register value, the corresponding fields are defined properly in BSpec. No functional change. v2: - Rebased on BXT L3 SQC tuning patch merged meanwhile. CC: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1) Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-3-git-send-email-imre.deak@intel.com
2016-05-03drm/i915/bdw: Add missing delay during L3 SQC credit programmingImre Deak1-0/+6
BSpec requires us to wait ~100 clocks before re-enabling clock gating, so make sure we do this. CC: stable@vger.kernel.org CC: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1462280061-1457-2-git-send-email-imre.deak@intel.com
2016-05-03drm/atomic: Add WARN_ON when state->acquire_ctx is not set.Maarten Lankhorst1-0/+6
When I was writing an atomic wrapper for rmfb, I ran into the following backtrace from lockdep: ============================================= [ INFO: possible recursive locking detected ] 4.5.0-patser+ #4696 Tainted: G U --------------------------------------------- kworker/2:2/2608 is trying to acquire lock: (crtc_ww_class_mutex){+.+.+.}, at: [<ffffffffc00c9ddc>] drm_modeset_lock+0x7c/0x120 [drm] but task is already holding lock: (crtc_ww_class_mutex){+.+.+.}, at: [<ffffffffc00c98cd>] modeset_backoff+0x8d/0x220 [drm] other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(crtc_ww_class_mutex); lock(crtc_ww_class_mutex); *** DEADLOCK *** May be due to missing lock nesting notation 4 locks held by kworker/2:2/2608: #0: ("events"){.+.+.+}, at: [<ffffffff810a5eea>] process_one_work+0x15a/0x6c0 #1: ((&arg.work)){+.+.+.}, at: [<ffffffff810a5eea>] process_one_work+0x15a/0x6c0 #2: (crtc_ww_class_acquire){+.+.+.}, at: [<ffffffffc004532a>] drm_atomic_helper_remove_fb+0x4a/0x1d0 [drm_kms_helper] #3: (crtc_ww_class_mutex){+.+.+.}, at: [<ffffffffc00c98cd>] modeset_backoff+0x8d/0x220 [drm] While lockdep probably catches this bug when it happens, it's better to explicitly warn when state->acquire_ctx is not set. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1462266751-29123-1-git-send-email-maarten.lankhorst@linux.intel.com
2016-05-03drm/fsl-dcu: add COMMON_CLK dependencyArnd Bergmann1-1/+1
The fsl dcu now uses the clk-provider interfaces, which are not available when CONFIG_COMMON_CLK is disabled: drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c: In function 'fsl_dcu_drm_probe': drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c:362:20: error: implicit declaration of function '__clk_get_name' [-Werror=implicit-function-declaration] pix_clk_in_name = __clk_get_name(pix_clk_in); This adds a Kconfig dependency to prevent the driver from being enabled in this case. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 2d701449bce1 ("drm/fsl-dcu: use common clock framework for pixel clock divider") Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1462186839-2224021-1-git-send-email-arnd@arndb.de
2016-05-03drm/rockchip: vop: Initialize vskiplines to zeroMark Yao1-1/+1
There is a path that use vskiplines with non-initialize. That would cause vop abnormal behavior. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-03drm/rockchip: vop: fix iommu crash with async atomicMark Yao1-0/+18
After async atomic_commit callback, drm_atomic_clean_old_fb will clean all old fb, but because async, the old fb may be also on the vop hardware, dma will access the old fb buffer, clean old fb will cause iommu page fault. Reference the fb and unreference it when the fb actuall swap out from vop hardware. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-03drm/rockchip: support non-iommu buffer pathMark Yao1-19/+47
Some rockchip vop not support iommu, need use non-iommu buffer for it. And if we get iommu issues, we can compare the issues with non-iommu path, that would help the debug. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2016-05-03drm/rockchip: get rid of rockchip_drm_crtc_mode_configMark Yao6-77/+128
We need to take care of the vop status when use rockchip_drm_crtc_mode_config, if vop is disabled, the function would failed, that is terrible. Save output_type and output_mode into rockchip_crtc_state, it's nice to make them into atomic. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Tested-by: John Keeping <john@metanate.com>
2016-05-03drm/rockchip: inno_hdmi: fix an error codeDan Carpenter1-1/+2
We were accidentally returning PTR_ERR(NULL) which means success when we wanted to return a negative error code. Fixes: 412d4ae6b7a5 ('drm/rockchip: hdmi: add Innosilicon HDMI support') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Yakir Yang <ykk@rock-chips.com>
2016-05-03drm/rockchip: don't leak iommu mappingJohn Keeping1-1/+2
arm_iommu_attach_device() takes its own reference to the mapping we give it. Since we do not keep a reference to the mapping ourselves, we must release it before returning. Also fix the error path, which fails to release the mapping if it has called arm_iommu_detach_device() since that clears archdata.mapping. Signed-off-by: John Keeping <john@metanate.com>
2016-05-03drm/rockchip: remove redundant statementJohn Keeping1-1/+0
The call to arm_iommu_detach_device() on the previous line sets dev->archdata.mapping to NULL so this call is always a no-op. Signed-off-by: John Keeping <john@metanate.com>
2016-05-02drm/vc4: Add missing render node supportEric Anholt1-0/+1
There shouldn't be any other driver support necessary, since none of the driver-specific ioctls ever required auth, and none of them deal with modesetting. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-05-02drm/vc4: Add support for gamma ramps.Eric Anholt2-0/+64
We could possibly save a bit of power by not requesting gamma conversion when the ramp happens to be 1:1, but at least if all the CRTCs are off the SRAM will be disabled. This should fix brightness sliders in a lot of fullscreen games. Signed-off-by: Eric Anholt <eric@anholt.net>
2016-05-02drm/amdgpu: optionally enable GART debugfs fileChristian König4-14/+42
Keeping the pages array around can use a lot of system memory when you want a large GART. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: remove GART page addr arrayChristian König2-19/+4
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: use BO pages instead of GART arrayChristian König1-13/+16
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: change parameter passing in the VM codeChristian König1-46/+54
Make it more flexible by passing src and page addresses directly instead of the structures they contain. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: drop the GTT power of two limitChristian König1-5/+1
As far as I can see that isn't neccessary any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/powerplay: use min_clock_in_sr for deep sleep feature.Rex Zhu1-20/+30
This comes from the display handling code. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/amdgpu: Enable clockgating in UVD6 for StoneyTom St Denis1-1/+5
This patch enables clockgating for the UVD6 block in Stoney. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/amdgpu: Enable clockgating for UVD5 on TongaTom St Denis1-1/+1
This patch enables clock gating for the UVD5 block with Tonga. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/amdgpu: Add SW clock gating support to UVD 5 and 6Tom St Denis2-164/+232
This patch adds support for software clock gating to UVD 5 and UVD 6 blocks with a preliminary commented out hardware gating routine. Currently hardware gating does not work so it's not activated. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: don't include RADEON_HPD_NONE in HPD IRQ enable bitsetsNicolai Stange4-8/+16
The values of all but the RADEON_HPD_NONE members of the radeon_hpd_id enum transform 1:1 into bit positions within the 'enabled' bitset as assembled by evergreen_hpd_init(): enabled |= 1 << radeon_connector->hpd.hpd; However, if ->hpd.hpd happens to equal RADEON_HPD_NONE == 0xff, UBSAN reports UBSAN: Undefined behaviour in drivers/gpu/drm/radeon/evergreen.c:1867:16 shift exponent 255 is too large for 32-bit type 'int' [...] Call Trace: [<ffffffff818c4d35>] dump_stack+0xbc/0x117 [<ffffffff818c4c79>] ? _atomic_dec_and_lock+0x169/0x169 [<ffffffff819411bb>] ubsan_epilogue+0xd/0x4e [<ffffffff81941cbc>] __ubsan_handle_shift_out_of_bounds+0x1fb/0x254 [<ffffffffa0ba7f2e>] ? atom_execute_table+0x3e/0x50 [radeon] [<ffffffff81941ac1>] ? __ubsan_handle_load_invalid_value+0x158/0x158 [<ffffffffa0b87700>] ? radeon_get_pll_use_mask+0x130/0x130 [radeon] [<ffffffff81219930>] ? wake_up_klogd_work_func+0x60/0x60 [<ffffffff8121a35e>] ? vprintk_default+0x3e/0x60 [<ffffffffa0c603c4>] evergreen_hpd_init+0x274/0x2d0 [radeon] [<ffffffffa0c603c4>] ? evergreen_hpd_init+0x274/0x2d0 [radeon] [<ffffffffa0bd196e>] radeon_modeset_init+0x8ce/0x18d0 [radeon] [<ffffffffa0b71d86>] radeon_driver_load_kms+0x186/0x350 [radeon] [<ffffffffa03b6b16>] drm_dev_register+0xc6/0x100 [drm] [<ffffffffa03bc8c4>] drm_get_pci_dev+0xe4/0x490 [drm] [<ffffffff814b83f0>] ? kfree+0x220/0x370 [<ffffffffa0b687c2>] radeon_pci_probe+0x112/0x140 [radeon] [...] ===================================================================== radeon 0000:01:00.0: No connectors reported connected with modes At least on x86, there should be no user-visible impact as there 1 << 0xff == 1 << (0xff & 31) == 1 << 31 holds and 31 > RADEON_MAX_HPD_PINS. Thus, this patch is a cosmetic one. All of the above applies analogously to evergreen_hpd_fini(), r100_hpd_init(), r100_hpd_fini(), r600_hpd_init(), r600_hpd_fini(), rs600_hpd_init() and rs600_hpd_fini() Silence UBSAN by checking ->hpd.hpd for RADEON_HPD_NONE before oring it into the 'enabled' bitset in the *_init()- or the 'disabled' bitset in the *_fini()-functions respectively. Signed-off-by: Nicolai Stange <nicstange@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: refine code for code style.Rex Zhu1-1/+1
White space fix. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: No need to stop hw init although vce's state was not true.Rex Zhu1-1/+2
This is not a fatal error. v2: add comment why ignore the error here. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: fix issue that can't set vce clock gate.Rex Zhu1-1/+17
Need to soft reset VCE as part of the clockgating sequence. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: use ref to keep job aliveMonk Liu5-4/+35
this is to fix fatal page fault error that occured if: job is signaled/released after its timeout work is already put to the global queue (in this case the cancel_delayed_work will return false), which will lead to NX-protection error page fault during job_timeout_func. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: rework TDR in scheduler (v2)Monk Liu6-1/+62
Add two callbacks to scheduler to maintain jobs, and invoked for job timeout calculations. Now TDR measures time gap from job is processed by hw. v2: fix typo Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: get rid of incorrect TDRMonk Liu2-42/+1
original time out detect routine is incorrect, cuz it measures the gap from job scheduled, but we should only measure the gap from processed by hw. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: put job to list before doneMonk Liu3-0/+27
the mirror_list will be used for later time out detect feature. This is needed to properly detect a GPU timeout with the scheduler. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: delay job free to when it's finished (v2)Monk Liu4-3/+22
for those jobs submitted through scheduler, do not free it immediately after scheduled, instead free it in global workqueue by its sched fence signaling callback function. v2: call uf's bo_undef after job_run() call job's sync free after job_run() no static inline __amdgpu_job_free() anymore, just use kfree(job) to replace it. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu/dce11: fix vertical bars appear on monitorVitaly Prosyak1-60/+5
Fixed mc stop and resume hardware programming sequence. Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: use sched_job_init to initialize sched_jobMonk Liu4-20/+40
Consolidate job initialization in one place rather than duplicating it in multiple places. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: patch cond exec for SDMAMonk Liu3-1/+37
More ground work for conditional execution on SDMA necessary for preemption. Signed-off-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: support cond execMonk Liu3-0/+15
This adds the groundwork for conditional execution on SDMA which is necessary for preemption. Signed-off-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: improve vmid assigment V2Chunming Zhou1-0/+14
V2: the signaled items on the LRU maintain their order Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: mark amdgpu_allowed_register_entry tables as 'const'Nils Wallménius2-6/+6
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: do not store bios_header_start in amdgpu_deviceNils Wallménius2-5/+4
It is only used locally in amdgpu_get_bios Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: delete unused struct member suspend from radeon_deviceNils Wallménius1-1/+0
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: delete unused struct member suspend from amdgpu_deviceNils Wallménius1-1/+0
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: hard reset r600 and newer GPU when hibernating.Jérome Glisse3-8/+14
Some GPU block like UVD and VCE require hard reset to be properly resume if there is no real powerdown of the asic like during various hibernation step. This patch perform such hard reset. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: allow to force hard GPU reset.Jérome Glisse10-18/+44
In some cases, like when freezing for hibernation, we need to be able to force hard reset even if no engine are stuck. This patch add a bool option to current asic reset callback to allow to force hard reset on asic that supports it. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: add driver option to disable vce block.Jérome Glisse3-0/+7
Quite few suspend/hibernation bugs are related to this block. Add an option to disable those as a work around. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: add driver option to disable uvd block.Jérome Glisse3-0/+8
Quite few suspend/hibernation bugs are related to this block. Add an option to disable those as a work around. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/radeon: consolidate cik vce initialization and startup code.Jérome Glisse1-45/+91
This match the exact same control flow as existing code. It just use goto instead of multiple levels of if/else. It also clarify early initialization failures by clearing rdev->has_vce doing so does not change end result from hardware point of view, it only avoids printing more error messages down the line and thus only the original error is reported. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jérôme Glisse <jglisse@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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