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2022-01-27drm/i915/adlp: Fix TypeC PHY-ready status readoutImre Deak1-1/+2
The TCSS_DDI_STATUS register is indexed by tc_port not by the FIA port index, fix this up. This only caused an issue on TC#3/4 ports in legacy mode, as in all other cases the two indices either match (on TC#1/2) or the TCSS_DDI_STATUS_READY flag is set regardless of something being connected or not (on TC#1/2/3/4 in dp-alt and tbt-alt modes). Reported-and-tested-by: Chia-Lin Kao (AceLan) <acelan.kao@canonical.com> Fixes: 55ce306c2aa1 ("drm/i915/adl_p: Implement TC sequences") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4698 Cc: José Roberto de Souza <jose.souza@intel.com> Cc: <stable@vger.kernel.org> # v5.14+ Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220126104356.2022975-1-imre.deak@intel.com
2022-01-27drm/panel: simple: add Multi-Inno Technology MI0700S4T-6Marek Vasut1-0/+33
Add Multi-Inno Technology MI0700S4T-6 7" 800x480 DPI panel support. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Sam Ravnborg <sam@ravnborg.org> To: dri-devel@lists.freedesktop.org Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20211222133250.6628-1-marex@denx.de
2022-01-27drm: mxsfb: Shutdown the display on system shutdownMarek Vasut1-0/+8
When the system shuts down or warm reboots, the display may be active. Implement the platform_driver .shutdown() operation and shut down the display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220101213755.506404-1-marex@denx.de
2022-01-27drm: mxsfb: Shutdown the display on removeMarek Vasut1-0/+1
When the device is unbound from the driver, the display may be active. Make sure it gets shut down. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20211231160056.302276-1-marex@denx.de
2022-01-27drm/simpledrm: Request memory region in driverThomas Zimmermann1-5/+17
Requesting the framebuffer memory in simpledrm marks the memory range as busy. This used to be done by the firmware sysfb code, but the driver is the correct place. v2: * use I/O memory if request_mem_region() fails (Jocelyn) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220125091222.21457-4-tzimmermann@suse.de
2022-01-26drm/i915/guc: Update guc shim control programming on newer platformsDaniele Ceraolo Spurio1-3/+5
Starting from xehpsdv, bit 0 of the GuC shim control register has been repurposed, while bit 2 is now reserved, so we need to avoid setting those for their old meaning on newer platforms. Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Cc: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120222436.3449778-1-daniele.ceraolospurio@intel.com
2022-01-26drm/i915/wopcm: Handle pre-programmed WOPCM registersDaniele Ceraolo Spurio5-7/+43
Starting from DG2, some of the programming previously done by i915 and the GuC has been moved to the GSC and the relevant registers are no longer writable by either CPU or GuC. This is also referred to as GuC deprivilege. On the i915 side, this affects the WOPCM registers: these are no longer programmed by the driver and we do instead expect to find them already set. This can lead to verification failures because in i915 we cheat a bit with the WOPCM size defines, to keep the code common across platforms, by sometimes using a smaller WOPCM size that the actual HW support (which isn't a problem because the extra size is not needed if the FW fits in the smaller chunk), while the pre-programmed values can use the actual size. Given tha the new programming entity is trusted, relax the amount of the checks done on the pre-programmed values by not limiting the max programmed size. In the extremely unlikely scenario that the registers have been misprogrammed, we will still fail later at DMA time. v2: drop special case for DG2 G10 A0 (Alan) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Stuart Summers <stuart.summers@intel.com> Cc: John Harrison <john.c.harrison@intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220120212947.3440448-1-daniele.ceraolospurio@intel.com
2022-01-26drm/i915: Clean up PIPESRC definesVille Syrjälä3-5/+10
Use REG_GENMASK() & co. when dealing with PIPESRC. Note that i9xx_get_initial_plane_config() will now use the full 16 bit mask whereas previously it used 12 bits only. But intel_get_pipe_src_size() already used the full 16 bits on all platforms anyway, so at least we're consistent now. The high bits beyond the max supported pipe source size should not be set in any case so this seems fine. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL bit definesVille Syrjälä2-38/+33
Use REG_BIT & co. for PCH_TRANSCONF/TRANS_DP_CTL bits, and adjust the naming a some bits to be more consistent. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up PIPECONF bit definesVille Syrjälä6-98/+89
Use REG_BIT() & co. for PIPECONF bits, and adjust the naming of various bits to be more consistent. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up SKL_BOTTOM_COLOR definesVille Syrjälä1-2/+2
Use REG_BIT() for SKL_BOTTOM_COLOR. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Clean up PIPEMISC register definesVille Syrjälä2-25/+28
Use REG_BIT() & co. for PIPEMISC* bits, and while at it fill in the missing dithering bits since we already had some of them defined. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915/rpl-s: Add stepping infoAnusha Srivatsa1-0/+8
Add stepping-substepping info in accordance to BSpec changes. Though it looks weird, the revision ID for the newer stepping is indeed backwards and is in accordance to the spec. v2: Rearrange the platforms in logical order (Matt) Bspec: 53655 Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220125223625.4139326-1-anusha.srivatsa@intel.com
2022-01-26drm/i915: Bump DSL linemask to 20 bitsVille Syrjälä3-15/+6
Since tgl PIPE_DSL has 20 bits for the scanline. Let's bump our definition to match. And while at it let's also add the define for the current field readback. We can also get rid of the gen2 vs. gen3+ nonsense since none of the extra bits ever did anything and just always read as zero. And now we extend all platforms to use the tgl+ 20 bits deinition, but again that is fine since all the bits used to be mbz and always read as zero on all the platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Use single_enabled_crtc() in i9xx_update_wm()Ville Syrjälä1-15/+11
Replace the ad-hoc single_enabled_crtc() thing in i9xx_update_wm() with the real thing, just like we do in the other legacy wm functions. We can also nuke the extra 'enabled' variable. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Use the correct plane source width in watermark calculationsVille Syrjälä1-11/+10
Currently we sometimes use the plane destination width, or just the pipe src width as the plane source width in the watermark calculatons. Use the correct thing everywhere. v2: convert ilk cur/fbc cases too Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Fix up pixel_rate vs. clock confusion in wm calculationsVille Syrjälä1-30/+22
Use pixel_rate rather than crtc_clock in the watermark calculations. These are actually identical on gmch platforms for now since we don't adjust the pixel rate based on pfit downscaling. But pixel_rate is the thing we are actually interested here so use the proper name for it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26gpu: drm: panel-edp: Add panels planned for sc7180-trogdor-pazquelYunlong Jia1-0/+17
We have added corresponding information: [BOE]NV116WHM-N45 use delay_200_500_e50 [KDB]116N29-30NK-C007 use delay_200_500_e80_d50 [STA]2081116HHD028001-51D use delay_100_500_e200 Add 3 panels & 2 delay. Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Signed-off-by: Grace Mi <grace.mi@ecs.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220120064457.1.I337b8db7efaba8eb9c0ffd4da0d8c8133faf6f19@changeid
2022-01-26drm/ttm: add a weak BO reference to the resource v3Christian König2-2/+14
Keep track for which BO a resource was allocated. This is necessary to move the LRU handling into the resources. A bit problematic is i915 since it tries to use the resource interface without a BO which is illegal from the conceptional point of view. v2: Document that this is a weak reference and add a workaround for i915 v3: further document that this is protected by ttm_device::lru_lock and clarify the i915 workaround Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124122514.1832-4-christian.koenig@amd.com
2022-01-26drm/ttm: add back a reference to the bdev to the res managerChristian König10-10/+15
It is simply a lot cleaner to have this around instead of adding the device throughout the call chain. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220124122514.1832-3-christian.koenig@amd.com
2022-01-26drm/privacy-screen: honor acpi=off in detect_thinkpad_privacy_screenTong Zhang1-0/+3
when acpi=off is provided in bootarg, kernel crash with [ 1.252739] BUG: kernel NULL pointer dereference, address: 0000000000000018 [ 1.258308] Call Trace: [ 1.258490] ? acpi_walk_namespace+0x147/0x147 [ 1.258770] acpi_get_devices+0xe4/0x137 [ 1.258921] ? drm_core_init+0xc0/0xc0 [drm] [ 1.259108] detect_thinkpad_privacy_screen+0x5e/0xa8 [drm] [ 1.259337] drm_privacy_screen_lookup_init+0xe/0xe85 [drm] The reason is that acpi_walk_namespace expects acpi related stuff initialized but in fact it wouldn't when acpi is set to off. In this case we should honor acpi=off in detect_thinkpad_privacy_screen(). Signed-off-by: Tong Zhang <ztong0001@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220123091004.763775-1-ztong0001@gmail.com
2022-01-26drm/ttm: add ttm_resource_fini v2Christian König12-6/+45
Make sure we call the common cleanup function in all implementations of the resource manager. v2: fix missing case in i915, rudimentary kerneldoc, should be filled in more when we add more functionality Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220124122514.1832-2-christian.koenig@amd.com
2022-01-26drm/i915: Fix vma resource freeingThomas Hellström2-3/+4
In some cases we use leftover kfree() instead of i915_vma_resource_free(). Fix this. Fixes: 2f6b90da9192 ("drm/i915: Use vma resources for async unbinding") Reported-by: Robert Beckett <bob.beckett@collabora.com> Cc: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220119174734.213552-1-thomas.hellstrom@linux.intel.com
2022-01-26drm/i915: Move dsc/joiner enable into hsw_crtc_enable()Ville Syrjälä3-15/+5
Lift the dsc/joiner enable up from the wonky places where it currently sits (ddi .pre_enable() or icl_ddi_bigjoiner_pre_enable()) into hsw_crtc_enable() where we write the other per-pipe stuff as well. Makes the transcoder vs. pipe split less confusing. For DSI this results in slight reordering between the dsc/joiner enable vs. transcoder timings setup, but I can't really think why that should cause any issues since the transcoder isn't yet enabled at that point. v2: Take care of dsi (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220125063937.7003-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Extract hsw_configure_cpu_transcoder()Ville Syrjälä1-15/+23
Pull the transcoder specific modeset steps into a single place. With bigoiner we need to keep in mind wheher we're dealing with the transcoder or the pipe, and a slightly higher level split makes that easier. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915: Use per-device debugs for bigjoiner stuffVille Syrjälä1-9/+13
Specify which device we're talking about when spewing bigjoiner debugs. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-3-ville.syrjala@linux.intel.com
2022-01-26drm/i915: Simplify intel_dsc_source_support()Ville Syrjälä1-6/+1
We can simplify the icl check in intel_dsc_source_support() by noting that the only case when DSC is not supported is when using transcoder A. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-2-ville.syrjala@linux.intel.com
2022-01-26drm/i915: Skip dsc readout if the transcoder is disabledVille Syrjälä1-3/+3
Trying to do readout when we don't even have a cpu transcoder is not a great idea. Don't do it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124192638.26262-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-26drm/i915/guc: Use struct_size() helper in kmalloc()Gustavo A. R. Silva1-1/+1
Make use of the struct_size() helper instead of an open-coded version, in order to avoid any potential type mistakes or integer overflows that, in the worst scenario, could lead to heap overflows. Also, address the following sparse warnings: drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c:792:23: warning: using sizeof on a flexible structure Link: https://github.com/KSPP/linux/issues/174 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220125180726.GA68646@embeddedor
2022-01-26Revert "drm/ast: Support 1600x900 with 108MHz PCLK"Dave Airlie1-2/+0
This reverts commit 9bb7b689274b67ecb3641e399e76f84adc627df1. This caused a regression reported to Red Hat. Fixes: 9bb7b689274b ("drm/ast: Support 1600x900 with 108MHz PCLK") Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220120040527.552068-1-airlied@gmail.com
2022-01-26Merge drm/drm-fixes into drm-misc-fixesThomas Zimmermann1084-24765/+43051
Backmerging drm/drm-fixes into drm-misc-fixes for v5.17-rc1. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2022-01-26drm/i915: Don't allocate extra ddb during async flip for DG2Stanislav Lisovskiy1-0/+19
In terms of async flip optimization we don't to allocate extra ddb space, so lets skip it. v2: - Extracted min ddb async flip check to separate function (Ville Syrjälä) - Used this function to prevent false positive WARN to be triggered(Ville Syrjälä) v3: - Renamed dg2_need_min_ddb to need_min_ddb thus making it more universal. - Also used DISPLAY_VER instead of IS_DG2(Ville Syrjälä) - Use rate = 0 instead of just setting extra = 0, thus letting other planes to use extra ddb and avoiding WARN (Ville Syrjälä) v4: - Renamed needs_min_ddb as s/needs/use/ to match the wm0 counterpart(Ville Syrjälä) - Added plane->async_flip check to use_min_ddb(now passing plane as a parameter to do that)(Ville Syrjälä) - Account for use_min_ddb also when calculating total data rate (Ville Syrjälä) v5: - Use for_each_intel_plane_on_crtc instead of for_each_intel_plane_id to get plane->async_flip check and account for all planes(Ville Syrjälä) - Fix line wrapping(Ville Syrjälä) - Set plane data rate conditionally, avoiding on redundant assignment (Ville Syrjälä) - Removed redundant whitespace(Ville Syrjälä) - Handle use_min_ddb case in skl_plane_relative_data_rate instead of icl_get_total_relative_data_rate(Ville Syrjälä) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-2-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Use wm0 only during async flips for DG2Stanislav Lisovskiy2-2/+36
This optimization allows to achieve higher perfomance during async flips. For the first async flip we have to still temporarily switch to sync flip, in order to reprogram plane watermarks, so this requires taking into account old plane state's do_async_flip flag. v2: - Removed redundant new_plane_state->do_async_flip check from needs_async_flip_wm_override condition (Ville Syrjälä) - Extract dg2_async_flip_optimization to separate function(Ville Syrjälä) - Check for plane->async_flip instead of plane_id (Ville Syrjälä) v3: - Rename "needs_async_flip_wm_override" to "intel_plane_do_async_flip" and move all the required checks there (Ville Syrjälä) - Rename "dg2_async_flip_optimization" to "use_minimal_wm0_only" (Ville Syrjälä) v4: - Swap new/old_crtc_state in intel_plane_do_async_flip argument list(Ville Syrjälä) - Use plane->base.dev to grab i915 pointer in intel_plane_do_async_flip(Ville Syrjälä) - Remove const modifier from plane parameter in use_minimal_wm0_only(Ville Syrjälä) - Swap also new/old_crtc_state at intel_plane_do_async_flip call site(Ville Syrjälä) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124094929.31722-1-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Introduce do_async_flip flag to intel_plane_stateStanislav Lisovskiy3-3/+12
There might be various logical contructs when we might want to enable async flip, so lets calculate those and set this flag, so that there is no need in long conditions in other places. v2: - Set do_async_flip flag to False, if no async flip needed. Lets not rely that it will be 0-initialized, but set explicitly, so that the logic is clear as well. v3: - Clear do_async_flip in intel_plane_duplicate_state(Ville Syrjälä) - Check with do_async_flip also when calling intel_crtc_{enable,disable}_flip_done(Ville Syrjälä) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-3-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Pass plane to watermark calculation functionsStanislav Lisovskiy2-16/+22
Sometimes we might need to change the way we calculate watermarks, based on which particular plane it is calculated for. Thus it would be convenient to pass plane struct to those functions. v2: Pass plane instead of plane_id v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä) v4: - Make intel_crtc_get_plane static again(Ville Syrjälä) - s/cursor_plane/plane(Ville Syrjälä) - Pass plane to skl_compute_wm_* instead of plane_id(Ville Syrjälä) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124090653.14547-2-stanislav.lisovskiy@intel.com
2022-01-26drm/i915: Introduce ilk_pch_pre_enable()Ville Syrjälä3-4/+17
Complete the ilk pch modeset abstraction by adding ilk_pch_pre_enable(). I did the disable vs. post_disable split already for the disable sequence, but the enable sequence was still left with the naked ilk_fdi_pll_enable() call for some reason. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220124193136.2397-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-01-25drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for referenceUmesh Nerlige Ramappa3-14/+50
All timestamps returned by GuC for GuC PMU busyness are captured from GUC PM TIMESTAMP. Since this timestamp does not tick when GuC goes idle, kmd uses RING_TIMESTAMP to measure busyness of an engine with an active context. In further stress testing, the MMIO read of the RING_TIMESTAMP is seen to cause a rare hang. Resolve the issue by using gt specific timestamp from PM which is in sync with the GuC PM timestamp. Fixes: 77cdd054dd2c ("drm/i915/pmu: Connect engine busyness stats from GuC to pmu") Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111015523.225562-1-umesh.nerlige.ramappa@intel.com
2022-01-25drm/i915/selftests: Use less in contexts steal guc id testMatthew Brost1-1/+1
Using more guc_ids in the stealing guc id test has no real benefit. Tearing down lots of contexts all at the same time takes a bit of time due to the H2G / G2H ping-pong with the GuC. On some slower platforms this can cause timeous when flushing the test as the GT isn't idle when this ping-pong is happening. Reduce the number of guc ids to speed up the flushing of the test. Link: https://gitlab.freedesktop.org/drm/intel/-/issues/4821 Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220122000822.25616-1-matthew.brost@intel.com
2022-01-25drm/amd/display: convert to DCE IP version checkingTim Huang1-6/+4
Use IP versions rather than asic_type to differentiate IP version specific features. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amdgpu: convert to UVD IP version checkingTim Huang1-2/+7
Use IP versions rather than asic_type to differentiate IP version specific features. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amdgpu: convert to NBIO IP version checkingTim Huang1-13/+31
Use IP versions rather than asic_type to differentiate IP version specific features. Signed-off-by: Tim Huang <tim.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/display: don't use /** for non-kernel-doc commentsRandy Dunlap1-1/+1
Change a static function's comment from "/**" (indicating kernel-doc notation) to "/*" (indicating a regular C language comment). This prevents multiple kernel-doc warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:4343: warning: Function parameter or member 'max_supported_frl_bw_in_kbps' not described in 'intersect_frl_link_bw_support' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:4343: warning: Function parameter or member 'hdmi_encoded_link_bw' not described in 'intersect_frl_link_bw_support' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:4343: warning: expecting prototype for Return PCON's post FRL link training supported BW if its non(). Prototype was for intersect_frl_link_bw_support() instead Fixes: c022375ae095 ("drm/amd/display: Add DP-HDMI FRL PCON Support in DC") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Fangzhi Zuo <Jerry.Zuo@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/radeon: remove redundant assignment to regColin Ian King1-1/+0
The pointer reg is being assigned a value that is not read, the exit path via label 'out' never accesses it. The assignment is redundant and can be removed. Cleans up clang scan build warning: drivers/gpu/drm/radeon/radeon_object.c:570:3: warning: Value stored to 'reg' is never read [deadcode.DeadStores] Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/pm: return -ENOTSUPP if there is no get_dpm_ultimate_freq functionTom Rix1-1/+1
clang static analysis reports this represenative problem amdgpu_smu.c:144:18: warning: The left operand of '*' is a garbage value return clk_freq * 100; ~~~~~~~~ ^ If there is no get_dpm_ultimate_freq function, smu_get_dpm_freq_range returns success without setting the output min,max parameters. So return an -ENOTSUPP error. Fixes: e5ef784b1e17 ("drm/amd/powerplay: revise calling chain on retrieving frequency range") Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/display: Wrap dcn301_calculate_wm_and_dlg for FPU.Bas Nieuwenhuizen3-2/+13
Mirrors the logic for dcn30. Cue lots of WARNs and some kernel panics without this fix. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/display: Fix FP start/end for dcn30_internal_validate_bw.Bas Nieuwenhuizen1-2/+2
It calls populate_dml_pipes which uses doubles to initialize the scale_ratio_depth params. Mirrors the dcn20 logic. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/display: Fix a NULL pointer dereference in amdgpu_dm_connector_add_common_modes()Zhou Qingyang1-0/+3
In amdgpu_dm_connector_add_common_modes(), amdgpu_dm_create_common_mode() is assigned to mode and is passed to drm_mode_probed_add() directly after that. drm_mode_probed_add() passes &mode->head to list_add_tail(), and there is a dereference of it in list_add_tail() without recoveries, which could lead to NULL pointer dereference on failure of amdgpu_dm_create_common_mode(). Fix this by adding a NULL check of mode. This bug was found by a static analyzer. Builds with 'make allyesconfig' show no new warnings, and our static analyzer no longer warns about this code. Fixes: e7b07ceef2a6 ("drm/amd/display: Merge amdgpu_dm_types and amdgpu_dm") Signed-off-by: Zhou Qingyang <zhou1615@umn.edu> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd/display/dc/calcs/dce_calcs: Fix a memleak in calculate_bandwidth()Zhou Qingyang1-2/+2
In calculate_bandwidth(), the tag free_sclk and free_yclk are reversed, which could lead to a memory leak of yclk. Fix this bug by changing the location of free_sclk and free_yclk. This bug was found by a static analyzer. Builds with 'make allyesconfig' show no new warnings, and our static analyzer no longer warns about this code. Fixes: 2be8989d0fc2 ("drm/amd/display/dc/calcs/dce_calcs: Move some large variables from the stack to the heap") Signed-off-by: Zhou Qingyang <zhou1615@umn.edu> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amdgpu: convert amdgpu_display_supported_domains() to IP versionsAlex Deucher1-12/+17
Check IP versions rather than asic types. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amdgpu: handle BACO synchronization with secondary funcsAlex Deucher1-12/+18
Extend secondary function handling for runtime pm beyond audio to USB and UCSI. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>