aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/i2c (follow)
AgeCommit message (Collapse)AuthorFilesLines
2015-11-20i2c: i801: add Intel Lewisburg device IDsAlexandra Yates2-0/+7
Adding Intel codename Lewisburg platform device IDs for SMBus. Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20i2c: fix wakeup irq parsingGrygorii Strashko1-1/+1
This patch fixes obvious copy-past error in wake up irq parsing code which leads to the fact that dev_pm_set_wake_irq() will be called with wrong IRQ number when "wakeup" IRQ is not defined in DT. Fixes: 3fffd1283927 ("i2c: allow specifying separate wakeup interrupt in device tree") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: <stable@vger.kernel.org> # v4.3
2015-11-20i2c: xiic: Prevent concurrent running of the IRQ handler and __xiic_start_xfer()Lars-Peter Clausen1-2/+1
Prior to commit e6c9a037bc8a ("i2c: xiic: Remove the disabling of interrupts") IRQs where disabled when the initial __xiic_start_xfer() was called. After the commit the interrupt is enabled while the function is running, this means it is possible for the interrupt to be triggered while the function is still running. When this happens the internal data structures get corrupted and undefined behavior can occur like the following crash: Internal error: Oops: 17 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 2040 Comm: i2cdetect Not tainted 4.0.0-02856-g047a308 #10956 Hardware name: Xilinx Zynq Platform task: ee0c9500 ti: e99a2000 task.ti: e99a2000 PC is at __xiic_start_xfer+0x6c4/0x7c8 LR is at __xiic_start_xfer+0x690/0x7c8 pc : [<c02bbffc>] lr : [<c02bbfc8>] psr: 800f0013 sp : e99a3da8 ip : 00000000 fp : 00000000 r10: 00000001 r9 : 600f0013 r8 : f0180000 r7 : f0180000 r6 : c064e444 r5 : 00000017 r4 : ee031010 r3 : 00000000 r2 : 00000000 r1 : 600f0013 r0 : 0000000f Flags: Nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 18c5387d Table: 29a5404a DAC: 00000015 Process i2cdetect (pid: 2040, stack limit = 0xe99a2210) Stack: (0xe99a3da8 to 0xe99a4000) 3da0: ee031010 00000000 00000001 ee031020 ee031224 c02bc5ec 3dc0: ee34c604 00000000 ee0c9500 e99a3dcc e99a3dd0 e99a3dd0 e99a3dd8 c069f0e8 3de0: 00000000 ee031020 c064e100 ffff90bb e99a3e48 c02b6590 ee031020 00000001 3e00: e99a3e48 ee031020 00000000 e99a3e63 00000001 c02b6ec4 00000000 00000000 3e20: 00000000 c02b7320 e99a3ef0 00000000 00000000 e99e3df0 00000000 00000000 3e40: 00000103 2814575f 0000003e c00a0000 e99a3e85 0001003e ee0c0000 e99a3e63 3e60: eefd3578 c064e61c ee0c9500 c0041e04 0000056c e9a56db8 00006e5a b6f5c000 3e80: ee0c9548 eefd0040 00000001 eefd3540 ee0c9500 eefd39a0 c064b540 ee0c9500 3ea0: 00000000 ee92b000 00000000 bef4862c ee34c600 e99ecdc0 00000720 00000003 3ec0: e99a2000 00000000 00000000 c02b8b30 00000000 00000000 00000000 e99a3f24 3ee0: b6e80000 00000000 00000000 c04257e8 00000000 e99a3f24 c02b8f08 00000703 3f00: 00000003 c02116bc ee935300 00000000 bef4862c ee34c600 e99ecdc0 c02b91f0 3f20: e99ecdc0 00000720 bef4862c eeb725f8 e99ecdc0 c00c9e2c 00000003 00000003 3f40: ee248dc0 00000000 ee248dc8 00000002 eeb7c1a8 00000000 00000000 c00bb360 3f60: 00000000 00000000 00000003 ee248dc0 bef4862c e99ecdc0 e99ecdc0 00000720 3f80: 00000003 e99a2000 00000000 c00c9f68 00000000 00000000 b6f22000 00000036 3fa0: c000dfa4 c000de20 00000000 00000000 00000003 00000720 bef4862c bef4862c 3fc0: 00000000 00000000 b6f22000 00000036 00000000 00000000 b6f60000 00000000 3fe0: 00013040 bef48614 00008cab b6ecdbe6 400f0030 00000003 2f7fd821 2f7fdc21 [<c02bbffc>] (__xiic_start_xfer) from [<c02bc5ec>] (xiic_xfer+0x94/0x168) [<c02bc5ec>] (xiic_xfer) from [<c02b6590>] (__i2c_transfer+0x4c/0x7c) [<c02b6590>] (__i2c_transfer) from [<c02b6ec4>] (i2c_transfer+0x9c/0xc4) [<c02b6ec4>] (i2c_transfer) from [<c02b7320>] (i2c_smbus_xfer+0x3a0/0x4ec) [<c02b7320>] (i2c_smbus_xfer) from [<c02b8b30>] (i2cdev_ioctl_smbus+0xb0/0x214) [<c02b8b30>] (i2cdev_ioctl_smbus) from [<c02b91f0>] (i2cdev_ioctl+0xa0/0x1d4) [<c02b91f0>] (i2cdev_ioctl) from [<c00c9e2c>] (do_vfs_ioctl+0x4b0/0x5b8) [<c00c9e2c>] (do_vfs_ioctl) from [<c00c9f68>] (SyS_ioctl+0x34/0x5c) [<c00c9f68>] (SyS_ioctl) from [<c000de20>] (ret_fast_syscall+0x0/0x34) Code: e283300c e5843210 eafffe64 e5943210 (e1d320b4) The issue can easily be reproduced by performing I2C access under high system load or IO load. To fix the issue protect the invocation to __xiic_start_xfer() form xiic_start_xfer() with the same lock that is used to protect the interrupt handler. Fixes: e6c9a037bc8a ("i2c: xiic: Remove the disabling of interrupts") Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20i2c: Revert "i2c: xiic: Do not reset controller before every transfer"Lars-Peter Clausen1-0/+3
Commit d701667bb331 ("i2c: xiic: Do not reset controller before every transfer") removed the reinitialization of the controller before the start of each transfer. Apparently this change is not safe to make and the commit results in random I2C bus failures. An easy way to trigger the issue is to run i2cdetect. Without the patch applied: 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- UU UU -- UU 3c -- -- UU 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- With the patch applied every other or so invocation: 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10: 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20: 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30: -- -- -- -- -- -- -- -- UU UU -- UU 3c -- -- UU 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- So revert the commit for now. Fixes: d701667bb331 ("i2c: xiic: Do not reset controller before every transfer") Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20i2c: imx: fix a compiling errorHou Zhiqiang1-0/+1
drivers/i2c/busses/i2c-imx.c:978:2: error: implicit declaration of function ‘pinctrl_select_state’ [-Werror=implicit-function-declaration] pinctrl_select_state(i2c_imx->pinctrl, i2c_imx->pinctrl_pins_gpio); ^ Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-10Merge branch 'i2c/for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linuxLinus Torvalds30-358/+1547
Pull i2c updates from Wolfram Sang: - New drivers: UniPhier (with and without FIFO) - some drivers got some bigger rework: ismt, designware, img-scb (rcar had to be reverted because issues were showing up just lately) - ACPI: reworked the device scanning and added support for muxes ... and quite a lot of driver bugfixes and cleanups this time. All files touched outside of the i2c realm have proper acks. * 'i2c/for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (70 commits) i2c: rcar: Revert the latest refactoring series i2c: pnx: remove superfluous assignment MAINTAINERS: i2c: drop i2c-pnx maintainer MAINTAINERS: i2c: mark also subdirectories as maintained i2c: cadence: enable driver for ARM64 i2c: i801: Document Intel DNV and Broxton i2c: at91: manage unexpected RXRDY flag when starting a transfer i2c: pnx: Use setup_timer instead of open coding it i2c: add ACPI support for I2C mux ports acpi: add acpi_preset_companion() stub i2c: pxa: Add support for pxa910/988 & new configuration features i2c: au1550: Convert to devm_kzalloc and devm_ioremap_resource i2c-dev: Fix I2C_SLAVE ioctl comment i2c-dev: Fix typo in ioctl name reference i2c: sirf: tune the divider to make i2c bus freq more accurate i2c: imx: Use -ENXIO as error in the NACK case i2c: i801: Add support for Intel Broxton i2c: i801: Add support for Intel DNV i2c: mediatek: add i2c resume support i2c: imx: implement bus recovery ...
2015-11-06Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-genericLinus Torvalds1-1/+1
Pull asm-generic cleanups from Arnd Bergmann: "The asm-generic changes for 4.4 are mostly a series from Christoph Hellwig to clean up various abuses of headers in there. The patch to rename the io-64-nonatomic-*.h headers caused some conflicts with new users, so I added a workaround that we can remove in the next merge window. The only other patch is a warning fix from Marek Vasut" * tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: asm-generic: temporarily add back asm-generic/io-64-nonatomic*.h asm-generic: cmpxchg: avoid warnings from macro-ized cmpxchg() implementations gpio-mxc: stop including <asm-generic/bug> n_tracesink: stop including <asm-generic/bug> n_tracerouter: stop including <asm-generic/bug> mlx5: stop including <asm-generic/kmap_types.h> hifn_795x: stop including <asm-generic/kmap_types.h> drbd: stop including <asm-generic/kmap_types.h> move count_zeroes.h out of asm-generic move io-64-nonatomic*.h out of asm-generic
2015-10-30i2c: rcar: Revert the latest refactoring seriesWolfram Sang1-71/+122
This whole series caused sometimes timeouts and even OOPSes on some r8a7791 Koelsch boards. We need to understand and fix those first. Revert "i2c: rcar: clean up after refactoring" Revert "i2c: rcar: revoke START request early" Revert "i2c: rcar: check master irqs before slave irqs" Revert "i2c: rcar: don't issue stop when HW does it automatically" Revert "i2c: rcar: init new messages in irq" Revert "i2c: rcar: refactor setup of a msg" Revert "i2c: rcar: remove spinlock" Revert "i2c: rcar: remove unused IOERROR state" Revert "i2c: rcar: rework hw init" Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-30i2c: pnx: remove superfluous assignmentWolfram Sang1-1/+1
smatch rightfully says: drivers/i2c/busses/i2c-pnx.c:499 i2c_pnx_xfer warn: unused return: stat = ioread32() Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26i2c: cadence: enable driver for ARM64Michal Simek1-1/+1
This IP is available on Xilinx ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26i2c: i801: Document Intel DNV and BroxtonJarkko Nikula1-0/+2
Add missing entries into i2c-i801 documentation and Kconfig about recently added Intel DNV and Broxton. Reported-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26i2c: at91: manage unexpected RXRDY flag when starting a transferLudovic Desroches1-10/+26
In some cases, we could start a new i2c transfer with the RXRDY flag set. It is not a clean state and it leads to print annoying error messages even if there no real issue. The cause is only having garbage data in the Receive Holding Register because of a weird behavior of the RXRDY flag. Reported-by: Peter Rosin <peda@lysator.liu.se> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Tested-by: Peter Rosin <peda@lysator.liu.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA controller") Cc: stable@vger.kernel.org #4.1
2015-10-25i2c: pnx: Use setup_timer instead of open coding itMuhammad Falak R Wani1-3/+2
Use timer API function setup_timer instead of init_timer to initialize the timer. Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-25i2c: add ACPI support for I2C mux portsDustin Byford6-14/+18
Although I2C mux devices are easily enumerated using ACPI (_HID/_CID or device property compatible string match), enumerating I2C client devices connected through an I2C mux needs a little extra work. This change implements a method for describing an I2C device hierarchy that includes mux devices by using an ACPI Device() for each mux channel along with an _ADR to set the channel number for the device. See Documentation/acpi/i2c-muxes.txt for a simple example. To make this work the ismt, i801, and designware pci/platform devs now share an ACPI companion with their I2C adapter dev similar to how it's done in OF. This is done on the assumption that power management functions will not be called directly on the I2C dev that is sharing the ACPI node. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-25i2c: pxa: Add support for pxa910/988 & new configuration featuresVaibhav Hiremath1-1/+40
TWSI_ILCR & TWSI_IWCR registers are used to adjust clock rate of standard & fast mode in pxa910/988; so this patch adds these two new entries to "struct pxa_reg_layout" and "struct pxa_i2c". Signed-off-by: Jett.Zhou <jtzhou@marvell.com> Signed-off-by: Yi Zhang <yizhang@marvell.com> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> [wsa: white space fixes] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: au1550: Convert to devm_kzalloc and devm_ioremap_resourceAxel Lin1-39/+13
Use devm_* APIs to simplify the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c-dev: Fix I2C_SLAVE ioctl commentJean Delvare1-10/+7
The first part of the comment is wrong since November 2007, delete it. The second part of the comment is related to I2C_PEC, not I2C_SLAVE, so move it where it belongs. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c-dev: Fix typo in ioctl name referenceJean Delvare1-3/+3
The ioctl is named I2C_RDWR for "I2C read/write". But references to it were misspelled "rdrw". Fix them. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: sirf: tune the divider to make i2c bus freq more accurateGuoying Zhang1-4/+22
In prima2 and atlas7, due to some hardware design issue. we need to adjust the divider ratio a little according to i2c bus frequency ranges. Since i2c is open drain interface that allows the slave to stall the transaction by holding the SCL line at '0', the RTL implementation is waiting for SCL feedback from the pin after setting it to High-Z ('1'). This wait adds to the high-time interval counter few cycles of the input synchronization (depending on the SCL_FILTER_REG field), and also the time it takes for the board pull-up resistor to rise the SCL line. For slow SCL settings these additions are negligible, but they start to affect the speed when clock is set to faster frequencies. This patch is based on the actual tests, and it makes SCL more accurate. Signed-off-by: Guoying Zhang <Guoying.Zhang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: pnx: fix runtime warnings caused by enabling unprepared clockVladimir Zapolskiy1-5/+5
The driver can not be used on a platform with common clock framework until clk_prepare/clk_unprepare calls are added, otherwise clk_enable calls will fail and a WARN is generated. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: imx: Use -ENXIO as error in the NACK caseFabio Estevam1-1/+1
According to Documentation/i2c/fault-codes the response to a bus NACK should be -ENXIO, so fix the error code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: i801: Add support for Intel BroxtonJarkko Nikula1-0/+3
This patch adds the SMBUS PCI ID of Intel Broxton. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: i801: Add support for Intel DNVMika Westerberg1-0/+4
Intel DNV SoC has the same legacy SMBus host controller than Intel Sunrisepoint PCH. It also has same iTCO watchdog on the bus. Add DNV PCI ID to the list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: mediatek: add i2c resume supportLiguo Zhang1-0/+16
mt65xx i2c controller initial setting will be cleared after system suspend, so we should init mt65xx i2c controller again when system resume. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: imx: implement bus recoveryGao Pan1-0/+71
Implement bus recovery methods for i2c-imx so we can recover from situations where SCL/SDA are stuck low. Once i2c bus SCL/SDA are stuck low during transfer, config the i2c pinctrl to gpio mode by calling pinctrl sleep set function, and then use GPIO to emulate the i2c protocol to send nine dummy clock to recover i2c device. After recovery, set i2c pinctrl to default group setting. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Gao Pan <b54642@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: uniphier_f: add UniPhier FIFO-builtin I2C driverMasahiro Yamada3-0/+593
Add support for on-chip I2C controller used on newer UniPhier SoCs such as PH1-Pro4, PH1-Pro5, etc. This adapter is equipped with 8-depth TX/RX FIFOs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: uniphier: add UniPhier FIFO-less I2C driverMasahiro Yamada3-0/+450
Add support for on-chip I2C controller used on old UniPhier SoCs such as PH1-LD4, PH1-sLD8, etc. This adapter is so simple that it has no FIFO in it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: designware: reverts "i2c: designware: Add support for AMD I2C controller"Ken Xue1-26/+1
The patch reverts commit a445900c9060 (i2c: designware: Add support for AMD I2C controller). It never worked anyhow because it did not register a proper clkdev. Since kernel 4.1 starts to support APD, there is no need to get freq from id->driver_data for AMD0010. clkdev is supposed to be already registered in APD. So, revert old design and make AMD0010 looks like other ones. Signed-off-by: Ken Xue <Ken.Xue@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-23i2c: imx: add support for Freescale Layerscape platformsShaohui Xie1-2/+2
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-22i2c: at91: fix write transfers by clearing pending interrupt firstCyrille Pitchen1-8/+50
In some cases a NACK interrupt may be pending in the Status Register (SR) as a result of a previous transfer. However at91_do_twi_transfer() did not read the SR to clear pending interruptions before starting a new transfer. Hence a NACK interrupt rose as soon as it was enabled again at the I2C controller level, resulting in a wrong sequence of operations and strange patterns of behaviour on the I2C bus, such as a clock stretch followed by a restart of the transfer. This first issue occurred with both DMA and PIO write transfers. Also when a NACK error was detected during a PIO write transfer, the interrupt handler used to wrongly start a new transfer by writing into the Transmit Holding Register (THR). Then the I2C slave was likely to reply with a second NACK. This second issue is fixed in atmel_twi_interrupt() by handling the TXRDY status bit only if both the TXCOMP and NACK status bits are cleared. Tested with a at24 eeprom on sama5d36ek board running a linux-4.1-at91 kernel image. Adapted to linux-next. Reported-by: Peter Rosin <peda@lysator.liu.se> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Tested-by: Peter Rosin <peda@lysator.liu.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA controller") Cc: stable@vger.kernel.org #4.1
2015-10-22i2c: designware: Fix build error when !CONFIG_PM_SLEEPJarkko Nikula1-2/+2
Commit ("i2c: designware: Rename platform driver probe and PM functions") introduced "'dw_i2c_plat_prepare' undeclared here" and "'dw_i2c_plat_complete' undeclared here" build errors when CONFIG_PM_SLEEP is not set. Fix this by renaming NULL defined dw_i2c_prepare and dw_i2c_complete PM hooks to dw_i2c_plat_prepare and dw_i2c_plat_complete since this was obviously missing from the commit. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-22i2c: mv64xxx: really allow I2C offloadingHezi Shahmoon1-2/+0
Commit 00d8689b85a7 ("i2c: mv64xxx: rework offload support to fix several problems") completely reworked the offload support, but left a debugging-related "return false" at the beginning of the mv64xxx_i2c_can_offload() function. This has the unfortunate consequence that offloading is in fact never used, which wasn't really the intention. This commit fixes that problem by removing the bogus "return false". Fixes: 00d8689b85a7 ("i2c: mv64xxx: rework offload support to fix several problems") Signed-off-by: Hezi Shahmoon <hezi@marvell.com> [Thomas: reworked commit log and title.] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: <stable@vger.kernel.org>
2015-10-20i2c: stu300: Fix module autoload for OF platform driverLuis de Bethencourt1-0/+1
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: rk3x: Fix module autoload for OF platform driverLuis de Bethencourt1-0/+1
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: meson: Fix module autoload for OF platform driverLuis de Bethencourt1-0/+1
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ibm-iic: Fix module autoload for OF platform driverLuis de Bethencourt1-0/+1
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: rcar: Remove obsolete platform data supportGeert Uytterhoeven1-19/+2
Since commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete setup code"), Renesas R-Car SoCs are only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to use platform data anymore, hence remove platform data configuration. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [wsa: removed now unused ret value and cast to proper enum type] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: sh_mobile: add support for r8a7795 (R-Car H3)Wolfram Sang1-0/+1
Enable the I2C core for this SoC. It is compitable to Gen2 SoCs, so reuse the settings. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: rcar: add support for r8a7795 (R-Car H3)Wolfram Sang1-0/+3
Enable the I2C core for this SoC. I add a new type because this version has new features (e.g. DMA) which will be added somewhen later. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ocores: support big-endian register layoutMax Filippov1-4/+27
This allows using OpenCores I2C controller attached to its host in native-endian mode with bi-endian CPUs. Example of such system is Xtensa XTFPGA platform. Acked-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: au1550: relax bus timings a bitManuel Lauss1-4/+4
The i2c-au1550 driver has to program various setup and hold times for the sda/scl signals by hand. The current values seem to be working best when the driver is supplied with 50MHz, however on the DB1300 board 48MHz is the closest we can get to it, and the timings are a bit too tight for that, leading to the last bit of a transmission sometimes being swallowed. This manifests itself in wrong readings of the ne1619 sensor and inability to configure the wm8731 i2s codec. With the relaxed timings, both the sensor and the i2s codec can now be accessed more reliably over a wider range of I2C block input frequencies. Verified on DB1200, DB1300 and DB1550 boards. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: tegra: drop duplicated code for assigning algoBarry Song1-1/+0
This code is repeated in probe: i2c_dev->adapter.algo = &tegra_i2c_algo; Cc: Donglin Peng <pengdonglin137@163.com> Signed-off-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: davinci: Optimize clock generation on Keystone SoCAlexander Sverdlin1-0/+8
According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed additive part of frequency divisors (referred as "d" in the code and datasheet) always equals to 6, independent of module clock prescaler. module clock frequency master clock frequency = ---------------------- (ICCL + 6) + (ICCH + 6) It was not the case with original Davinci IP. Introduce new compatible property "ti,keystone-i2c", which triggers special handling in the driver. Without this change Keystone-based systems (having 204.8MHz input clock) choose prescaler 29 (PSC=28). Using d=5 in this case leads to bus bitrate ~353kHz instead of requested 400kHz. After correction, assuming d=6 bus rate is ~392kHz. This gives ~11% transfer rate increase. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Hemanth Guruva Reddy <hemanth.guruva_reddy@nokia.com> Tested-by: Lukasz Gemborowski <lukasz.gemborowski@nokia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ismt: issue a warning when fail to request MSIAndy Shevchenko1-6/+5
Issue the warning in all error paths when unable to register MSI or its handler. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ismt: propagate actual error codeAndy Shevchenko1-1/+1
Propagate actual return code when requesting interrupt fails. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ismt: do not duplicate msi_enabled flagAndy Shevchenko1-5/+1
struct pci_dev already has a flag to track if MSI is enabled or not. Use it directly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ismt: PCI core handles power state for usAndy Shevchenko1-33/+0
There is no need to repeat the work that is already done in the PCI driver core. Remove suspend and resume callbacks. Note that there is no more calls performed to enable or disable a PCI device during suspend-resume cycle. Nowadays they seems to be superfluous. Someone can read more in [1]. [1] https://www.kernel.org/doc/ols/2009/ols2009-pages-319-330.pdf Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ismt: improve usage of devres APIAndy Shevchenko1-13/+5
pcim_release() will release any requested region. There is no need to duplicate this effort in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c: ismt: mark register space with __iomemAndy Shevchenko1-1/+1
This fixes the code to suppress sparse warnings like: drivers/i2c/busses/i2c-ismt.c:725:36: warning: incorrect type in argument 2 (different address spaces) drivers/i2c/busses/i2c-ismt.c:725:36: expected void volatile [noderef] <asn:2>*addr drivers/i2c/busses/i2c-ismt.c:725:36: got void * Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-20i2c / ACPI: Rework I2C device scanningMika Westerberg1-23/+59
The way we currently scan I2C devices behind an I2C host controller does not work in cases where the I2C device in question is not declared directly below the host controller ACPI node. This is perfectly legal according the ACPI 6.0 specification and some existing systems are doing this. To be able to enumerate all devices which are connected to a certain I2C host controller we need to rework the current I2C scanning routine a bit. Instead of scanning directly below the host controller we scan the whole ACPI namespace for present devices with valid I2cSerialBus() connection pointing to the host controller in question. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Dustin Byford <dustin@cumulusnetworks.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.