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2016-05-28i2c: dev: use after free in detachDan Carpenter1-1/+1
The call to put_i2c_dev() frees "i2c_dev" so there is a use after free when we call cdev_del(&i2c_dev->cdev). Fixes: d6760b14d4a1 ('i2c: dev: switch from register_chrdev to cdev API') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-27i2c: dev: don't start function name with 'return'Wolfram Sang1-3/+3
I stumbled multiple times over 'return_i2c_dev', especially before the actual 'return res'. It makes the code hard to read, so reanme the function to 'put_i2c_dev' which also better matches 'get_free_i2c_dev'. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-26i2c: dev: switch from register_chrdev to cdev APIErico Nunes1-4/+15
i2c-dev had never moved away from the older register_chrdev interface to implement its char device registration. The register_chrdev API has the limitation of enabling only up to 256 i2c-dev busses to exist. Large platforms with lots of i2c devices (i.e. pluggable transceivers) with dedicated busses may have to exceed that limit. In particular, there are also platforms making use of the i2c bus multiplexing API, which instantiates a virtual bus for each possible multiplexed selection. This patch removes the register_chrdev usage and replaces it with the less old cdev API, which takes away the 256 i2c-dev bus limitation. It should not have any other impact for i2c bus drivers or user space. This patch has been tested on qemu x86 and qemu powerpc platforms with the aid of a module which adds and removes 5000 virtual i2c busses, as well as validated on an existing powerpc hardware platform which makes use of the i2c bus multiplexing API. i2c-dev busses with device minor numbers larger than 256 have also been validated to work with the existing i2c-tools. Signed-off-by: Erico Nunes <erico.nunes@datacom.ind.br> [wsa: kept includes sorted] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-26i2c: xlr: rename ARCH_TANGOX to ARCH_TANGOMarc Gonzalez1-1/+1
The ARCH name was changed during the review process of the mach, and this driver was forgotten to be converted. Fix it now. http://article.gmane.org/gmane.linux.ports.arm.kernel/456331 Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [wsa: updated commit message slightly] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-26i2c: at91: change log when dma configuration failsLudovic Desroches1-1/+1
When the DMA configuration fails, there is a log reporting that we can't use DMA and indicating the error number. When booting the kernel, it is annoying to see this error number. Moreover, people can think something is going wrong. It is not the case, it means that DMA can't be used but it doesn't prevent to use i2c. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-26i2c: rcar: should depend on HAS_DMAGeert Uytterhoeven1-0/+1
If NO_DMA=y: drivers/built-in.o: In function `rcar_i2c_dma_unmap': i2c-rcar.c:(.text+0x6f06c6): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `rcar_i2c_dma': i2c-rcar.c:(.text+0x6f07e2): undefined reference to `bad_dma_ops' i2c-rcar.c:(.text+0x6f0838): undefined reference to `bad_dma_ops' Add a dependency on HAS_DMA to fix this. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-26i2c: rcar: use dma_request_chan()Niklas Söderlund1-1/+1
New drivers should not use dma_request_slave_channel_reason() but dma_request_chan(). The former is a macro to the later so this change do not effect the driver in any way. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-19Merge branch 'i2c/for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linuxLinus Torvalds39-828/+1864
Pull i2c updates from Wolfram Sang: - Peter Rosin did some major rework on the locking of i2c muxes by seperating parent-locked muxes and mux-locked muxes. This avoids deadlocks/workarounds when the mux itself needs i2c commands for muxing. And as a side-effect, other workarounds in the media layer could be eliminated. Also, Peter stepped up as the i2c mux maintainer and will keep an eye on these changes. - major updates to the octeon driver - add a helper to the core to generate the address+rw_bit octal and make drivers use it - quite a bunch of driver updates * 'i2c/for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (84 commits) i2c: rcar: add DMA support i2c: st: Implement bus clear i2c: only check scl functions when using generic recovery i2c: algo-bit: declare i2c_bit_quirk_no_clk_stretch as static i2c: tegra: disable clock before returning error [media] rtl2832: regmap is aware of lockdep, drop local locking hack [media] rtl2832_sdr: get rid of empty regmap wrappers [media] rtl2832: change the i2c gate to be mux-locked [media] si2168: change the i2c gate to be mux-locked iio: imu: inv_mpu6050: change the i2c gate to be mux-locked i2c: mux: document i2c muxes and elaborate on parent-/mux-locked muxes i2c: mux: relax locking of the top i2c adapter during mux-locked muxing i2c: muxes always lock the parent adapter i2c: allow adapter drivers to override the adapter locking i2c: uniphier: add "\n" at the end of error log i2c: mv64xxx: remove CONFIG_HAVE_CLK conditionals i2c: mv64xxx: use clk_{prepare_enable,disable_unprepare} i2c: mv64xxx: handle probe deferral for the clock i2c: mv64xxx: enable the driver on ARCH_MVEBU i2c: octeon: Add workaround for broken irqs on CN3860 ...
2016-05-15i2c: rcar: add DMA supportNiklas Söderlund1-4/+229
Make it possible to transfer i2c message buffers via DMA. Start/Stop/Sending_Slave_Address and some data is still handled using the old state machine, it is sending the bulk of the data that is done via DMA. The first byte of a transmission and the last two bytes of reception are sent/received using PIO. This is needed for the HW to have access to the first byte before DMA transmit and to be able to set the STOP condition for DMA reception. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> [wsa: fixed a checkpatch warning] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-13i2c: st: Implement bus clearPeter Griffin1-1/+44
>From I2C specifications: http://www.nxp.com/documents/user_manual/UM10204.pdf Chapter 3.1.16, when the i2c device held the SDA line low, the master should send 9 clocks pulses to try to recover. Signed-off-by: Frederic Pillon <frederic.pillon@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-13i2c: only check scl functions when using generic recoveryWolfram Sang1-3/+5
A custom recovery function doesn't need these pointers to be populated because it may work differently internally. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Tested-by: Peter Griffin <peter.griffin@linaro.org>
2016-05-11i2c: algo-bit: declare i2c_bit_quirk_no_clk_stretch as staticMichele Curti1-1/+1
i2c_bit_quirk_no_clk_stretch is used in i2c-algo-bit.c only, so declare it as static. Signed-off-by: Michele Curti <michele.curti@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-11i2c: tegra: disable clock before returning errorShardar Shariff Md1-3/+4
Disable clock before returning error in tegra_i2c_init() as its leaves i2c clock ON in case of error and never turns off again as it will have unbalanced clock enable/disable Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-04i2c: mux: relax locking of the top i2c adapter during mux-locked muxingPeter Rosin4-13/+196
With a i2c topology like the following GPIO ---| ------ BAT1 | v / I2C -----+----------+---- MUX | \ EEPROM ------ BAT2 there is a locking problem with the GPIO controller since it is a client on the same i2c bus that it muxes. Transfers to the mux clients (e.g. BAT1) will lock the whole i2c bus prior to attempting to switch the mux to the correct i2c segment. In the above case, the GPIO device is an I/O expander with an i2c interface, and since the GPIO subsystem knows nothing (and rightfully so) about the lockless needs of the i2c mux code, this results in a deadlock when the GPIO driver issues i2c transfers to modify the mux. So, observing that while it is needed to have the i2c bus locked during the actual MUX update in order to avoid random garbage on the slave side, it is not strictly a must to have it locked over the whole sequence of a full select-transfer-deselect mux client operation. The mux itself needs to be locked, so transfers to clients behind the mux are serialized, and the mux needs to be stable during all i2c traffic (otherwise individual mux slave segments might see garbage, or worse). Introduce this new locking concept as "mux-locked" muxes, and call the pre-existing mux locking scheme "parent-locked". Modify the i2c mux locking so that muxes that are "mux-locked" locks only the muxes on the parent adapter instead of the whole i2c bus when there is a transfer to the slave side of the mux. This lock serializes transfers to the slave side of the muxes on the parent adapter. Add code to i2c-mux-gpio and i2c-mux-pinctrl that checks if all involved gpio/pinctrl devices have a parent that is an i2c adapter in the same adapter tree that is muxed, and request a "mux-locked mux" if that is the case. Modify the select-transfer-deselect code for "mux-locked" muxes so that each of the select-transfer-deselect ops locks the mux parent adapter individually. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-04i2c: muxes always lock the parent adapterPeter Rosin2-18/+33
Instead of checking for i2c parent adapters for every lock/unlock, simply override the locking for muxes to always lock/unlock the parent adapter directly. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-05-04i2c: allow adapter drivers to override the adapter lockingPeter Rosin1-14/+27
Add i2c_lock_bus() and i2c_unlock_bus(), which call the new lock_bus and unlock_bus ops in the adapter. These funcs/ops take an additional flags argument that indicates for what purpose the adapter is locked. There are two flags, I2C_LOCK_ROOT_ADAPTER and I2C_LOCK_SEGMENT, but they are both implemented the same. For now. Locking the root adapter means that the whole bus is locked, locking the segment means that only the current bus segment is locked (i.e. i2c traffic on the parent side of a mux is still allowed even if the child side of the mux is locked). Also support a trylock_bus op (but no function to call it, as it is not expected to be needed outside of the i2c core). Implement i2c_lock_adapter/i2c_unlock_adapter in terms of the new locking scheme (i.e. lock with the I2C_LOCK_ROOT_ADAPTER flag). Locking the root adapter and locking the segment is the same thing for all root adapters (e.g. in the normal case of a simple topology with no i2c muxes). The two locking variants are also the same for traditional muxes (aka parent-locked muxes). These muxes traverse the tree, locking each level as they go until they reach the root. This patch is preparatory for a later patch in the series introducing mux-locked muxes, which behave differently depending on the requested locking. Since all current users are using i2c_lock_adapter, which is a wrapper for I2C_LOCK_ROOT_ADAPTER, we only need to annotate the calls that will not need to lock the root adapter for mux-locked muxes. I.e. the instances that needs to use I2C_LOCK_SEGMENT instead of i2c_lock_adapter/I2C_LOCK_ROOT_ADAPTER. Those instances are in the i2c_transfer and i2c_smbus_xfer functions, so that mux-locked muxes can single out normal i2c accesses to its slave side and adjust the locking for those accesses. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-27i2c: uniphier: add "\n" at the end of error logMasahiro Yamada2-2/+2
Just in case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-27i2c: mv64xxx: remove CONFIG_HAVE_CLK conditionalsThomas Petazzoni1-19/+6
When clock support was added to the i2c-mv64xxx, not all clk functions had stubs when for !CONFIG_HAVE_CLK configurations. However, nowadays, both "struct clk" and all the clock framework functions have stubs when CONFIG_HAVE_CLK is not enabled, so it no longer makes sense to carry such compile-time conditionals in the driver. This commit was compile tested on both ARM64 (which has both CONFIG_OF=y and CONFIG_HAVE_CLK=y) and PowerPC c2k_defconfig (which has CONFIG_OF=y, CONFIG_HAVE_CLK disabled, and the i2c-mv64xxx driver enabled). The only non-trivial change is in the mv64xxx_of_config() function, which was returning -ENODEV unconditionally if CONFIG_HAVE_CLK was disabled. Simply removing this condition works fine because the first test done by the function is to verify if drv_data->clk points to a valid clock, and if it doesn't, we return -ENODEV. When CONFIG_HAVE_CLK is disabled, devm_clk_get() unconditionally returns NULL, so mv64xxx_of_config() will return -ENODEV when no clock is provided, which is the intended behavior. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-27i2c: mv64xxx: use clk_{prepare_enable,disable_unprepare}Thomas Petazzoni1-12/+6
Instead of separately calling clk_prepare()/clk_enable(), use clk_prepare_enable(), and instead of calling clk_disable()/clk_unprepare(), use clk_disable_unprepare(). Those handy shortcuts have been introduced specifically to simplify the numerous call sites were both functions were called in sequence. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-27i2c: mv64xxx: handle probe deferral for the clockThomas Petazzoni1-0/+2
If a clock is registered by a platform driver and not by the OF_CLK_DECLARE() mechanism, it might show up after the first attempt to probe i2c-mv64xxx. In order to solve this, we need to handle -EPROBE_PREFER as a special return value of devm_clk_get(), and return the same error code from probe(). This gives us three situations: - There is no reference to a clock in the DT. In this case, devm_clk_get() returns an error that is not -EPROBE_DEFER (something like -ENODEV), and we continue the probing without enabling the clock. - There is a reference to the clock in the DT, and the clock is ready. devm_clk_get() returns a valid reference to the clock, and we prepare/enable it. - There is a reference to the clock in the DT, but the clock is not ready. devm_clk_get() returns -EPROBE_DEFER, and we exit from probe() with the same error code so that probe() is tried again later. This is needed for Marvell Armada 7K/8K, where the clock driver is a platform driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-27i2c: mv64xxx: enable the driver on ARCH_MVEBUThomas Petazzoni1-1/+1
The new ARM64 Marvell Armada 7K/8K SoC family is using the same I2C controller as the 32-bits Marvell EBU SoCs, so this commit allows mv64xxx to be enabled when ARCH_MVEBU=y. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-27i2c: octeon: Add workaround for broken irqs on CN3860David Daney1-2/+51
CN3860 does not interrupt the CPU when the i2c status changes. If we get a timeout, and see the status has in fact changed, we know we have this problem, and drop back to polling. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: nforce2: Use IS_ENABLED() instead of checking for built-in or moduleJavier Martinez Canillas1-1/+1
The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either built-in or as a module, use that macro instead of open coding the same. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: imx: reduce load by using usleep_range instead of udelayOleksij Rempel1-1/+1
Documentation/timers/timers-howto.txt recommends to use usleep_range on delays > 10usec. According to my test results with Neonode zForce touchscreen driver, usleep_range indeed reduces CPU load. Stats collected with "./perf record -a -g -F 1000 sleep 10" i2c-imx with udelay(50): 34.19% 0.00% irq/220-Neonode [kernel.kallsyms] [k] irq_thread ---irq_thread |--33.75%--irq_thread_fn | |--19.27%--0x7f08a878 | | i2c_master_recv | | i2c_transfer | | __i2c_transfer | | i2c_imx_xfer | | |--11.71%--i2c_imx_trx_complete | | |--5.70%--i2c_imx_start <<<<---------------- | | | |--5.38%--__timer_const_udelay | | | | __timer_delay | | | | --5.07%--read_current_timer i2c-imx with usleep_range(50,100) 29.08% 0.00% irq/220-Neonode [kernel.kallsyms] [k] irq_thread ---irq_thread |--28.89%--irq_thread_fn | |--17.21%--0x7f08a878 | | i2c_master_recv | | |--17.14%--i2c_transfer | | | __i2c_transfer | | | i2c_imx_xfer | | | |--14.29%--i2c_imx_trx_complete | | | |--1.42%--i2c_imx_start <<<<---------- | | | | |--0.71%--usleep_range | | | | |--0.53%--i2c_imx_bus_busy Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: octeon: Improve performance if interrupt is earlyPeter Swain1-9/+46
There is a race between the TWSI interrupt and the condition that is required before proceeding: Low-level: interrupt flag bit must be set High-level controller: valid bit must be clear If the interrupt comes too early and the condition is not met the wait will time out, and the transfer is aborted leading to very poor performance. To avoid this race retry for the condition ~80 µs later. The retry is avoided on the very first invocation of wait_event_timeout() (which tests the condition before entering the wait and is therefore always wrong in this case). EEPROM reads on 100kHz i2c now measure ~5.2kB/s, about 1/2 what's achievable, and much better than the worst-case 100 bytes/sec before. While at it remove the debug print from the low-level wait function. Signed-off-by: Peter Swain <pswain@cavium.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: octeon: Remove zero-length message supportJan Glauber1-4/+7
Zero-length message support (SMBUS QUICK or i2c) never worked with the Octeon hardware. Disable SMBUS QUICK support and bail out in case of a zero-length i2c request. After this change 'i2c-detect -q' will return an error on Octeon but the previously reported results were wrong anyway. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: s3c2410: Check clk_prepare_enable() return valueJavier Martinez Canillas1-1/+6
The clk_prepare_enable() function can fail so check the return value and propagate the error in case of a failure. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: s3c2410: Print errno code in error logsJavier Martinez Canillas1-2/+3
The driver not always prints the error code in case of a failure but this information can be very useful for debugging. So let's print if available. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: s3c2410: Cleanup indentation and comment styleKrzysztof Kozlowski1-56/+57
Improve the readability by: - fixing indentation, - switching to proper block comments, - removing spurious blank lines, - checkpatch: void function return statements are not generally useful, - checkpatch: braces {} are not necessary for any arm of this statement, - checkpatch: missing a blank line after declarations. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: s3c2410: Minor function-level comment cleanupKrzysztof Kozlowski1-78/+32
Cleanup the weird function-level comments and remove obvious documentation for probe/remove. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-26i2c: s3c2410: Add missing clock unprepare on probe() error pathKrzysztof Kozlowski1-0/+1
If during probe() the s3c24xx_i2c_init() failed, the clock was left in disabled but prepared state. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-25i2c: octeon: Add support for cn78xx chipsJan Glauber1-10/+119
cn78xx has a different interrupt architecture, so we have to manage the interrupts differently. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-25i2c: octeon: Enable High-Level ControllerDavid Daney1-10/+337
Use High-Level Controller (HLC) when possible. The HLC can read/write up to 8 bytes and is completely optional. The most important difference of the HLC is that it only requires one interrupt for a transfer (up to 8 bytes) where the low-level read/write requires 2 interrupts plus one interrupt per transferred byte. Since the interrupts are costly using the HLC improves the performance. Also, the HLC provides improved error handling. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> [wsa: fixed trivial checkpatch warnings] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-25i2c: octeon: Add flush writeq helper functionPeter Swain1-2/+7
Add helper function that reads back a value after writing to make sure the write is finished and use it in octeon_i2c_write_int(). Signed-off-by: Peter Swain <pswain@cavium.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-25i2c: octeon: Use i2c recovery frameworkJan Glauber1-63/+96
Switch to the i2c bus recovery framework using generic SCL recovery. If this fails try to reset the hardware. The recovery is triggered during START on timeout of the interrupt or failure to reach the START / repeated-START condition. The START function is moved to xfer and while at it remove the xfer debug message (i2c core already provides a debug message for this). Signed-off-by: Jan Glauber <jglauber@cavium.com> [wsa: removed one empty line] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-25i2c: octeon: Improve error status checkingJan Glauber1-23/+106
Introduce a function that checks for valid status codes depending on the phase of a transmit or receive. Also add all existing status codes and improve error handling for various states. The Octeon TWSI has an "assert acknowledge" bit (TWSI_CTL_AAK) that is required to be set in master receive mode until the last byte is requested. The state check needs to consider if this bit was set. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-24i2c: s3c2410: Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS instead of open-codedAxel Lin1-8/+2
Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS to simplify the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-24i2c: exynos5: Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS instead of open-codedAxel Lin1-8/+2
Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS to simplify the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-24i2c: mux: pinctrl: fix indentation for better readabilityWolfram Sang1-7/+7
smatch rightfully says: drivers/i2c/muxes/i2c-mux-pinctrl.c:175 i2c_mux_pinctrl_probe() warn: inconsistent indenting Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-24i2c: omap: drop the lock hard irq contextSebastian Andrzej Siewior1-11/+1
The lock is taken while reading two registers. On RT the first lock is taken in hard irq where it might sleep and in the threaded irq. The threaded irq runs in oneshot mode so the hard irq does not run until the thread the completes so there is no reason to grab the lock. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> [grygorii.strashko@ti.com: drop locking from isr completely and remove lock field from struct omap_i2c_dev] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-24i2c: dln2: Pass forward ACPI companionIrina Tirdea1-0/+2
Share the ACPI companion for the platform device with the i2c adapter, so that the adapter has access to the properties defined in ACPI tables. Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: exynos5: Fix possible ABBA deadlock by keeping I2C clock preparedJavier Martinez Canillas1-5/+19
The exynos5 I2C controller driver always prepares and enables a clock before using it and then disables unprepares it when the clock is not used anymore. But this can cause a possible ABBA deadlock in some scenarios since a driver that uses regmap to access its I2C registers, will first grab the regmap lock and then the I2C xfer function will grab the prepare lock when preparing the I2C clock. But since the clock driver also uses regmap for I2C accesses, preparing a clock will first grab the prepare lock and then the regmap lock when using the regmap API. An example of this happens on the Exynos5422 Odroid XU4 board where a s2mps11 PMIC is used and both the s2mps11 regulators and clk drivers share the same I2C regmap. The possible deadlock is reported by the kernel lockdep: Possible unsafe locking scenario: CPU0 CPU1 ---- ---- lock(sec_core:428:(regmap)->lock); lock(prepare_lock); lock(sec_core:428:(regmap)->lock); lock(prepare_lock); *** DEADLOCK *** Fix it by leaving the code prepared on probe and use {en,dis}able in the I2C transfer function. This patch is similar to commit 34e81ad5f0b6 ("i2c: s3c2410: fix ABBA deadlock by keeping clock prepared") that fixes the same bug in other driver for an I2C controller found in Samsung SoCs. Reported-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2016-04-22i2c: cpm: Fix build break due to incompatible pointer typesMichael Ellerman1-2/+2
Since commit ea8daa7b9784 ("kbuild: Add option to turn incompatible pointer check into error"), assignments from an incompatible pointer types have become a hard error, eg: drivers/i2c/busses/i2c-cpm.c:545:91: error: passing argument 3 of 'dma_alloc_coherent' from incompatible pointer type Fix the build break by converting txdma & rxdma to dma_addr_t. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org Fixes: ea8daa7b9784
2016-04-22i2c: mux: drop old unused i2c-mux apiPeter Rosin1-63/+0
All i2c mux users are using an explicit i2c mux core, drop support for implicit i2c mux cores. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: i2c-mux-reg: convert to use an explicit i2c mux corePeter Rosin1-44/+25
Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: i2c-mux-pca954x: convert to use an explicit i2c mux corePeter Rosin1-31/+30
Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Add a mask to handle the case where not all child adapters should cause a mux deselect to happen, now that there is a common deselect op for all child adapters. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: i2c-mux-pca9541: convert to use an explicit i2c mux corePeter Rosin1-31/+27
Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: i2c-arb-gpio-challenge: convert to use an explicit i2c mux corePeter Rosin1-27/+20
Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: i2c-mux-pinctrl: convert to use an explicit i2c mux corePeter Rosin1-53/+30
Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-22i2c: i2c-mux-gpio: convert to use an explicit i2c mux corePeter Rosin1-33/+22
Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>