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path: root/drivers/iio/adc/stm32-adc-core.c (follow)
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2018-11-25iio: adc: stm32-adc: add power management supportFabrice Gasnier1-56/+126
Add support for runtime PM & sleep. Move all regulator and clock management to dedicated HW start/stop routines. Then rely on (runtime) PM OPS to call them. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-05-07iio: adc: stm32-adc: add support for STM32MP1Fabrice Gasnier1-18/+48
Add support for STM32MP1 ADC. It's quite similar to STM32H7 ADC. Introduce new compatible to handle variants of this hardware such as vregready flag, trigger list, interrupts, clock rate. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2018-01-08iio: stm32: Adopt SPDX identifierBenjamin Gaignard1-13/+1
Add SPDX identifier in stm32's files in IIO directory Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-10-21iio: adc: stm32: add check on clock rateFabrice Gasnier1-0/+13
Add check on STM32 ADC clock rate to report an explicit error. This may avoid division by 0 later in stm32-adc driver. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-08-28Merge 4.13-rc7 into staging-nextGreg Kroah-Hartman1-5/+5
We want the staging and iio fixes in here to handle the merge issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-07-30iio: adc: stm32: fix common clock rateFabrice Gasnier1-5/+5
ADC clock input is provided to internal prescaler (that decreases its frequency). It's then used as reference clock for conversions. - Fix common clock rate used then by stm32-adc sub-devices. Take common prescaler into account. Currently, rate is used to set "boost" mode. It may unnecessarily be set. This impacts power consumption. - Fix ADC max clock rate on STM32H7 (fADC from datasheet). Currently, prescaler may be set too low. This can result in ADC reference clock used for conversion to exceed max allowed clock frequency. Fixes: 95e339b6e85d ("iio: adc: stm32: add support for STM32H7") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-07-02iio: adc: stm32: make array stm32h7_adc_ckmodes_spec staticColin Ian King1-1/+1
The array stm32h7_adc_ckmodes_spec does not need to be in global scope, so make it static. Cleans up sparse warning: "symbol 'stm32h7_adc_ckmodes_spec' was not declared. Should it be static?" Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11iio: adc: stm32: add support for STM32H7Fabrice Gasnier1-3/+168
Add support for STM32H7 Analog to Digital Converter. It has up to 20 external channels, resolution ranges from 8 to 16bits. Either bus or asynchronous adc clock may be used. Add registers & bitfields definition. Also add new configuration options to enter/exit powerdown and perform self-calibration. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11iio: adc: stm32: introduce compatible data cfgFabrice Gasnier1-7/+55
Prepare support for stm32h7 adc variant by introducing compatible configuration data. Move STM32F4 specific stuff to compatible data structure: - registers & bit fields - input channels data - start/stop procedures - trigger definitions Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11iio: adc: stm32: make core adc clock optional by defaultFabrice Gasnier1-12/+26
Analog clock input is mandatory on stm32f4. But newer version of ADC hardware block allow to select either bus clock or asynchronous clock, for analog circuitry. So, make it optional by default, but enforce clk presence on stm32f4. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-29iio: adc: stm32: add optional dma supportFabrice Gasnier1-0/+1
Add DMA optional support to STM32 ADC, as there is a limited number DMA channels (request lines) that can be assigned to ADC. This way, driver may fall back using interrupts when all DMA channels are in use for other IPs. Use dma cyclic mode with two periods. Allow to tune period length by using watermark. Coherent memory is used for dma (max buffer size is fixed to PAGE_SIZE). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-11-19iio: adc: Add support for STM32 ADC coreFabrice Gasnier1-0/+303
Add core driver for STMicroelectronics STM32 ADC (Analog to Digital Converter). STM32 ADC can be composed of up to 3 ADCs with shared resources like clock prescaler, common interrupt line and analog reference voltage. This core driver basically manages shared resources. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>