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2022-01-05RDMA/hns: Remove support for HIP06Chengchang Tang1-2/+1
HIP06 is no longer supported. In order to reduce unnecessary maintenance, the code of HIP06 is removed. Link: https://lore.kernel.org/r/20211220130558.61585-1-liangwenpeng@huawei.com Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-08-24RDMA/hns: Delete unused hns bitmap interfaceYangyang Li1-70/+0
The resources that use the hns bitmap interface: qp, cq, mr, pd, xrcd, uar, srq, have been changed to IDA interfaces, and the unused hns' own bitmap interfaces need to be deleted. Link: https://lore.kernel.org/r/1629336980-17499-4-git-send-email-liangwenpeng@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-08-24RDMA/hns: Use IDA interface to manage srq indexYangyang Li1-1/+1
Switch srq index allocation and release from hns' own bitmap interface to IDA interface. Link: https://lore.kernel.org/r/1629336980-17499-3-git-send-email-liangwenpeng@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-08-24RDMA/hns: Use IDA interface to manage uar indexYangyang Li1-1/+1
Switch uar index allocation and release from hns' own bitmap interface to IDA interface. Link: https://lore.kernel.org/r/1629336980-17499-2-git-send-email-liangwenpeng@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-06-21RDMA/hns: Use IDA interface to manage xrcd indexYangyang Li1-1/+1
Switch xrcd index allocation and release from hns own bitmap interface to IDA interface. Link: https://lore.kernel.org/r/1623325814-55737-7-git-send-email-liweihang@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-06-21RDMA/hns: Use IDA interface to manage pd indexYangyang Li1-1/+1
Switch pd index allocation and release from hns own bitmap interface to IDA interface. Link: https://lore.kernel.org/r/1623325814-55737-6-git-send-email-liweihang@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-06-21RDMA/hns: Use IDA interface to manage mtpt indexYangyang Li1-1/+1
Switch mtpt index allocation and release from hns own bitmap interface to IDA interface. Link: https://lore.kernel.org/r/1623325814-55737-5-git-send-email-liweihang@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-06-21RDMA/hns: Remove unused RR mechanismYangyang Li1-4/+2
Round-robin (RR) is no longer used in the allocation of the bitmap table, and all the function input parameters that use this mechanism are BITMAP_NO_RR. The code that defines and uses the RR needs to be deleted. Link: https://lore.kernel.org/r/1623325814-55737-4-git-send-email-liweihang@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-06-21RDMA/hns: Remove the unused hns_roce_bitmap_free_range functionYangyang Li1-11/+1
hns_roce_bitmap_free_range() is only called inside hns_roce_bitmap_free(), and the input parameter "cnt" is set to a constant 1. In addition, the driver does not use alloc_range scenarios, so free_range does not need to exist. Link: https://lore.kernel.org/r/1623325814-55737-3-git-send-email-liweihang@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-06-21RDMA/hns: Remove the unused hns_roce_bitmap_alloc_range functionYangyang Li1-39/+0
The function is no longer used. Link: https://lore.kernel.org/r/1623325814-55737-2-git-send-email-liweihang@huawei.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-05-28RDMA/hns: Optimize the base address table config for MTRXi Wang1-30/+21
The base address table is allocated by dma allocator, and the size is always aligned to PAGE_SIZE. If a fixed size is used to allocate the table, the number of base address entries stored in the table will be smaller than that can actually stored. Link: https://lore.kernel.org/r/1621589395-2435-2-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2021-03-11RDMA/hns: Add support for XRC on HIP09Wenpeng Liang1-0/+3
The HIP09 supports XRC transport service, it greatly saves the number of QPs required to connect all processes in a large cluster. Link: https://lore.kernel.org/r/1614826558-35423-1-git-send-email-liweihang@huawei.com Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-12-11RDMA/hns: Fix inaccurate printsYixing Liu1-2/+2
Some %d in print format string should be %u, and some prints miss the useful errno or are in nonstandard format. Just fix above issues. Link: https://lore.kernel.org/r/1607650657-35992-11-git-send-email-liweihang@huawei.com Signed-off-by: Yixing Liu <liuyixing1@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-11-23RDMA/hns: Refactor the hns_roce_buf allocation flowXi Wang1-54/+74
Add a group of flags to control the 'struct hns_roce_buf' allocation flow, this is used to support the caller running in atomic context. Link: https://lore.kernel.org/r/1605347916-15964-1-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-09-09RDMA/umem: Add rdma_umem_for_each_dma_block()Jason Gunthorpe1-2/+1
This helper does the same as rdma_for_each_block(), except it works on a umem. This simplifies most of the call sites. Link: https://lore.kernel.org/r/4-v2-270386b7e60b+28f4-umem_1_jgg@nvidia.com Acked-by: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com> Acked-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-05-25RDMA/hns: Change all page_shift to unsignedWeihang Li1-1/+1
page_shift is used to calculate the page size, it's always non-negative, and should be in type of unsigned. Link: https://lore.kernel.org/r/1589982799-28728-7-git-send-email-liweihang@huawei.com Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2020-05-19RDMA/hns: Rename macro for defining hns hardware page sizeXi Wang1-3/+3
Rename the PAGE_ADDR_SHIFT as HNS_HW_PAGE_SHIFT to make code more readable. Link: https://lore.kernel.org/r/1588931159-56875-9-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2020-05-06RDMA/hns: Remove unused MTT functionsXi Wang1-43/+0
The MTT (Memory Translate Table) interface is no longer used to configure the buffer address to BT (Base Address Table) that requires driver mapping. Because the MTT is not compatible with multi-hop addressing of the hip08, it is replaced by MTR (Memory Translate Region) interface, and all the MTT functions should be removed. Link: https://lore.kernel.org/r/1588071823-40200-3-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2020-04-22RDMA/hns: Optimize hns buffer allocation flowXi Wang1-56/+47
When the value of nbufs is 1, the buffer is in direct mode, which may cause confusion. So optimizes current codes to make it easier to maintain and understand. Link: https://lore.kernel.org/r/1586779091-51410-3-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2019-11-08RDMA/hns: Fix non-standard error codesYixian Liu1-2/+2
It is better to return a linux error code than define a private constant. Link: https://lore.kernel.org/r/1572952082-6681-9-git-send-email-liweihang@hisilicon.com Signed-off-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2019-06-25RDMA/hns: Cleanup unnecessary exported symbolsLijun Ou1-2/+0
This patch removes the hns-roce.ko for cleanup all the exported symbols in common part. Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2019-06-25RDMA/hns: fix potential integer overflow on left shiftColin Ian King1-1/+1
There is a potential integer overflow when int i is left shifted as this is evaluated using 32 bit arithmetic but is being used in a context that expects an expression of type dma_addr_t. Fix this by casting integer i to dma_addr_t before shifting to avoid the overflow. Addresses-Coverity: ("Unintentional integer overflow") Fixes: 2ac0bc5e725e ("RDMA/hns: Add a group interfaces for optimizing buffers getting flow") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2019-06-20RDMA/hns: Add a group interfaces for optimizing buffers getting flowLijun Ou1-0/+99
Currently, the code for getting umem and kmem buffers exist many files, this patch adds a group interfaces to simplify the buffers getting flow. Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2019-01-08cross-tree: phase out dma_zalloc_coherent()Luis Chamberlain1-5/+6
We already need to zero out memory for dma_alloc_coherent(), as such using dma_zalloc_coherent() is superflous. Phase it out. This change was generated with the following Coccinelle SmPL patch: @ replace_dma_zalloc_coherent @ expression dev, size, data, handle, flags; @@ -dma_zalloc_coherent(dev, size, handle, flags) +dma_alloc_coherent(dev, size, handle, flags) Suggested-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> [hch: re-ran the script on the latest tree] Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-12-05RDMA/hns: Init SRQ table for hip08Lijun Ou1-0/+2
This patch inits hem resource for SRQ table, includes SRQWQE and SRQWQE index resource. Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2018-06-04IB/hns: Use zeroing memory allocator instead of allocator/memsetYueHaibing1-5/+3
Use dma_zalloc_coherent for allocating zeroed memory and remove unnecessary memset function. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2017-12-01RDMA/hns: Get rid of virt_to_page and vmap calls after dma_alloc_coherentWei Hu\(Xavier\)1-23/+0
In general dma_alloc_coherent() returns a CPU virtual address and a DMA address, and we have no guarantee that the virtual address is either in the linear map or vmalloc. It could be in some other special place. We have no guarantee that the underlying memory even has an associated struct page at all. In current code, there are incorrect usage as below: dma_alloc_coherent + virt_to_page + vmap. There will probably introduce coherency problem. This patch fixes it to get rid of virt_to_page and vmap calls at Leon's suggestion. The related link: https://lkml.org/lkml/2017/11/7/34 Fixes: 9a44353("IB/hns: Add driver files for hns RoCE driver") Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Xiping Zhang (Francis) <zhangxiping3@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
2017-10-25RDMA/hns: Support WQE/CQE/PBL page size configurable feature in hip08Wei Hu(Xavier)1-10/+19
This patch updates to support WQE, CQE and PBL page size configurable feature, which includes base address page size and buffer page size. Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-09-27RDMA/hns: Modify assignment device variable to support both PCI device and platform deviceWei Hu(Xavier)1-3/+3
In order to support the scalability of the hardware version, the features irrelevant to the hardware will be located in the hns-roce.ko, and the hardware relevant operations will be located in hns_roce_hw_v1.ko or hns_roce_hw_v2.ko based on the series chips. The hip08 RoCE engine is a PCI device, hip06 RoCE engine is a platform device. In order to support both platform device and PCI device, We replace &hr_dev->pdev->dev with hr_dev->dev in hns-roce.ko as belows: Before modification: struct device *dev = hr_dev->dev; After modification: struct device *dev = &hr_dev->pdev->dev; The related structure: struct hns_roce_dev { ... struct platform_device *pdev; struct pci_dev *pci_dev; struct device *dev; ... } Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-09-27RDMA/hns: Split hw v1 driver from hns roce driverWei Hu(Xavier)1-0/+2
The hardware relevant definitions and operations are implemented in hns_roce_hw_v* file. According to the diversity chips, the file is named as hns_roce_hw_v1.c or hns_roce_hw_v2.c etc. The general software process flow, common structures and allocated algorithms are implemented in other files located in hns roce driver. In order to support the scalability of the hardware version, the common driver features are in the hns-roce.ko, and the hardware relevant operations are in hns_roce_hw_v1.ko or hns_roce_hw_v2.ko based on the series chips. Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-07-28IB/hns: Support compile test for hns RoCE driverMatan Barak1-0/+1
Compiling the hns RoCE driver requires ARM architecture. In order to simplify development of IB/core, support compile test. Add the necessary includes for that too. Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2016-12-03IB/hns: Change qpn allocation to round-robin mode.Wei Hu (Xavier)1-4/+7
When using CM to establish connections, qp number that was freed just now will be rejected by ib core. To fix these problem, We change qpn allocation to round-robin mode. We added the round-robin mode for allocating resources using bitmap. We use round-robin mode for qp number and non round-robing mode for other resources like cq number, pd number etc. Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
2016-08-22IB/hns: Add driver files for hns RoCE driveroulijun1-0/+257
These are the various new source code files for the Hisilicon RoCE driver for ARM architecture. Signed-off-by: Wei Hu <xavier.huwei@huawei.com> Signed-off-by: Nenglong Zhao <zhaonenglong@hisilicon.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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